x393
1.0
FPGAcodeforElphelNC393camera
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cmprs_afi_mux Member List
This is the complete list of members for
cmprs_afi_mux
, including all inherited members.
SHIFT_WIDTH
debug_slave
Parameter
READ_WIDTH
debug_slave
Parameter
WRITE_WIDTH
debug_slave
Parameter
DEBUG_CMD_LATENCY
debug_slave
Parameter
mclk
debug_slave
Input
mrst
debug_slave
Input
debug_di
debug_slave
Input
debug_sl
debug_slave
Input
debug_do
debug_slave
Output
rd_data
debug_slave
Input
wr_data
debug_slave
Output
stb
debug_slave
Output
data_sr
debug_slave
Signal
cmd
debug_slave
Signal
cmd_reg
debug_slave
Signal
cmd_reg_dly
debug_slave
Signal
ext_rdata
debug_slave
Signal
WIDTH
dly_16
Parameter
clk
dly_16
Input
rst
dly_16
Input
dly
dly_16
Input
din
dly_16
Input
dout
dly_16
Output
EXTRA_DLY
pulse_cross_clock
Parameter
rst
pulse_cross_clock
Input
src_clk
pulse_cross_clock
Input
dst_clk
pulse_cross_clock
Input
in_pulse
pulse_cross_clock
Input
out_pulse
pulse_cross_clock
Output
busy
pulse_cross_clock
Output
EXTRA_DLY_SAFE
pulse_cross_clock
Parameter
in_reg
pulse_cross_clock
Signal
out_reg
pulse_cross_clock
Signal
busy_r
pulse_cross_clock
Signal
CMPRS_AFIMUX_ADDR
cmprs_afi_mux
CMPRS_AFIMUX_MASK
cmprs_afi_mux
CMPRS_AFIMUX_EN
cmprs_afi_mux
CMPRS_AFIMUX_RST
cmprs_afi_mux
CMPRS_AFIMUX_MODE
cmprs_afi_mux
CMPRS_AFIMUX_STATUS_CNTRL
cmprs_afi_mux
CMPRS_AFIMUX_SA_LEN
cmprs_afi_mux
CMPRS_AFIMUX_STATUS_REG_ADDR
cmprs_afi_mux
CMPRS_AFIMUX_WIDTH
cmprs_afi_mux
CMPRS_AFIMUX_CYCBITS
cmprs_afi_mux
123
cmprs_afi_mux
124
cmprs_afi_mux
mclk
cmprs_afi_mux
hclk
cmprs_afi_mux
mrst
cmprs_afi_mux
hrst
cmprs_afi_mux
cmd_ad
cmprs_afi_mux
cmd_stb
cmprs_afi_mux
status_ad
cmprs_afi_mux
status_rq
cmprs_afi_mux
status_start
cmprs_afi_mux
fifo_rst0
cmprs_afi_mux
fifo_ren0
cmprs_afi_mux
fifo_rdata0
cmprs_afi_mux
eof_written0
cmprs_afi_mux
pre_flush0
cmprs_afi_mux
fifo_flush0
cmprs_afi_mux
fifo_count0
cmprs_afi_mux
fifo_rst1
cmprs_afi_mux
fifo_ren1
cmprs_afi_mux
fifo_rdata1
cmprs_afi_mux
eof_written1
cmprs_afi_mux
pre_flush1
cmprs_afi_mux
fifo_flush1
cmprs_afi_mux
fifo_count1
cmprs_afi_mux
fifo_rst2
cmprs_afi_mux
fifo_ren2
cmprs_afi_mux
fifo_rdata2
cmprs_afi_mux
eof_written2
cmprs_afi_mux
pre_flush2
cmprs_afi_mux
fifo_flush2
cmprs_afi_mux
fifo_count2
cmprs_afi_mux
fifo_rst3
cmprs_afi_mux
fifo_ren3
cmprs_afi_mux
fifo_rdata3
cmprs_afi_mux
eof_written3
cmprs_afi_mux
pre_flush3
cmprs_afi_mux
fifo_flush3
cmprs_afi_mux
fifo_count3
cmprs_afi_mux
afi_awaddr
cmprs_afi_mux
afi_awvalid
cmprs_afi_mux
afi_awready
cmprs_afi_mux
afi_awid
cmprs_afi_mux
afi_awlock
cmprs_afi_mux
afi_awcache
cmprs_afi_mux
afi_awprot
cmprs_afi_mux
afi_awlen
cmprs_afi_mux
afi_awsize
cmprs_afi_mux
afi_awburst
cmprs_afi_mux
afi_awqos
cmprs_afi_mux
afi_wdata
cmprs_afi_mux
afi_wvalid
cmprs_afi_mux
afi_wready
cmprs_afi_mux
afi_wid
cmprs_afi_mux
afi_wlast
cmprs_afi_mux
afi_wstrb
cmprs_afi_mux
afi_bvalid
cmprs_afi_mux
afi_bready
cmprs_afi_mux
afi_bid
cmprs_afi_mux
afi_bresp
cmprs_afi_mux
afi_wcount
cmprs_afi_mux
afi_wacount
cmprs_afi_mux
afi_wrissuecap1en
cmprs_afi_mux
debug_do
cmprs_afi_mux
debug_sl
cmprs_afi_mux
debug_di
cmprs_afi_mux
en
cmprs_afi_mux
en_d
cmprs_afi_mux
en_nrst
cmprs_afi_mux
en_chn
cmprs_afi_mux
cmd_data
cmprs_afi_mux
cmd_a
cmprs_afi_mux
cmd_we
cmprs_afi_mux
cmd_we_status_w
cmprs_afi_mux
cmd_we_mode_w
cmprs_afi_mux
cmd_we_sa_len_w
cmprs_afi_mux
cmd_we_en_w
cmprs_afi_mux
cmd_we_rst_w
cmprs_afi_mux
sa_len_d
cmprs_afi_mux
sa_len_wa
cmprs_afi_mux
rst_mclk
cmprs_afi_mux
en_mclk
cmprs_afi_mux
sa_len_we
cmprs_afi_mux
en_we
cmprs_afi_mux
en_rst
cmprs_afi_mux
fifo_flush
cmprs_afi_mux
pre_flush
cmprs_afi_mux
ren_suspend_flush
cmprs_afi_mux
cur_chn
cmprs_afi_mux
left_to_eof
cmprs_afi_mux
fifo_flush_d
cmprs_afi_mux
eof_stb
cmprs_afi_mux
counts_corr0
cmprs_afi_mux
counts_corr1
cmprs_afi_mux
counts_corr2
cmprs_afi_mux
winner1
cmprs_afi_mux
winner2
cmprs_afi_mux
pre_winner2_w
cmprs_afi_mux
fifo_count0_m1
cmprs_afi_mux
fifo_count1_m1
cmprs_afi_mux
fifo_count2_m1
cmprs_afi_mux
fifo_count3_m1
cmprs_afi_mux
need_to_bother
cmprs_afi_mux
ready_to_start
cmprs_afi_mux
busy
cmprs_afi_mux
done_burst_w
cmprs_afi_mux
pre_busy_w
cmprs_afi_mux
first_busy
cmprs_afi_mux
pend_last
cmprs_afi_mux
last_burst_in_frame
cmprs_afi_mux
wleft
cmprs_afi_mux
pre_chunk_inc_m1
cmprs_afi_mux
reset_pointers
cmprs_afi_mux
ptr_resetting
cmprs_afi_mux
chunk_addr
cmprs_afi_mux
awvalid
cmprs_afi_mux
wvalid
cmprs_afi_mux
wlast
cmprs_afi_mux
wdata
cmprs_afi_mux
wdata_en
cmprs_afi_mux
wdata_sel
cmprs_afi_mux
fifo_ren
cmprs_afi_mux
chunk_ptr_rd
cmprs_afi_mux
chunk_ptr_ra
cmprs_afi_mux
items_left
cmprs_afi_mux
afi_awid_r
cmprs_afi_mux
max_wlen
cmprs_afi_mux
want_wleft32
cmprs_afi_mux
rollover_limited_w
cmprs_afi_mux
afi_wvalid_w
cmprs_afi_mux
AFI_MUX_BUF_LATENCYM1
cmprs_afi_mux
chunk_ptr_rd01
cmprs_afi_mux
hclk
cmprs_afi_mux_ptr
Input
sa_len_di
cmprs_afi_mux_ptr
Input
sa_len_wa
cmprs_afi_mux_ptr
Input
sa_len_we
cmprs_afi_mux_ptr
Input
en
cmprs_afi_mux_ptr
Input
reset_pointers
cmprs_afi_mux_ptr
Input
pre_busy_w
cmprs_afi_mux_ptr
Input
pre_winner_channel
cmprs_afi_mux_ptr
Input
need_to_bother
cmprs_afi_mux_ptr
Input
chunk_inc_want_m1
cmprs_afi_mux_ptr
Input
last_burst_in_frame
cmprs_afi_mux_ptr
Input
busy
cmprs_afi_mux_ptr
Input
ptr_resetting
cmprs_afi_mux_ptr
Output
chunk_addr
cmprs_afi_mux_ptr
Output
chunk_ptr_ra
cmprs_afi_mux_ptr
Input
chunk_ptr_rd
cmprs_afi_mux_ptr
Output
max_wlen
cmprs_afi_mux_ptr
Output
reset_rq
cmprs_afi_mux_ptr
Signal
reset_rq_pri
cmprs_afi_mux_ptr
Signal
reset_rq_enc
cmprs_afi_mux_ptr
Signal
start_resetting_w
cmprs_afi_mux_ptr
Signal
resetting
cmprs_afi_mux_ptr
Signal
ptr_wa
cmprs_afi_mux_ptr
Signal
ptr_we
cmprs_afi_mux_ptr
Signal
ptr_ram
cmprs_afi_mux_ptr
Signal
ptr_ram_di
cmprs_afi_mux_ptr
Signal
sa_len_ram
cmprs_afi_mux_ptr
Signal
chunk_ptr_inc
cmprs_afi_mux_ptr
Signal
en_d
cmprs_afi_mux_ptr
Signal
sa_len_ra
cmprs_afi_mux_ptr
Signal
max_inc_ram
cmprs_afi_mux_ptr
Signal
pre_chunk_inc_m1
cmprs_afi_mux_ptr
Signal
chunk_inc
cmprs_afi_mux_ptr
Signal
chunks_to_rollover
cmprs_afi_mux_ptr
Signal
chunks_to_rollover_r
cmprs_afi_mux_ptr
Signal
chunks_to_rollover_m1
cmprs_afi_mux_ptr
Signal
pre_chunks_to_rollover_m1
cmprs_afi_mux_ptr
Signal
max_inc_ram_we
cmprs_afi_mux_ptr
Signal
max_inc_ram_wa
cmprs_afi_mux_ptr
Signal
rollover_w
cmprs_afi_mux_ptr
Signal
rollover_r
cmprs_afi_mux_ptr
Signal
winner_channel
cmprs_afi_mux_ptr
Signal
ptr_ram_wa
cmprs_afi_mux_ptr
Signal
max_wlen_r
cmprs_afi_mux_ptr
Signal
max_wlen_same
cmprs_afi_mux_ptr
Signal
last_max_written
cmprs_afi_mux_ptr
Signal
hclk
cmprs_afi_mux_ptr_wresp
Input
length_di
cmprs_afi_mux_ptr_wresp
Input
length_wa
cmprs_afi_mux_ptr_wresp
Input
length_we
cmprs_afi_mux_ptr_wresp
Input
en
cmprs_afi_mux_ptr_wresp
Input
reset_pointers
cmprs_afi_mux_ptr_wresp
Input
chunk_ptr_ra
cmprs_afi_mux_ptr_wresp
Input
chunk_ptr_rd
cmprs_afi_mux_ptr_wresp
Output
eof_written
cmprs_afi_mux_ptr_wresp
Output
afi_bvalid
cmprs_afi_mux_ptr_wresp
Input
afi_bready
cmprs_afi_mux_ptr_wresp
Output
afi_bid
cmprs_afi_mux_ptr_wresp
Input
reset_rq
cmprs_afi_mux_ptr_wresp
Signal
reset_rq_pri
cmprs_afi_mux_ptr_wresp
Signal
reset_rq_enc
cmprs_afi_mux_ptr_wresp
Signal
start_resetting_w
cmprs_afi_mux_ptr_wresp
Signal
resetting
cmprs_afi_mux_ptr_wresp
Signal
ptr_wa
cmprs_afi_mux_ptr_wresp
Signal
ptr_we
cmprs_afi_mux_ptr_wresp
Signal
ptr_ram
cmprs_afi_mux_ptr_wresp
Signal
ptr_ram_di
cmprs_afi_mux_ptr_wresp
Signal
len_ram
cmprs_afi_mux_ptr_wresp
Signal
chunk_ptr_inc
cmprs_afi_mux_ptr_wresp
Signal
chunk_ptr_rovr
cmprs_afi_mux_ptr_wresp
Signal
busy
cmprs_afi_mux_ptr_wresp
Signal
id_r
cmprs_afi_mux_ptr_wresp
Signal
chn
cmprs_afi_mux_ptr_wresp
Signal
eof
cmprs_afi_mux_ptr_wresp
Signal
last_burst_in_frame
cmprs_afi_mux_ptr_wresp
Signal
chunk_inc
cmprs_afi_mux_ptr_wresp
Signal
afi_bready_r
cmprs_afi_mux_ptr_wresp
Signal
afi_bvalid_r
cmprs_afi_mux_ptr_wresp
Signal
pre_busy
cmprs_afi_mux_ptr_wresp
Signal
pre_we
cmprs_afi_mux_ptr_wresp
Signal
en_d
cmprs_afi_mux_ptr_wresp
Signal
CMPRS_AFIMUX_STATUS_REG_ADDR
cmprs_afi_mux_status
Parameter
CMPRS_AFIMUX_WIDTH
cmprs_afi_mux_status
Parameter
CMPRS_AFIMUX_CYCBITS
cmprs_afi_mux_status
Parameter
hclk
cmprs_afi_mux_status
Input
mclk
cmprs_afi_mux_status
Input
mrst
cmprs_afi_mux_status
Input
hrst
cmprs_afi_mux_status
Input
cmd_data
cmprs_afi_mux_status
Input
cmd_a
cmprs_afi_mux_status
Input
status_we
cmprs_afi_mux_status
Input
mode_we
cmprs_afi_mux_status
Input
status_ad
cmprs_afi_mux_status
Output
status_rq
cmprs_afi_mux_status
Output
status_start
cmprs_afi_mux_status
Input
en
cmprs_afi_mux_status
Input
chunk_ptr_ra
cmprs_afi_mux_status
Output
chunk_ptr_rd
cmprs_afi_mux_status
Input
MODE_WIDTH
cmprs_afi_mux_status
Parameter
mode_data_mclk
cmprs_afi_mux_status
Signal
mode_we_hclk
cmprs_afi_mux_status
Signal
mode_hclk
cmprs_afi_mux_status
Signal
index
cmprs_afi_mux_status
Signal
cntr
cmprs_afi_mux_status
Signal
chunk_ptr_hclk
cmprs_afi_mux_status
Signal
chunk_chn_hclk
cmprs_afi_mux_status
Signal
status_data
cmprs_afi_mux_status
Signal
stb_w
cmprs_afi_mux_status
Signal
stb_r
cmprs_afi_mux_status
Signal
stb_mclk
cmprs_afi_mux_status
Signal
ad
cmprs_afi_mux_status
Signal
rq
cmprs_afi_mux_status
Signal
start
cmprs_afi_mux_status
Signal
ADDR
cmd_deser
Parameter
ADDR_MASK
cmd_deser
Parameter
NUM_CYCLES
cmd_deser
Parameter
ADDR_WIDTH
cmd_deser
Parameter
DATA_WIDTH
cmd_deser
Parameter
ADDR1
cmd_deser
Parameter
ADDR_MASK1
cmd_deser
Parameter
ADDR2
cmd_deser
Parameter
ADDR_MASK2
cmd_deser
Parameter
WE_EARLY
cmd_deser
Parameter
rst
cmd_deser
Input
clk
cmd_deser
Input
srst
cmd_deser
Input
ad
cmd_deser
Input
stb
cmd_deser
Input
addr
cmd_deser
Output
data
cmd_deser
Output
we
cmd_deser
Output
WE_WIDTH
cmd_deser
Parameter
ALWAYS_10
hclk
cmprs_afi_mux_status
Always Construct
ALWAYS_4
mclk
cmprs_afi_mux
Always Construct
ALWAYS_497
mclk
debug_slave
Always Construct
ALWAYS_5
hclk
cmprs_afi_mux
Always Construct
ALWAYS_532
src_clk or rst
pulse_cross_clock
Always Construct
ALWAYS_533
dst_clk
pulse_cross_clock
Always Construct
ALWAYS_6
hclk
cmprs_afi_mux
Always Construct
ALWAYS_7
hclk
cmprs_afi_mux_ptr
Always Construct
ALWAYS_8
hclk
cmprs_afi_mux_ptr_wresp
Always Construct
ALWAYS_9
mclk
cmprs_afi_mux_status
Always Construct
cmd_deser
cmprs_afi_mux
cmd_deser_dual
cmd_deser
Module Instance
cmd_deser_multi
cmd_deser
Module Instance
cmd_deser_single
cmd_deser
Module Instance
cmprs_afi_mux_ptr
cmprs_afi_mux
cmprs_afi_mux_ptr_wresp
cmprs_afi_mux
cmprs_afi_mux_status
cmprs_afi_mux
debug_slave
cmprs_afi_mux
dly01_16
dly_16
Module Instance
dly_16
cmprs_afi_mux
dly_16
cmprs_afi_mux
GENERATE [50]
dly_16
GENERATE
GENERATE [63]
cmd_deser
GENERATE
pulse_cross_clock
cmprs_afi_mux
pulse_cross_clock
cmprs_afi_mux
pulse_cross_clock
cmprs_afi_mux
status_generate
cmprs_afi_mux_status
Module Instance
status_generate
cmprs_afi_mux_status
Module Instance
status_generate
cmprs_afi_mux_status
Module Instance
status_generate
cmprs_afi_mux_status
Module Instance
status_router4
cmprs_afi_mux_status
Module Instance
Generated by
1.8.12