Design Units

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a	csconvert_jp4diff	huff_fifo393	odelay_fine_pipe	sens_hispi_fifo
	csconvert_mono	huffman393	odelay_pipe	sens_hispi_lane
action_decoder	d	huffman_merge_code_literal	oob	sens_hist_ram_double
ahci_ctrl_stat		huffman_snglclk	oob_ctrl	sens_hist_ram_nobuff
ahci_dma	datascope_incoming	huffman_stuffer_meta	oob_dev	sens_hist_ram_single
ahci_dma_rd_fifo	datascope_incoming_raw	i	oserdes_mem	sens_hist_ram_snglclk_18
ahci_dma_rd_stuff	datascope_timing		p	sens_hist_ram_snglclk_32
ahci_dma_wr_fifo	dcc_sync393	ibuf_ibufg		sens_histogram
ahci_fis_receive	dci_reset	ibufds_ibufgds	par12_hispi_psp4l	sens_histogram_dummy
ahci_fis_transmit	dct1d_chen	ibufds_ibufgds_50	par12_hispi_psp4l_lane	sens_histogram_mux
ahci_fsm	dct1d_chen_reorder_in	IBUFG	phy_cmd	sens_histogram_snglclk
ahci_sata_layers	dct1d_chen_reorder_out	ibufg	phy_top	sens_histogram_snglclk_dummy
ahci_top	dct2d8x8_chen	IBUFGDS	pll_base	sens_parallel12
axi_ahci_regs	dct_chen_transpose	ibufgds	pri1hot16	sens_sync
axi_hp_abort	ddr3_wrap	idelay_ctrl	PSBus (x393interfaces)	sensor_channel
axi_hp_clk	ddr_refresh	idelay_fine_pipe	pulse_cross_clock	sensor_fifo
axibram_read	debug_master	idelay_nofine	pxd_clock	sensor_i2c
axibram_write	debug_slave	imu_exttime393	pxd_single	sensor_i2c_io
b	dly01_16	imu_message393	q	sensor_i2c_prot
	dly_16	imu_spi393		sensor_i2c_scl_sda
bit_stuffer_27_32	dm_single	imu_timestamps393	quantizer393	sensor_membuf
bit_stuffer_escape	dq_single	index_max_16	r	sensors393
bit_stuffer_metadata	dqs_single	iobuf		sim_clk_div
buf_xclk_mclk16_393	dqs_single_nofine	iserdes_mem	ram18_32w_32r	sim_frac_clk_delay
byte_lane	drp_other_registers	j	ram18_32w_lt32r	sim_soc_interrupts
c	dsp_addsub_simd		ram18_dummy	simul_axi_fifo
	dsp_ma	jp_channel	ram18_lt32w_32r	simul_axi_hp_rd
camsync393	dsp_ma_preadd	l	ram18_lt32w_lt32r	simul_axi_hp_wr
clk_to_clk2x	dual_clock_source		ram18_var_w_var_r	simul_axi_master_rdaddr
clock_divider	e	latch_g_ce	ram18p_32w_32r	simul_axi_master_wdata
clock_inverter		lens_flat393	ram18p_32w_lt32r	simul_axi_master_wraddr
clocks393	elastic1632	lens_flat393_line	ram18p_dummy	simul_axi_read
clocks393m	elastic_cross_clock	level_cross_clocks	ram18p_lt32w_32r	simul_axi_slow_ready
cmd_addr	encoderDCAC393	level_cross_clocks_ff_bit	ram18p_lt32w_lt32r	simul_clk
cmd_deser	event_logger	level_cross_clocks_single_bit	ram18p_var_w_var_r	simul_clk_div_mult
cmd_deser_dual	f	level_cross_clocks_sync_bit	ram18t_var_w_var_r	simul_clk_mult
cmd_deser_multi		link	ram18tp_var_w_var_r	simul_clk_mult_div
cmd_deser_single	fifo_1cycle	logger_arbiter393	ram_1kx32_1kx32	simul_clk_single
cmd_encod_4mux	fifo_2regs	m	ram_1kx32w_512x64r	simul_fifo
cmd_encod_linear_mux	fifo_cross_clocks		ram_512x64w_1kx32r	simul_saxi_gp_wr
cmd_encod_linear_rd	fifo_same_clock	masked_max_reg	ram_64w_64r	simul_sensor12bits
cmd_encod_linear_rw	fifo_same_clock_fill	MAXIGPReadError (x393interfaces)	ram_64w_lt64r	SocketCommand (socket_command)
cmd_encod_linear_wr	fifo_sameclock_control	mcntrl393	ram_dummy	status_generate
cmd_encod_tiled_32_rd	focus_sharp393	mcntrl393_test01	ram_lt64w_64r	status_generate_extra
cmd_encod_tiled_32_rw	frame_num_sync	mcntrl_1kx32r	ram_lt64w_lt64r	status_generate_only
cmd_encod_tiled_32_wr	freq_meter	mcntrl_1kx32w	ram_var_w_var_r	status_read
cmd_encod_tiled_mux	g	mcntrl_buf_rd	ramp_64w_64r	status_router16
cmd_encod_tiled_rd		mcntrl_buf_wr	ramp_64w_lt64r	status_router2
cmd_encod_tiled_rw	gpio393	mcntrl_linear_rw	ramp_dummy	status_router4
cmd_encod_tiled_wr	gpio_bit	mcntrl_ps_pio	ramp_lt64w_64r	status_router8
cmd_frame_sequencer	gtx_10x8dec	mcntrl_tiled_rw	ramp_lt64w_lt64r	stuffer393
cmd_mux	gtx_8x10enc	mcont_common_chnbuf_reg	ramp_var_w_var_r	sync_resets
cmd_readback	gtx_comma_align	mcont_from_chnbuf_reg	ramt_var_w_var_r	t
cmd_seq_mux	gtx_elastic	mcont_to_chnbuf_reg	ramt_var_wb_var_r
cmda_single	gtx_wrap	mcontr_sequencer	ramtp_var_w_var_r	table_ad_receive
cmprs_afi_mux	gtxe2_channel_wrapper	membridge	resync_data	table_ad_transmit
cmprs_afi_mux_ptr	gtxe2_chnl	memctrl16	resync_fifo_nonsynt	timestamp_fifo
cmprs_afi_mux_ptr_wresp	gtxe2_chnl_clocking	mmcm_adv	round_robin	timestamp_snapshot
cmprs_afi_mux_status	gtxe2_chnl_cpll	mmcm_phase_cntr	rs232_rcv393	timestamp_to_parallel
cmprs_buf_average	gtxe2_chnl_cpll_inmux	mpullup	rtc393	timestamp_to_serial
cmprs_cmd_decode	gtxe2_chnl_outclk_mux	mult_saxi_wr	s	timing393
cmprs_frame_sync	gtxe2_chnl_rx	mult_saxi_wr_chn		v
cmprs_macroblock_buf_iface	gtxe2_chnl_rx_10x8dec	mult_saxi_wr_inbuf	sata_ahci_top
cmprs_out_fifo	gtxe2_chnl_rx_align	mult_saxi_wr_pointers	sata_phy	varlen_encode393
cmprs_out_fifo32	gtxe2_chnl_rx_dataiface	multipulse_cross_clock	sata_phy_dev	varlen_encode_snglclk
cmprs_pixel_buf_iface	gtxe2_chnl_rx_des	n	SAXIRdSim (x393interfaces)	x
cmprs_status	gtxe2_chnl_rx_oob		SAXIWrSim (x393interfaces)
cmprs_tile_mode2_decode	gtxe2_chnl_tx	nmea_decoder393	scheduler16	x393
cmprs_tile_mode_decode	gtxe2_chnl_tx_8x10enc	o	scrambler	X393_cocotb_server (x393_cocotb_server)
compressor393	gtxe2_chnl_tx_dataiface		select_clk_buf	x393_dut
condition_mux	gtxe2_chnl_tx_oob	obuf	sens_10398	x393Client (socket_command)
crc	gtxe2_chnl_tx_ser	obufds	sens_gamma	z
csconvert	GTXE2_GPL	oddr	sens_hispi12l4
csconvert18a	h	oddr_ds	sens_hispi_clock	zigzag393
csconvert_jp4		oddr_ss	sens_hispi_din
	histogram_saxi

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