- f -

F : lens_flat393_line
F0 : lens_flat393_line
F1 : lens_flat393_line
F_r : lens_flat393_line
F_SHIFT : lens_flat393_line
F_WIDTH : lens_flat393_line
FAST0 : level_cross_clocks , level_cross_clocks_single_bit , level_cross_clocks_sync_bit
FAST1 : level_cross_clocks , level_cross_clocks_ff_bit , level_cross_clocks_single_bit , level_cross_clocks_sync_bit
fatzero_in_ram : lens_flat393
fatzero_out_ram : lens_flat393
fb_clk_out : gtxe2_chnl_cpll
FB_OFFS32 : ahci_fis_receive
fclk : clocks393 , clocks393m , x393
FCLK0_PERIOD : simul_clk
FCLK1_PERIOD : simul_clk
fdly : idelay_fine_pipe , odelay_fine_pipe
fdly_pre : idelay_fine_pipe , odelay_fine_pipe
fdo : focus_sharp393
fdo_minus_max : focus_sharp393
fetch_chead_r : ahci_fis_transmit
fetch_chead_stb_r : ahci_fis_transmit
FETCH_CMD : action_decoder
fetch_cmd : ahci_fis_transmit , ahci_fsm
fetch_cmd_busy_r : ahci_fis_transmit
few_write : cmd_encod_linear_wr
ffclk0 : clocks393 , clocks393m , simul_clk
FFCLK0_CAPACITANCE : clocks393 , clocks393m
FFCLK0_DIFF_TERM : clocks393 , clocks393m
FFCLK0_IBUF_LOW_PWR : clocks393 , clocks393m
FFCLK0_IOSTANDARD : clocks393 , clocks393m
ffclk0_rst : clocks393 , clocks393m
ffclk0_w : simul_clk
ffclk0n : x393 , x393_dut
ffclk0n_pad : clocks393 , clocks393m
ffclk0p : x393 , x393_dut
ffclk0p_pad : clocks393 , clocks393m
ffclk1 : clocks393 , clocks393m , simul_clk
FFCLK1_CAPACITANCE : clocks393 , clocks393m
FFCLK1_DIFF_TERM : clocks393 , clocks393m
FFCLK1_IBUF_LOW_PWR : clocks393 , clocks393m
FFCLK1_IOSTANDARD : clocks393 , clocks393m
ffclk1_rst : clocks393 , clocks393m
ffclk1_w : simul_clk
ffclk1n : x393 , x393_dut
ffclk1n_pad : clocks393 , clocks393m
ffclk1p : x393 , x393_dut
ffclk1p_pad : clocks393 , clocks393m
fifo : resync_fifo_nonsynt , simul_axi_fifo , simul_fifo
fifo0_out : status_router2
fifo0_ram : ahci_dma_wr_fifo
fifo1_out : status_router2
fifo1_ram : ahci_dma_wr_fifo
fifo_1cycle : status_router2
fifo_2regs : cmd_encod_tiled_32_rd , cmd_encod_tiled_32_wr , cmd_encod_tiled_rd , cmd_encod_tiled_wr
fifo_4x16_ram : buf_xclk_mclk16_393
fifo_addr_we_d : simul_axi_hp_wr , simul_saxi_gp_wr
FIFO_ADDR_WIDTH : ahci_sata_layers
fifo_byte_pntr : bit_stuffer_escape
fifo_count : cmprs_out_fifo , cmprs_out_fifo32 , compressor393 , jp_channel
fifo_count0 : cmprs_afi_mux
fifo_count0_m1 : cmprs_afi_mux
fifo_count1 : cmprs_afi_mux
fifo_count1_m1 : cmprs_afi_mux
fifo_count2 : cmprs_afi_mux
fifo_count2_m1 : cmprs_afi_mux
fifo_count3 : cmprs_afi_mux
fifo_count3_m1 : cmprs_afi_mux
fifo_cross_clocks : axi_ahci_regs , cmd_mux , sensor_fifo
fifo_data_rd : simul_axi_hp_rd
fifo_data_we_d : simul_axi_hp_wr , simul_saxi_gp_wr
fifo_dav : ahci_dma_rd_fifo , ahci_dma_wr_fifo , par12_hispi_psp4l
fifo_dav2 : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_dav2_w : ahci_dma_rd_fifo
FIFO_DEPTH : elastic1632 , par12_hispi_psp4l , simul_axi_fifo , simul_fifo
fifo_di : ahci_dma_rd_fifo , par12_hispi_psp4l
fifo_di_vld : ahci_dma_rd_fifo
fifo_do : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_do_prev : ahci_dma_wr_fifo
fifo_do_r : ahci_dma_rd_fifo
fifo_do_vld : ahci_dma_rd_fifo
fifo_do_vld_r : ahci_dma_rd_fifo
fifo_eof : compressor393 , jp_channel
fifo_ff : bit_stuffer_escape
fifo_ff_barrel_w : bit_stuffer_escape
fifo_fill : sensor_i2c
fifo_flush : cmprs_afi_mux , compressor393 , jp_channel
fifo_flush0 : cmprs_afi_mux
fifo_flush1 : cmprs_afi_mux
fifo_flush2 : cmprs_afi_mux
fifo_flush3 : cmprs_afi_mux
fifo_flush_d : cmprs_afi_mux
fifo_full : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_full2 : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_half_empty : cmd_mux
fifo_half_full : histogram_saxi , mult_saxi_wr , mult_saxi_wr_chn , status_router2
fifo_half_hclk : ahci_dma_rd_fifo
fifo_half_mclk : ahci_dma_wr_fifo
fifo_in_rdy : simul_axi_read
fifo_last_byte : status_router2
FIFO_LOGDEPTH : par12_hispi_psp4l
fifo_nempty : ahci_dma_rd_fifo , ahci_dma_wr_fifo , bit_stuffer_escape , cmd_mux , histogram_saxi , mult_saxi_wr , status_router2
fifo_nempty_barrel_w : bit_stuffer_escape
fifo_nempty_mclk : ahci_dma , ahci_dma_wr_fifo
fifo_nempty_pre : status_router2
fifo_o : huff_fifo393 , huffman393
fifo_or_full : huffman393 , huffman_snglclk
fifo_out : bit_stuffer_escape , huffman_snglclk , par12_hispi_psp4l , sens_hispi12l4
fifo_out_barrel_w : bit_stuffer_escape
fifo_out_dly : sens_hispi12l4
fifo_out_dly_mclk : sens_hispi12l4
fifo_out_ready : ahci_dma_wr_fifo
fifo_pre_out : bit_stuffer_escape
fifo_ra : par12_hispi_psp4l
fifo_ram : ahci_dma_rd_fifo , elastic1632 , par12_hispi_psp4l , sens_hispi_fifo , timestamp_fifo
fifo_rd : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_rd_r : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_rdata : compressor393 , jp_channel
fifo_rdata0 : cmprs_afi_mux
fifo_rdata1 : cmprs_afi_mux
fifo_rdata2 : cmprs_afi_mux
fifo_rdata3 : cmprs_afi_mux
fifo_rdy : huffman_snglclk
fifo_re : bit_stuffer_escape , histogram_saxi , huffman_snglclk , mult_saxi_wr , sens_hispi12l4 , status_router2
fifo_re_mask_w : bit_stuffer_escape
fifo_re_r : huffman_snglclk , sens_hispi12l4
fifo_ren : cmprs_afi_mux , compressor393 , jp_channel
fifo_ren0 : cmprs_afi_mux
fifo_ren1 : cmprs_afi_mux
fifo_ren2 : cmprs_afi_mux
fifo_ren3 : cmprs_afi_mux
fifo_rst : compressor393 , jp_channel
fifo_rst0 : cmprs_afi_mux
fifo_rst1 : cmprs_afi_mux
fifo_rst2 : cmprs_afi_mux
fifo_rst3 : cmprs_afi_mux
fifo_same_clock : axibram_read , axibram_write , bit_stuffer_escape , histogram_saxi , huffman_snglclk , mcntrl_ps_pio , mult_saxi_wr , sensor_i2c , status_router2
fifo_same_clock_fill : simul_axi_hp_rd , simul_axi_hp_wr , simul_saxi_gp_wr
fifo_sameclock_control : ahci_sata_layers
fifo_stable : gtx_elastic
FIFO_TYPE : status_router2
fifo_valid : simul_axi_read
fifo_wa : par12_hispi_psp4l
fifo_wd_rd : simul_axi_hp_wr , simul_saxi_gp_wr
fifo_wd_rd_dly : simul_axi_hp_wr , simul_saxi_gp_wr
fifo_we : par12_hispi_psp4l
fifo_with_requested : simul_axi_hp_rd
fifo_wr : ahci_dma_rd_fifo , ahci_dma_wr_fifo
fifo_wr_pointers_next : sensor_i2c
fifo_wr_pointers_outr : cmd_frame_sequencer , sensor_i2c
fifo_wr_pointers_outr_r : cmd_frame_sequencer , sensor_i2c
fifo_wr_pointers_outw : cmd_frame_sequencer , sensor_i2c
fifo_wr_pointers_outw_r : cmd_frame_sequencer , sensor_i2c
fifo_wr_pointers_ram : cmd_frame_sequencer , sensor_i2c
fill : elastic1632 , fifo_1cycle , fifo_same_clock , fifo_same_clock_fill
fill_1 : elastic1632
fill_in : fifo_sameclock_control
fill_out : elastic1632
fill_out_less : elastic1632
fill_out_more : elastic1632
fill_ram : fifo_sameclock_control
filt_sel : focus_sharp393
filt_sel0 : focus_sharp393
finish2 : focus_sharp393
finish_dcc : dcc_sync393 , jp_channel
first : cmprs_buf_average , focus_sharp393 , lens_flat393_line
first_addr : status_generate_extra
first_after_pause : dct_chen_transpose
first_block_color : jp_channel
first_block_color_after : jp_channel
first_block_dct : jp_channel
first_block_quant : jp_channel
first_blocki : encoderDCAC393
first_blockz : encoderDCAC393
first_burst : histogram_saxi
first_busy : cmprs_afi_mux
first_byte_in_field : nmea_decoder393
first_col : cmd_encod_tiled_32_rd , cmd_encod_tiled_32_wr , cmd_encod_tiled_rd , cmd_encod_tiled_wr , cmprs_pixel_buf_iface
first_confirm : gtx_wrap
first_cyc : sensor_i2c_scl_sda
first_d : lens_flat393_line
first_in : cmprs_tile_mode2_decode , quantizer393
first_in_macro : focus_sharp393
first_interm : quantizer393
first_mask : status_generate_extra
first_mb : cmprs_macroblock_buf_iface , cmprs_tile_mode2_decode , jp_channel
first_mb_in : cmprs_buf_average , cmprs_tile_mode2_decode
first_mem_re : sensor_i2c_prot
first_out : quantizer393
first_period : dct1d_chen_reorder_in
first_prd_fetch : ahci_dma
first_prepare : imu_spi393
first_prepare_d : imu_spi393
first_re : mult_saxi_wr , mult_saxi_wr_chn
first_stb : quantizer393
first_wr_in_frame : frame_num_sync
firsti : focus_sharp393
FIS_ANY : condition_mux
FIS_DATA : condition_mux
fis_data : datascope_timing
fis_data_out : ahci_fis_transmit
fis_data_type : ahci_fis_transmit
fis_data_valid : ahci_fis_transmit
fis_dcount : ahci_fis_receive
fis_dw_first : ahci_fis_transmit
fis_dw_last : ahci_fis_transmit
fis_end : datascope_timing
fis_end_r : ahci_fis_receive
fis_end_w : ahci_fis_receive
fis_err : ahci_fis_receive , ahci_fsm
FIS_ERR : condition_mux
fis_extra : ahci_fis_receive , ahci_fsm
FIS_EXTRA : condition_mux
fis_extra_r : ahci_fis_receive
fis_ferr : ahci_fis_receive , ahci_fsm
FIS_FERR : condition_mux
FIS_FIRST_FLUSH : action_decoder
fis_first_flush : ahci_fis_receive , ahci_fsm
fis_first_flushing_r : ahci_fis_receive
fis_first_invalid : ahci_fis_receive , ahci_fsm
FIS_FIRST_INVALID : condition_mux
fis_first_invalid_r : ahci_fis_receive
fis_first_vld : ahci_fis_receive , ahci_fsm
fis_i : ahci_fis_receive , ahci_fsm , ahci_top
FIS_I : condition_mux
fis_left : datascope_timing
FIS_LEN : datascope_timing
fis_len : datascope_timing
fis_ok : ahci_fis_receive , ahci_fsm
FIS_OK : condition_mux
fis_over_r : ahci_sata_layers
fis_rec_run : ahci_fis_receive
fis_run : datascope_timing
fis_run_d : datascope_timing
fis_save : ahci_fis_receive
fis_start : datascope_timing
fis_type : ahci_fsm
fis_types.vh : ahci_fsm
fis_we : datascope_timing
FIXED_PRIORITY : round_robin
flush : bit_stuffer_metadata , huffman393 , huffman_snglclk , stuffer393
flush_clk : huffman393 , huffman_snglclk , huffman_stuffer_meta
flush_end : stuffer393
flush_end_delayed : stuffer393
flush_fifo : cmprs_out_fifo , cmprs_out_fifo32
flush_fifo_r : cmprs_out_fifo , cmprs_out_fifo32
flush_hclk : ahci_dma_wr_fifo , compressor393 , jp_channel
flush_in : bit_stuffer_27_32 , bit_stuffer_escape
flush_mclk : ahci_dma_wr_fifo
flush_now : stuffer393
flush_out : bit_stuffer_27_32 , bit_stuffer_escape
flush_pend : bit_stuffer_escape
flush_r : huffman_snglclk
flush_stage : bit_stuffer_27_32
flushed : ahci_dma_rd_stuff
flushing : ahci_dma_rd_stuff , ahci_dma_wr_fifo , stuffer393
flushing_fifo : cmprs_status
flushing_hclk : ahci_dma_rd_fifo
flushing_mclk : ahci_dma_rd_fifo
focus_do : jp_channel
focus_ds : jp_channel
focus_filt.dat.vh : focus_sharp393
focus_sharp393 : jp_channel
force_flush : bit_stuffer_metadata , stuffer393
force_flush_long : cmprs_frame_sync , jp_channel
force_offline_r : oob_ctrl
force_senspgm : sens_10398 , sens_parallel12
format_byte : nmea_decoder393
format_data : nmea_decoder393
format_field : nmea_decoder393
format_length : nmea_decoder393
format_length_plus_7 : nmea_decoder393
format_mclk : cmprs_cmd_decode
format_over : nmea_decoder393
format_ram : nmea_decoder393
format_we : cmprs_cmd_decode
format_we_r : cmprs_cmd_decode
format_we_xclk : cmprs_cmd_decode
format_xclk : cmprs_cmd_decode
four : gtxe2_chnl_tx_8x10enc
four_blocks : cmprs_buf_average , cmprs_cmd_decode , cmprs_tile_mode2_decode
four_blocks_rd : cmprs_buf_average
fp : ahci_dma_wr_fifo
FPGA_VERSION : status_read
fpga_version.vh : x393
FR_D2HR : condition_mux
FRAC_DELAY : sim_frac_clk_delay
frac_period : sim_frac_clk_delay
fradv_clk : stuffer393
frame0 : histogram_saxi
frame1 : histogram_saxi
frame2 : histogram_saxi
frame3 : histogram_saxi
frame_ack : link
frame_active : sens_histogram , sens_histogram_snglclk
FRAME_BITS_KEEP : frame_num_sync
frame_busy : link
frame_busy_chn1 : mcntrl393_test01
frame_busy_chn2 : mcntrl393_test01
frame_busy_chn3 : mcntrl393_test01
frame_busy_chn4 : mcntrl393_test01
frame_done : cmprs_frame_sync , link , mcntrl_linear_rw , mcntrl_tiled_rw , membridge
frame_done_bad : link
frame_done_chn : membridge
frame_done_chn1 : mcntrl393 , mcntrl393_test01 , x393
frame_done_chn2 : mcntrl393 , mcntrl393_test01 , x393
frame_done_chn3 : mcntrl393 , mcntrl393_test01 , x393
frame_done_chn4 : mcntrl393 , mcntrl393_test01 , x393
frame_done_dst : compressor393 , jp_channel
frame_done_good : link
frame_done_r : mcntrl_linear_rw , mcntrl_tiled_rw
frame_done_src : cmprs_frame_sync , compressor393 , jp_channel
frame_en : cmprs_buf_average , cmprs_macroblock_buf_iface , cmprs_pixel_buf_iface , csconvert , jp_channel , mcntrl_linear_rw , mcntrl_tiled_rw
frame_en_r : cmprs_macroblock_buf_iface
frame_en_w : cmprs_macroblock_buf_iface
frame_finished : mcntrl_linear_rw , mcntrl_tiled_rw
frame_finished_chn1 : mcntrl393_test01
frame_finished_chn2 : mcntrl393_test01
frame_finished_chn3 : mcntrl393_test01
frame_finished_chn4 : mcntrl393_test01
frame_finished_r : mcntrl_linear_rw , mcntrl_tiled_rw
frame_full_width : mcntrl_linear_rw , mcntrl_tiled_rw
frame_full_width_r : mcntrl_linear_rw , mcntrl_tiled_rw
frame_go : cmprs_macroblock_buf_iface , jp_channel
FRAME_HEIGHT_BITS : cmprs_frame_sync , compressor393 , jp_channel , mcntrl393 , mcntrl393_test01 , mcntrl_linear_rw , mcntrl_tiled_rw , membridge
frame_irq : cmprs_status
frame_may_start : cmprs_macroblock_buf_iface
frame_no : cmd_frame_sequencer
frame_num : sensor_i2c , sensors393 , x393
frame_num0 : cmd_seq_mux , sensors393
frame_num1 : cmd_seq_mux , sensors393
frame_num2 : cmd_seq_mux , sensors393
frame_num3 : cmd_seq_mux , sensors393
frame_num_compressed : cmprs_status , compressor393 , jp_channel , x393
frame_num_seq : sensor_channel , sensor_i2c , sensor_i2c_io
frame_num_sync : x393
frame_number : cmprs_frame_sync , mcntrl_linear_rw , mcntrl_tiled_rw
frame_number_chn2 : mcntrl393
frame_number_chn3 : mcntrl393
frame_number_chn4 : mcntrl393
frame_number_cntr : mcntrl_linear_rw , mcntrl_tiled_rw
frame_number_current : mcntrl_linear_rw , mcntrl_tiled_rw
frame_number_dst : compressor393 , jp_channel
frame_number_finished : compressor393 , jp_channel
frame_number_src : cmprs_frame_sync , compressor393 , jp_channel
frame_number_started : jp_channel
frame_pre_run : cmprs_macroblock_buf_iface
frame_pre_start_r : cmprs_macroblock_buf_iface
frame_pre_start_w : cmprs_macroblock_buf_iface
frame_r : histogram_saxi
frame_rej : link
frame_rej_r : link
frame_rej_w : link
frame_req : link
frame_run : mcntrl_linear_rw , sens_gamma
frame_run_mclk : sensor_membuf , sensors393
frame_run_pclk : sensor_membuf
frame_size : mcntrl_linear_rw , mcntrl_tiled_rw
frame_start : cmprs_cmd_decode , mcntrl_linear_rw , mcntrl_tiled_rw
frame_start_chn : membridge
frame_start_chn1 : mcntrl393 , mcntrl393_test01 , x393
frame_start_chn1_r : mcntrl393_test01
frame_start_chn2 : mcntrl393 , mcntrl393_test01 , x393
frame_start_chn2_r : mcntrl393_test01
frame_start_chn3 : mcntrl393 , mcntrl393_test01 , x393
frame_start_chn3_r : mcntrl393_test01
frame_start_chn4 : mcntrl393 , mcntrl393_test01 , x393
frame_start_chn4_r : mcntrl393_test01
frame_start_delayed : mcntrl_linear_rw
frame_start_dst : cmprs_frame_sync , compressor393 , jp_channel
frame_start_dst_r : cmprs_frame_sync
frame_start_mod : mcntrl_linear_rw
frame_start_pending : mcntrl_linear_rw
frame_start_pending_long : mcntrl_linear_rw
frame_start_r : mcntrl_linear_rw , mcntrl_tiled_rw
frame_start_xclk : cmprs_cmd_decode , cmprs_macroblock_buf_iface , jp_channel
frame_started : cmprs_frame_sync
frame_started_mclk : cmprs_frame_sync , jp_channel
frame_sync : camsync393 , cmd_frame_sequencer , sensor_i2c , sensor_i2c_io , timing393
frame_w : histogram_saxi
FRAME_WBP1 : mcntrl393
FRAME_WIDTH_BITS : cmd_encod_tiled_32_rd , cmd_encod_tiled_32_rw , cmd_encod_tiled_32_wr , cmd_encod_tiled_mux , cmd_encod_tiled_rd , cmd_encod_tiled_rw , cmd_encod_tiled_wr , mcntrl393 , mcntrl_linear_rw , mcntrl_tiled_rw
frame_x : mcntrl_linear_rw , mcntrl_tiled_rw
frame_y : mcntrl_linear_rw , mcntrl_tiled_rw
frame_y8_r : mcntrl_linear_rw , mcntrl_tiled_rw
frames_differ : cmprs_frame_sync
frames_numbers_differ : cmprs_frame_sync
frames_open : par12_hispi_psp4l
frames_ram0 : frame_num_sync
frames_ram1 : frame_num_sync
frames_ram2 : frame_num_sync
frames_ram3 : frame_num_sync
frcv_busy : ahci_top
frcv_clear_bsy_drq : ahci_top
frcv_clear_bsy_set_drq : ahci_top
frcv_clear_xfer_cntr : ahci_top
frcv_decr_dwcr : ahci_top
frcv_decr_dwcw : ahci_top
frcv_done : ahci_top
frcv_err : ahci_top
frcv_extra : ahci_top
frcv_ferr : ahci_top
frcv_first_flush : ahci_top
frcv_first_invalid : ahci_top
frcv_first_vld : ahci_top
frcv_get_data_fis : ahci_top
frcv_get_dsfis : ahci_top
frcv_get_ignore : ahci_top
frcv_get_psfis : ahci_top
frcv_get_rfis : ahci_top
frcv_get_sdbfis : ahci_top
frcv_get_ufis : ahci_top
frcv_ok : ahci_top
frcv_set_bsy : ahci_top
frcv_set_sts_7f : ahci_top
frcv_set_sts_80 : ahci_top
frcv_set_update_sig : ahci_top
frcv_update_err_sts : ahci_top
frcv_update_pio : ahci_top
frcv_update_prdbc : ahci_top
frcv_update_sig : ahci_top
freq_meter : ahci_sata_layers
FREQ_METER_WIDTH : ahci_sata_layers , ahci_top , sata_ahci_top
frseq_ackn : x393
frseq_im : x393
frseq_irq : x393
frseq_is : x393
frseq_valid : x393
frseq_waddr : x393
frseq_wdata : x393
frst : x393
frsync_chn0 : camsync393 , timing393
frsync_chn1 : camsync393 , timing393
frsync_chn2 : camsync393 , timing393
frsync_chn3 : camsync393 , timing393
fsm_act_busy : ahci_fsm
fsm_act_done : ahci_fsm
fsm_act_done_w : ahci_fsm
fsm_act_pre_done : ahci_fsm
fsm_actions : ahci_fsm
fsm_jump : ahci_fsm
fsm_last_act_w : ahci_fsm
fsm_next : ahci_fsm
fsm_pgm_ad : ahci_top
fsm_pgm_wa : ahci_top
fsm_pgm_wd : ahci_top
fsm_pre_act_w : ahci_fsm
fsm_preload : ahci_fsm
fsm_transitions : ahci_fsm
fsm_transitions_w : ahci_fsm
fsm_wait_act_w : ahci_fsm
fsnd_atapi_xmit : ahci_top
fsnd_cfis_xmit : ahci_top
fsnd_ch_a : ahci_top
fsnd_ch_b : ahci_top
fsnd_ch_c : ahci_top
fsnd_ch_p : ahci_top
fsnd_ch_r : ahci_top
fsnd_ch_w : ahci_top
fsnd_clearCmdToIssue : ahci_top
fsnd_done : ahci_top
fsnd_dx_err : ahci_top
fsnd_dx_xmit : ahci_top
fsnd_fetch_cmd : ahci_top
fsnd_pCmdToIssue : ahci_top
FTS_DESKEW_SEQ_ENABLE : gtxe2_channel_wrapper , GTXE2_GPL
FTS_LANE_DESKEW_CFG : gtxe2_channel_wrapper , GTXE2_GPL
FTS_LANE_DESKEW_EN : gtxe2_channel_wrapper , GTXE2_GPL
full : elastic1632 , gtx_elastic
full_0 : elastic1632
full_1 : elastic1632
FULL_ADDR_NUMBER : cmd_encod_tiled_32_rd , cmd_encod_tiled_32_wr , cmd_encod_tiled_rd , cmd_encod_tiled_wr
full_cmd : cmd_encod_linear_rd , cmd_encod_linear_wr , cmd_encod_tiled_32_rd , cmd_encod_tiled_32_wr , cmd_encod_tiled_rd , cmd_encod_tiled_wr
FULL_HEIGHT : par12_hispi_psp4l , x393_dut
full_in : fifo_2regs
full_out : fifo_2regs
full_r : cmd_seq_mux
FULL_WIDTH : x393_dut
full_wr : gtxe2_chnl_rx_dataiface , gtxe2_chnl_rx_des , gtxe2_chnl_tx_dataiface , gtxe2_chnl_tx_ser , resync_fifo_nonsynt
fword_strobe : gtx_elastic
fword_strobe_correction : gtx_elastic
FXY : lens_flat393
FY : lens_flat393