- o -

• O : ibuf_ibufg , ibufds_ibufgds , ibufds_ibufgds_50 , ibufg , IBUFG , ibufgds , IBUFGDS , iobuf , mpullup , obuf
• o : obufds , select_clk_buf
• ob : obufds
• OBUF : obuf
• obuf : phy_top , sens_10398
• OBUFDS : obufds
• OBUFT : cmda_single , oddr_ss
• OBUFTDS : oddr_ds
• oc : focus_sharp393
• oclk : iserdes_mem , par12_hispi_psp4l
• oclk_div : iserdes_mem
• odbuf0_ram : imu_message393 , imu_spi393 , nmea_decoder393
• odbuf0_ram_out : imu_message393
• odbuf1_ram : nmea_decoder393
• odbuf2_ram : nmea_decoder393
• odbuf3_ram : nmea_decoder393
• odd : sens_hist_ram_snglclk_18 , sens_hist_ram_snglclk_32
• odd_line : csconvert18a
• odd_pix : csconvert18a , sens_histogram_snglclk
• ODDR : oddr , oddr_ds , oddr_ss
• oddr_ds : phy_top
• oddr_ss : sens_parallel12
• odelay_fine_pipe : cmda_single , dm_single , dq_single , dqs_single , dqs_single_nofine
• ODELAY_VALUE : cmda_single , dm_single , dq_single , dqs_single , dqs_single_nofine
• ODELAYE2 : odelay_pipe
• ODELAYE2_FINEDELAY : odelay_fine_pipe
• OE : simul_sensor12bits
• OFFSET : elastic1632 , gtx_elastic
• offset_less : gtx_elastic
• offset_more_on_1 : gtx_elastic
• offset_more_on_2 : gtx_elastic
• OFST : simul_sensor12bits
• olen3 : huffman_merge_code_literal
• oob : oob_ctrl
• oob_busy : oob , oob_ctrl
• oob_ctrl : sata_phy
• oob_data : gtxe2_chnl_tx
• oob_dev : sata_phy_dev
• oob_done : oob , oob_ctrl
• oob_error : oob , oob_ctrl
• oob_incompatible : oob , oob_ctrl
• oob_silence : oob , oob_ctrl
• oob_start : oob , oob_ctrl
• oob_state : oob_ctrl
• oob_val : gtxe2_chnl_tx
• opmode : dsp_addsub_simd , dsp_ma , dsp_ma_preadd
• ored_subwindow : gtx_comma_align
• ored_subwindow_comdet : gtx_comma_align
• orst : par12_hispi_psp4l
• orst_r : par12_hispi_psp4l
• oserdes_mem : cmda_single , dm_single , dq_single , dqs_single , dqs_single_nofine
• OSERDESE2 : oserdes_mem
• other_control : gtx_wrap
• other_prim_r : link
• out : pri1hot16
• out_address : simul_axi_fifo , simul_fifo
• out_bits : huffman393 , huffman_merge_code_literal
• out_burst : mult_saxi_wr_inbuf
• out_busy : mult_saxi_wr_chn
• out_count : simul_axi_fifo
• out_data : camsync393
• out_dly : sens_hispi_fifo
• out_full : fifo_same_clock , fifo_same_clock_fill
• out_half_period : simul_clk_mult
• out_inc : simul_axi_fifo
• out_len : huffman393 , huffman_merge_code_literal
• out_mono : focus_sharp393
• out_pulse : elastic_cross_clock , multipulse_cross_clock , pulse_cross_clock
• out_reg : pulse_cross_clock
• out_valid : huffman_merge_code_literal
• OUT_WIDTH : dct1d_chen
• out_window : focus_sharp393
• OUTA_WIDTH : mult_saxi_wr_inbuf
• outclk : gtxe2_chnl_rx_des , gtxe2_chnl_tx_ser
• outdata : gtx_10x8dec , gtx_8x10enc , gtx_comma_align , gtx_elastic , gtxe2_chnl_rx_10x8dec , gtxe2_chnl_rx_align , gtxe2_chnl_rx_dataiface , gtxe2_chnl_rx_des , gtxe2_chnl_tx_dataiface , gtxe2_chnl_tx_oob , gtxe2_chnl_tx_ser
• outdata_dec : gtxe2_chnl_rx_10x8dec
• outdata_l : gtx_8x10enc
• outdata_neg : gtxe2_chnl_tx_oob
• outdata_pos : gtxe2_chnl_tx_oob
• outisk : gtx_10x8dec , gtxe2_chnl_rx_dataiface , gtxe2_chnl_tx_dataiface
• output_mask : camsync393
• OUTPUT_WIDTH : dct2d8x8_chen
• outram : gtx_elastic
• OUTREFCLK_SEL_INV : gtxe2_channel_wrapper , GTXE2_GPL
• outreg : fifo_same_clock , fifo_same_clock_fill
• outsync : camsync393
• outval : gtxe2_chnl_tx_oob
• outw_cntr : mult_saxi_wr_inbuf
• OUTW_CNTR_WIDTH : mult_saxi_wr_inbuf
• over : ddr_refresh , fifo_same_clock_fill , fifo_sameclock_control
• overdue : sens_sync
• owidth : gtxe2_chnl_rx_10x8dec , gtxe2_chnl_tx_8x10enc
• oword : gtxe2_chnl_tx_8x10enc