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Defines | |
| #define | FPGACONF_IOCTYPE 129 |
| #define | FPGACONF_READREG 140 |
| #define | FPGACONF_WRITEREG 141 |
| #define | FPGACONF_READREG_L 142 |
| #define | FPGACONF_READREG_H 143 |
| #define | FPGACONF_READREG4 144 |
| #define | FPGACONF_WRITEREG4 145 |
| #define | FPGACONF_READREG_L4 146 |
| #define | FPGACONF_READREG_H4 147 |
| #define | FPGACONF_GETSTATE 148 |
| #define | FPGACONF_RD_WAITSTATES 150 |
| #define | FPGACONF_WR_WAITSTATES 151 |
| #define | FPGACONF_START_CAPTURE 152 |
| #define | FPGACONF_READ_CAPTURE 153 |
| #define | FPGACONF_CANON_IOBYTE 154 |
| #define | FPGA_STATE_LOADED 0x0000FFFF |
| #define | FPGA_STATE_CLOCKS 0x000F0000 |
| #define | FPGA_STATE_INITIALIZED 0x00F00000 |
| #define | FPGA_STATE_SDRAM_INIT 0x00100000 |
| #define | FPGACONF_CONTROL_REG 155 |
| #define | FPGACONF_CR_MODIFY 0x0e |
| #define | FPGACONF_CR_SHADOW 0x0f |
| #define | FPGACONF_CR_SHADOW1 0x10 |
| #define | I2C_WRITEARG(bus, slave, reg, value) (((bus) << 24) | ((slave) << 16) | ((reg) << 8) | (value)) |
| #define | I2C_READARG(bus, slave, reg) (((bus) << 24) | ((slave) << 16) | ((reg) << 8)) |
| #define | I2C_ARGBUS(arg) (((arg) >> 24) & 0x1) |
| #define | I2C_ARGSLAVE(arg) (((arg) >> 16) & 0xff) |
| #define | I2C_ARGREG(arg) (((arg) >> 8) & 0xff) |
| #define | I2C_ARGVALUE(arg) ((arg) & 0xff) |
| #define | I2C_WRITEREG 0x1 |
| #define | I2C_READREG 0x2 |
| #define | FPGA_PGM 0x3 |
| #define | FPGA_STAT 0x4 |
| #define | FPGA_JTAG 0x5 |
| #define | FPGA_PA_RD 0x6 |
| #define | FPGA_PA_WR 0x7 |
| #define | FPGA_JTAG_ARG(tms, len, d) (((tms) << 11) | ((len) << 8) | ((d) & 0xff)) |
| #define | FPGA_JTAG_TMS(arg) ((arg >> 11) & 1) |
| #define | FPGA_JTAG_LEN(arg) ((arg >> 8) & 7) |
| #define | FPGA_JTAG_DW(arg) ( arg & 0xff) |
| #define | _FCCMD(x, y) (_IO(FPGACONF_IOCTYPE, (x << 6) | (y & 0x3f))) |
| #define | ERR_I2C_SCL_ST0 1 |
| #define | ERR_I2C_SDA_ST0 2 |
| #define | ERR_I2C_SCL_ST1 4 |
| #define | ERR_I2C_SDA_ST1 8 |
| #define | ERR_I2C_SCL_NOPULLUP 16 |
| #define | ERR_I2C_SDA_NOPULLUP 32 |
| #define | ERR_I2C_NOTDETECTED 64 |
| #define | ERR_I2C_SHORT 128 |
| #define | ERR_I2C_BSY 256 |
| #define | ERR_I2C_NACK 512 |
| #define | IO_CSP0R0 0x10 |
| #define | IO_CSP0W0 0x20 |
| #define | IO_CSP0R(a) (IO_CSP0R0 + a) |
| #define | IO_CSP0W(a) (IO_CSP0W0 + a) |
| #define | IO_CSP0_R 1 |
| #define | IO_CSP0_W 2 |
Definition at line 76 of file fpgaconfa.h.
| #define ERR_I2C_BSY 256 |
Definition at line 90 of file fpgaconfa.h.
| #define ERR_I2C_NACK 512 |
Definition at line 91 of file fpgaconfa.h.
| #define ERR_I2C_NOTDETECTED 64 |
Definition at line 88 of file fpgaconfa.h.
| #define ERR_I2C_SCL_NOPULLUP 16 |
Definition at line 85 of file fpgaconfa.h.
| #define ERR_I2C_SCL_ST0 1 |
Definition at line 81 of file fpgaconfa.h.
| #define ERR_I2C_SCL_ST1 4 |
Definition at line 83 of file fpgaconfa.h.
| #define ERR_I2C_SDA_NOPULLUP 32 |
Definition at line 86 of file fpgaconfa.h.
| #define ERR_I2C_SDA_ST0 2 |
Definition at line 82 of file fpgaconfa.h.
| #define ERR_I2C_SDA_ST1 8 |
Definition at line 84 of file fpgaconfa.h.
| #define ERR_I2C_SHORT 128 |
Definition at line 89 of file fpgaconfa.h.
| #define FPGA_JTAG 0x5 |
| #define FPGA_JTAG_DW | ( | arg | ) | ( arg & 0xff) |
Definition at line 73 of file fpgaconfa.h.
| #define FPGA_JTAG_LEN | ( | arg | ) | ((arg >> 8) & 7) |
Definition at line 72 of file fpgaconfa.h.
| #define FPGA_JTAG_TMS | ( | arg | ) | ((arg >> 11) & 1) |
Definition at line 71 of file fpgaconfa.h.
| #define FPGA_PA_RD 0x6 |
| #define FPGA_PA_WR 0x7 |
| #define FPGA_PGM 0x3 |
| #define FPGA_STAT 0x4 |
| #define FPGA_STATE_CLOCKS 0x000F0000 |
| #define FPGA_STATE_INITIALIZED 0x00F00000 |
| #define FPGA_STATE_LOADED 0x0000FFFF |
Definition at line 32 of file fpgaconfa.h.
Referenced by fpga_jtag_open(), fpga_open(), and init_FPGA().
| #define FPGA_STATE_SDRAM_INIT 0x00100000 |
Definition at line 35 of file fpgaconfa.h.
Referenced by fpga_initSDRAM(), fpga_jtag_open(), fpga_open(), and fpga_resetSDRAM().
| #define FPGACONF_CANON_IOBYTE 154 |
| #define FPGACONF_CONTROL_REG 155 |
| #define FPGACONF_CR_MODIFY 0x0e |
| #define FPGACONF_CR_SHADOW 0x0f |
| #define FPGACONF_CR_SHADOW1 0x10 |
| #define FPGACONF_GETSTATE 148 |
| #define FPGACONF_IOCTYPE 129 |
| #define FPGACONF_RD_WAITSTATES 150 |
| #define FPGACONF_READ_CAPTURE 153 |
| #define FPGACONF_READREG 140 |
| #define FPGACONF_READREG4 144 |
| #define FPGACONF_READREG_H 143 |
| #define FPGACONF_READREG_H4 147 |
| #define FPGACONF_READREG_L 142 |
| #define FPGACONF_READREG_L4 146 |
| #define FPGACONF_START_CAPTURE 152 |
| #define FPGACONF_WR_WAITSTATES 151 |
| #define FPGACONF_WRITEREG 141 |
| #define FPGACONF_WRITEREG4 145 |
| #define I2C_ARGBUS | ( | arg | ) | (((arg) >> 24) & 0x1) |
Definition at line 50 of file fpgaconfa.h.
| #define I2C_ARGREG | ( | arg | ) | (((arg) >> 8) & 0xff) |
Definition at line 52 of file fpgaconfa.h.
| #define I2C_ARGSLAVE | ( | arg | ) | (((arg) >> 16) & 0xff) |
Definition at line 51 of file fpgaconfa.h.
| #define I2C_ARGVALUE | ( | arg | ) | ((arg) & 0xff) |
Definition at line 53 of file fpgaconfa.h.
Definition at line 48 of file fpgaconfa.h.
| #define I2C_READREG 0x2 |
Definition at line 56 of file fpgaconfa.h.
| #define I2C_WRITEARG | ( | bus, | |||
| slave, | |||||
| reg, | |||||
| value | ) | (((bus) << 24) | ((slave) << 16) | ((reg) << 8) | (value)) |
Definition at line 47 of file fpgaconfa.h.
| #define I2C_WRITEREG 0x1 |
Definition at line 55 of file fpgaconfa.h.
| #define IO_CSP0_R 1 |
Definition at line 101 of file fpgaconfa.h.
| #define IO_CSP0_W 2 |
Definition at line 102 of file fpgaconfa.h.
Definition at line 98 of file fpgaconfa.h.
| #define IO_CSP0R0 0x10 |
Definition at line 95 of file fpgaconfa.h.
Definition at line 99 of file fpgaconfa.h.
| #define IO_CSP0W0 0x20 |
Definition at line 96 of file fpgaconfa.h.
1.5.1