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00113 #include <stdio.h>
00114
00115 #include <sys/socket.h>
00116 #include <netinet/in.h>
00117 #include <sys/types.h>
00118 #include <sys/stat.h>
00119 #include <fcntl.h>
00120
00121 #include <sys/ioctl.h>
00122 #include <fcntl.h>
00123 #include <stdio.h>
00124 #include <stdlib.h>
00125 #include <ctype.h>
00126 #include <errno.h>
00127 #include <unistd.h>
00128 #include <string.h>
00129
00130
00131
00132 #include <asm/elphel/c313a.h>
00133 #include <asm/elphel/autoexp.h>
00134
00135 #include <asm/elphel/fpgaclocks.h>
00136 #include <asm/elphel/fpgaconfa.h>
00137
00138 #define SUPPORTED_IN_72 0
00139
00140
00141
00142 #define X313__RA__STATUS 0x10 // read status register
00143 #define X313_WA_DCM 8 // SDRAM clock phase shift
00144
00145
00146 #define X313_SR__DCM_OVFL 22
00147 #define X313_SR__DCM_LOCKED 21
00148 #define X313_SR__DCM_RDY 20
00149 #define X313_SR__DCM_EARLY 19
00150 #define X313_SR__DCM_LATE 18
00151
00152
00153 #define IS_DCM_OVFL(x) ( x & (1 << X313_SR__DCM_OVFL ))
00154
00155 #define IS_DCM_LOCK(x) ( x & (1 << X313_SR__DCM_LOCKED ))
00156 #define IS_DCM_RDY(x) ( x & (1 << X313_SR__DCM_RDY ))
00157 #define DCM_ERR(x) (( x >> X313_SR__DCM_LATE ) & 3)
00158 #define IS_DCM_GOOD(x) (IS_DCM_LOCK(x) && IS_DCM_RDY(x) && !(IS_DCM_OVFL(x)))
00159
00160
00161
00162
00163
00164
00165
00166
00167
00168
00169
00170
00171
00172
00173
00174
00175
00176
00177 #define CLOCK_LOW 20
00178 #define CLOCK_HIGH 127
00179 #define CY22393_SA 0xd2
00180
00181
00182
00183
00184 static char * usage = "Usage: fpcf \n"
00185 "-lens D - write byte D to lens (print to stdout byte read)\n"
00186 "-capture T [mask] - capture I/O pins for T usec (actually will be longer), return number of captured states, then data\n"
00187 " if mask is specified - AND results with mask, output 2 hex digits if mask> 16, else - 1 digit.\n"
00188 "-histogram - dump histogram\n"
00189 "-phase min max [corr] - adjust optimal readout phase in the range [min,max], min can be negative. Will turn off refresh\n"
00190 " Apply optional correction [corr] (signed decimal) to the calcualted result.\n"
00191 "-dbg B [L [S]] - read out debug data: B - bit position (decimal), L - register length, S - optional preceeding string\n"
00192 "-mem - analyze all memory, expecting pattern of 4 16-bit words (will compare to the previous)\n"
00193 "-mem N - analyze specified number of words (hex) - up to 1000000 expecting pattern of 4 16-bit words\n"
00194 " N will be rounded to the nearest multiple of 4096\n"
00195 "-mem N ptrn0 ptrn1 ptrn2 ptrn3 - write repetitive pattern of 4 16-bit words (hex), read and compare\n"
00196 "-raw L filename - read hex byte data from filename and put it into frame buffer\n"
00197 " L (decimal) - full length of the line, including margins. 132 for a single 128x64 supertile \n"
00198 "-mcu filename - (not used in 333-theora) read hex data and write it to the first MCU(s)\n"
00199 "-table A filename - write quantization/huffman table(s) from file starting att address A(hex word)\n"
00200 "-dma 0 - stop DMA\n"
00201 "-dma 1 - start DMA (descriptors should be filled)\n"
00202 "-dma 2 - start DMA (raw mode). Descriptor array will be built according to current\n"
00203 " acquisition parameters (image size, word size)\n"
00204 "-jpeg 0 - 'reset' JPEG acquire/read pointers\n"
00205
00206 "-jpeg 2 - 'get' acquire JPEG data from current frame in memory\n"
00207 "-jpeg 3 - 'forget' advance JPEG read pointer to the next frame\n"
00208 "-jpeg 5 - acquire and compress one frame\n"
00209 "-jpeg 6 - save read pointer\n"
00210 "-jpeg 7 - restore read pointer\n"
00211 "-jpeg a - start constant compression to buffer\n"
00212 "-jpeg b - stop constant compression to buffer or acquire just one buffer if it wasn't running\n"
00213 "-jpeg c - rebuild the frames chain backwards from the last acquired. Return number of frames\n"
00214 "-jpeg d - stop constant compression to buffer, don't try to acquire! \n"
00215 "-jpeg f - print some debug data on the serial console\n"
00216 "-jctl data - write JPEG control word (+0x10000 - no header)\n"
00217
00218 "-jn data - get specified number of frames (will add to already asked for if any)\n"
00219 "-jl data - get specified length in 32-bit long words (will stop after frame if got more)\n"
00220
00221 "-dr (-drb, -drw, -drl) - get current DMA received data length\n"
00222 "-dr A (-drb A) - read DMA recieved data (bytes) at location A\n"
00223 "-dr A N (-drb A N) - read DMA recieved data (bytes) at locations A through A+N-1\n"
00224 "-drw A - read DMA recieved data (words) at location A\n"
00225 "-drw A N - read DMA recieved data (words) at locations A through A+N-1\n"
00226 "-drl A - read DMA recieved data (long words) at location A\n"
00227 "-drl A N - read DMA recieved data (long words) at locations A through A+N-1\n"
00228 "-sr A - read SDRAM location A\n"
00229 "-sr A N - read SDRAM locations A through A+N-1\n"
00230 "-sw{,8,16,32} A D - write SDRAM location A with data D\n"
00231 "-sw{,8,16,32} A D N - write SDRAM locations A through A+N-1 with data D\n"
00232 "-sw{,8,16,32} A D N INC -write SDRAM locations A through A+N-1 with data D, D+INC, ... D+INC*(N-1)\n"
00233 "-p FILENAME - load FPGA with specified bitstream file\n"
00234 "-button - returns 1 if button is pressed, 0 - otherwise\n"
00235 "-a - read port A input pins\n"
00236 "-t TMS LEN D- send/get JTAG data - TMS=0..1, LEN=0..7 (0==8), D - hex byte\n"
00237 "-a D - write port A input data\n"
00238 "-X N - read current cloclk frequency in MHz (shadow)\n"
00239 "-X N F - program clock output 0,1,2,3 to frequency in MHz (N=3 - only 20MHz), decimal (invisible to driver) - floating pont value\n"
00240 "-x N F - program clock output 0,1 to frequency in MHz (will be visible to driver)\n"
00241 "-s - read fpga/clocks state\n"
00242 "-r REGISTER - read fpga register (0..ff) using CSP0 (fast access)\n"
00243 "-r4 REGISTER - read fpga register (0..ff) using CSP4 (slow access)\n"
00244
00245
00246 "-rl REGISTER - read fpga register (0..ff) low word using CSP0 (fast access)\n"
00247 "-rl4 REGISTER - read fpga register (0..ff) low word using CSP4 (slow access)\n"
00248 "-rh REGISTER - read fpga register (0..ff) high word using CSP0 (fast access)\n"
00249 "-rh4 REGISTER - read fpga register (0..ff) high word using CSP4 (slow access)\n"
00250 "-w REGISTER DATA - write fpga 32-bit register (0..ff) using CSP0 (fast access)\n"
00251 "-w4 REGISTER DATA - write fpga 32-bit register (0..ff) using CSP0 (slow access)\n"
00252 "-rw [1..4] - read R_WAITSTATES\n"
00253 "-ww [1..4] D - write R_WAITSTATES\n"
00254 "-i2cr8 A - read i2c bus 0 at location A (slave address is made of A), 8-bit registers\n"
00255 "-i2cr8 A N - read i2c bus 0 at location A through A+N-1\n"
00256 "-i2cw8 A D - write i2c bus 0 at location A with 8-bit data D\n"
00257 "-i2cr16 A - read i2c bus 0 at location A (slave address is made of A), 16-bit registers\n"
00258 "-i2cr16 A N - read i2c bus 0 at location A through A+N-1\n"
00259 "-i2cw16 A D - write i2c bus 0 at location A with 16-bit data D\n"
00260 "-sr A N - read SDRAM locations A through A+N-1\n"
00261 "-sw{,8,16,32} A D - write SDRAM location A with data D\n"
00262 "-ir SA RA - read i2c register RA from slave SA (hex)\n"\
00263 "-iw SA RA DATA - write i2c register, slave address SA, register RA data DATA (hex)\n"\
00264 "-ir - read all relevant i2c registers from slave 0xd2(0x61)\n"\
00265 "-c - read FPGA command register shadow\n"\
00266 "-c bit(0..1f of CR) op(0 -nop, 1 - clr, 2 - set, 3 - toggle)\n"\
00267 "-gamma filename - write precalculated gamma table\n"\
00268 "-sysmem N [SEED [SIZE]]- allocate N (decimal) of SIZE (hex, default=20000 (128KB)) chunks, fill them with incrementing data starting with SEED (hex), read back" ;
00269 static char * short_usage = "Use fpcf -help for options\n";
00270
00271
00272
00273
00274
00275
00276
00277
00278
00279
00280
00281
00282
00283
00284 int readSDRAMdummy(void) {
00285 int memfd;
00286 int dummy;
00287 int res;
00288 if ((memfd = open("/dev/fsdram", O_RDONLY))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
00289 res=read(memfd,&dummy,4);
00290 close (memfd);
00291 if (res<4) {printf("readSDRAMdummy failed\n"); return -1; }
00292 return 0;
00293 }
00294
00295 int resetSDRAM(void) {
00296 int memfd;
00297 int dummy;
00298 int res;
00299 if ((memfd = open("/dev/fsdram", O_RDONLY))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
00300 lseek(memfd, LSEEK_FSDRAM_RESET, SEEK_END);
00301 close (memfd);
00302 return 0;
00303 }
00304
00305
00306 #define LSEEK_FSDRAM_RESET 0x01 // re-program FSDRAM (to be programmed again when accessed)
00307
00308
00309
00310 void usleepFPGA(int devfd, int dly) {
00311 int t0,t1,t;
00312 ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x47 ));
00313 t0=ioctl(devfd, _IO(FPGACONF_READREG, 0x44 ), 0);
00314 t1=t0+dly;
00315 if (t1>=1000000) t1-=1000000;
00316 t=t0;
00317 if (t1>t0) {
00318 while (t<t1) {
00319 ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x47 ));
00320 t=ioctl(devfd, _IO(FPGACONF_READREG, 0x44 ), 0);
00321 }
00322 } else {
00323 while ((t>t0) || (t<t1)) {
00324 ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x47 ));
00325 t=ioctl(devfd, _IO(FPGACONF_READREG, 0x44 ), 0);
00326 }
00327 }
00328 }
00329
00330 #define FPCF_SDBUFFER_SIZE 0x800
00331 int main (int argc, char *argv[]) {
00332
00333 #if SUPPORTED_IN_72
00334 const unsigned char syncseq[]={0xff,0xff,0xff,0xff,0xaa,0x99,0x55,0x66};
00335 unsigned char charheadbuf[8];
00336 unsigned long fs;
00337 int ifd;
00338 int retr;
00339 unsigned char b,b0;
00340 int testcs=0;
00341 int testnum=0;
00342 int ws;
00343 int gamma_fd;
00344 int autoexp_fd;
00345 #endif
00346
00347 unsigned short usbuf[FPCF_SDBUFFER_SIZE];
00348 unsigned char * usbuf8 = (unsigned char *) usbuf;
00349 unsigned short * usbuf16 = (unsigned short *) usbuf;
00350 unsigned long * usbuf32 = (unsigned long *) usbuf;
00351 int retry,corr;
00352 char * cp;
00353 int i,a;
00354 int j=0;
00355 int n,res;
00356 double f;
00357 int devfd;
00358 int bp=0;
00359 int bq=0;
00360 unsigned long d, sa, ra, rd, ll, nl, nt;
00361 unsigned long uld,uli;
00362 int shft;
00363 int iorw_args=0;
00364 int tables[4096];
00365 unsigned int ptrn[2];
00366 unsigned int ands[2];
00367 unsigned int ors[2];
00368 unsigned short * ands16 = (unsigned short *) ands;
00369 unsigned short * ors16 = (unsigned short *) ors;
00370 unsigned short * ptrn16 = (unsigned short *) ptrn;
00371 int nerr;
00372 int comp_mode;
00373 int seed;
00374 int ** memchunks= (int **) tables;
00375
00376 unsigned char * btables= (unsigned char *) tables;
00377 const int bits_in_byte[]={0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,\
00378 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,\
00379 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,\
00380 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,\
00381 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,\
00382 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,\
00383 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,\
00384 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,\
00385 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,\
00386 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,\
00387 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,\
00388 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,\
00389 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,\
00390 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,\
00391 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,\
00392 4,5,5,6,5,6,6,7,5,6,6,7,6,7,7,8};
00393
00394 char fline[1024];
00395 FILE * tfile;
00396 char * ep;
00397 char fvx[5]="%08x\0";
00398 int mn,mx;
00399 int dqmn=0;
00400 int dqmx=0;
00401 int state;
00402
00403 int capByteOut;
00404 int capByteIn;
00405 int capBitCntr;
00406 int capByteCntr;
00407 int capLastByte;
00408 int capByte;
00409 int capFormat=0;
00410
00411 #ifdef DEBUG_USAGE
00412 FILE * fpcflog;
00413 if ((fpcflog = fopen("/var/log/fpcf.log", "w"))==NULL) {printf("error opening file %s\n","/var/log/fpcf.log"); return -1;}
00414
00415 for (i=0; i<argc;i++) fprintf (fpcflog, " %s", argv[i]);
00416 fclose(fpcflog);
00417 #endif
00418 if (argc<2) {printf(short_usage); return 0;}
00419 if ((strcasecmp(argv[1], "-help")==0) || (strcasecmp(argv[1], "-?")==0)) {
00420 printf(usage);
00421 return 0;
00422 }
00423
00424 if(strcasecmp(argv[1], "-lens") == 0) {
00425 if(argc <3) {
00426 printf("need data to send to the lens\n");
00427 return -1;
00428 }
00429
00430 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00431 for (j=2; j< argc; j++) {
00432 res= ioctl(devfd, _IO(FPGACONF_CANON_IOBYTE, 0 ),(unsigned long) strtoll (argv[j],&cp,16));
00433 tables[j-2]=res;
00434 }
00435 close (devfd);
00436 for (j=2; j< argc; j++) {
00437 printf ("%2x ",tables[j-2]);
00438 }
00439 printf("\n");
00440 return 0;
00441 }
00442
00443
00444 if(strcasecmp(argv[1], "-capture") == 0) {
00445 j=0xff;
00446 if (argc >3) j=strtol (argv[3],&cp,10);
00447 j &= 0xff;
00448 if(argc <3) {
00449 printf("need capture duration (usec)\n");
00450 return -1;
00451
00452 }
00453 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00454 n= ioctl(devfd, _IO(FPGACONF_START_CAPTURE, j ), strtol (argv[2],&cp,10));
00455 printf ("%d\n",n);
00456 for (i=0;i<n;i++) {
00457 if (j<16) printf ("%1x",j & ioctl(devfd, _IO(FPGACONF_READ_CAPTURE, 0 ), 0));
00458 else printf ("%2x",j & ioctl(devfd, _IO(FPGACONF_READ_CAPTURE, 0 ), 0));
00459 }
00460 printf ("\n");
00461 close (devfd);
00462 return 0;
00463 }
00464 if(strcasecmp(argv[1], "-capbytes") == 0) {
00465 if (argc >4) capFormat=strtol (argv[4],&cp,10);
00466 j=0xff;
00467 if (argc >3) j=strtol (argv[3],&cp,10);
00468 j &= 0xff;
00469 if(argc <3) {
00470 printf("need capture duration (usec)\n");
00471 return -1;
00472
00473 }
00474 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00475 n= ioctl(devfd, _IO(FPGACONF_START_CAPTURE, j ), strtol (argv[2],&cp,10));
00476 printf ("%d\n",n);
00477 capByteOut=0;
00478 capByteIn=0;
00479 capBitCntr=0;
00480 capByteCntr=0;
00481 capLastByte=7;
00482 for (i=0;i<n;i++) {
00483 capByte=ioctl(devfd, _IO(FPGACONF_READ_CAPTURE, 0 ), 0);
00484 if (!(capLastByte & 1) && (capByte & 1)) {
00485 capByteOut= (capByteOut << 1) | ((capByte & 4)? 1:0);
00486 capByteIn= (capByteIn << 1) | ((capByte & 2)? 1:0);
00487 capBitCntr++;
00488 if (capBitCntr==8) {
00489 if (capFormat==0) printf (" %2x(%2x)",capByteOut,capByteIn);
00490 else if (capFormat==1) printf ("%2x %2x",capByteOut,capByteIn);
00491 else if (capFormat==2) printf ("%2x %2x\n",capByteOut,capByteIn);
00492 capByteOut=0;
00493 capByteIn=0;
00494 } else if (capBitCntr>8) {
00495 if (capFormat==0) printf (" [%1x/%1x]",capByteOut,capByteIn);
00496 else if (capFormat==1) printf (" [%1x/%1x]\n",capByteOut,capByteIn);
00497 capByteOut=0;
00498 capByteIn=0;
00499 capBitCntr=0;
00500 capByteCntr++;
00501 }
00502 }
00503 capLastByte=capByte;
00504 }
00505 printf ("\n");
00506 printf ("Exchanged %d bytes, %d bits left\n", capByteCntr,capBitCntr);
00507 if (capBitCntr>0) printf ("Left: %2x(%2x)\n",capByteOut,capByteIn);
00508 close (devfd);
00509 return 0;
00510 }
00511
00512 if(strcasecmp(argv[1], "-gamma") == 0) {
00513 printf ("Not supported in 7.2\n");
00514 return -1;
00515 #if SUPPORTED_IN_72
00516 if(argv[2] == NULL) {
00517 printf("need gamma table filename\n");
00518 return -1;
00519 }
00520 if((autoexp_fd = open(AUTOEXP_DEV_NAME, O_RDWR)) < 0) {
00521 printf("failed to open %s\n", AUTOEXP_DEV_NAME);
00522 return -1;
00523 }
00524 if((gamma_fd = open(argv[2], O_RDONLY)) < 0) {
00525 printf("failed to open %s\n", AUTOEXP_DEV_NAME);
00526 return -1;
00527 }
00528 ioctl(autoexp_fd, _IO(IOC_AUTOEXP_GAMMA_TABLE, 0));
00529 while((i = read(gamma_fd, (void *)usbuf, FPCF_SDBUFFER_SIZE)) > 0)
00530 if(write(autoexp_fd, (void *)usbuf, i) < 0) {
00531 printf("error write gamma\r\n");
00532 break;
00533 }
00534 close(gamma_fd);
00535 close(autoexp_fd);
00536 return 0;
00537 #endif
00538 }
00539 if (strcasecmp(argv[1], "-histogram")==0) {
00540 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00541 ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x42 ), 0);
00542 for (i=0; i<4;i++) {
00543 res=0;
00544 for (j=0; j<256; j++) {
00545 n=ioctl(devfd, _IO(FPGACONF_READREG4, 0x43 ), 0);
00546 res+=n;
00547 printf ("%6x",n);
00548 if ((j & 0xf)==0xf) printf("\n");
00549 if ((j & 0xff)==0xff) printf("\n");
00550 }
00551 printf ("total=0x%x (%d)\n",res,res);
00552 }
00553 close (devfd);
00554 return 0;
00555 }
00556 #define DCM_RETRY 100
00557 #define phase_noise_margin 5
00558 if (strcasecmp(argv[1], "-phase")==0) {
00559 if (argc<4) {printf("min and max phase shift(decimal) required\r\n");return -1;}
00560 mn= strtol (argv[2],&cp,10);
00561 mx= strtol (argv[3],&cp,10);
00562 corr=0;
00563 if (argc>4) corr= strtol (argv[4],&cp,10);
00564 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00565
00566 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00567 for (retry=DCM_RETRY;retry>0;retry--) {
00568 a=ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0);
00569 if (IS_DCM_LOCK(a)) break;
00570 }
00571 if (retry <=0) {
00572 printf ("DCM does not lock after being reset (status=%x)\n",a);
00573 close (devfd);
00574 return -1;
00575 }
00576
00577 if (mn <0) {
00578 for (i=0; i>mn;i--) {
00579 for (retry=DCM_RETRY;retry>0;retry--) {
00580 a=ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0);
00581 if (IS_DCM_GOOD (a)) break;
00582 }
00583 if (retry <=0) {
00584 printf ("DCM phase probably reached lower limit (status=%x). Try >%d (instead of %d)\n",a,i,mn);
00585 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00586 close (devfd);
00587 return -2;
00588 }
00589 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 1);
00590 }
00591 } else if (mn>0) {
00592 for (i=0; i<mn;i++) {
00593 for (retry=DCM_RETRY;retry>0;retry--) {
00594 a=ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0);
00595 if (IS_DCM_GOOD (a)) break;
00596 }
00597 if (retry <=0) {
00598 printf ("DCM phase lower limit is probably too high (status=%x). Try <%d (instead of %d)\n",a,i,mn);
00599 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00600 close (devfd);
00601 return -3;
00602 }
00603 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 2);
00604 }
00605 }
00606 #if 0 // What the hell was that???
00607
00608
00609 ra=0x20;
00610 rd=0x15555;
00611 for (i=0;i<2;i++) {
00612 ioctl(devfd, _IO(FPGACONF_WRITEREG, ra ), rd);
00613 if (readSDRAMdummy()<0) {close (devfd); return -1;}
00614 }
00615 #endif
00616
00617 for (i=0; i < ((mx-mn)+1); i++) {
00618 if (i>0) {
00619 for (retry=DCM_RETRY;retry>0;retry--) {
00620 a=ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0);
00621 if (IS_DCM_GOOD (a)) break;
00622 }
00623 if (retry <=0) {
00624 i+=mn;
00625 if (i<0) {
00626 printf ("DCM phase probably reached lower limit (pass2, status=%x). Try >%d (instead of %d)\n",a,i,mn);
00627 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00628 close (devfd);
00629 return -3;
00630 } else {
00631 printf ("DCM phase high limit is probably too high (status=%x). Try <%d (instead of %d)\n",a,i,mx);
00632 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00633 close (devfd);
00634 return -4;
00635 }
00636 }
00637 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 2);
00638 }
00639
00643
00644
00645
00646
00647 resetSDRAM();
00648
00649
00650
00651 if (readSDRAMdummy()<0) {close (devfd); return -1;}
00652 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 0);
00653 if (readSDRAMdummy()<0) {close (devfd); return -1;}
00654
00655 tables[i]=DCM_ERR(ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0));
00656 }
00657
00658 for (i=0; i<((mx-mn)+1); i++) {
00659 printf (" %d",tables[i]);
00660 if ((i & 0xf)==0xf) printf ("\r\n");
00661 }
00662 printf ("\r\n");
00663
00664 state=0;
00665 for (i=0;(i<=(mx-mn)) && (state<3); i++)
00666 switch (state) {
00667 case 0: if (tables[i]==1) state = 1; break;
00668 case 1: if (tables[i]==3) {state = 2; dqmn=mn+i;dqmx=dqmn;}
00669 else if (tables[i]==2) state = 0;
00670 break;
00671 case 2: if (tables[i]==2) state = 3;
00672 else if (tables[i]==1) state = 1;
00673 else dqmx=mn+i;
00674 break;
00675 }
00676 if (state < 2) {close (devfd);printf("failed to find lower margin\n"); return -2;}
00677 if (state < 3) {close (devfd);printf("failed to find upper margin\n"); return -2;}
00678 printf ("phase uncertainty range = %d (minimal %d, maximal - %d)\r\n",dqmx-dqmn,dqmn,dqmx);
00679 printf ("optimal phase = %d\r\n",(dqmx+dqmn)>>1);
00680 if (corr) {
00681 printf ("manually corrected optimal phase = %d\r\n",((dqmx+dqmn)>>1)+corr);
00682 }
00683 corr+=((dqmx+dqmn)>>1);
00684
00685 if (corr <= mx) {
00686 for (i=mx; i > corr; i--) {
00687 for (retry=DCM_RETRY;retry>0;retry--) {
00688 a=ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0);
00689 if (IS_DCM_GOOD (a)) break;
00690 }
00691 if (retry <=0) {
00692 if (i>(mx-5)) {
00693 printf ("DCM phase high limit is probably too high (pass3, status=%x). Try <%d (instead of %d)\n",a,i,mx);
00694 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00695 close (devfd);
00696 return -4;
00697 } else {
00698 printf ("DCM failed to set to the optimal phase ( should not be so - status=%x at phase %d)\n",a,i);
00699 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00700 close (devfd);
00701 return -5;
00702 }
00703 }
00704 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 1);
00705 }
00706 } else {
00707 for (i=mx; i < corr; i++) {
00708 for (retry=DCM_RETRY;retry>0;retry--) {
00709 a=ioctl(devfd, _IO(FPGACONF_READREG, X313__RA__STATUS ), 0);
00710 if (IS_DCM_GOOD (a)) break;
00711 }
00712 if (retry <=0) {
00713 printf ("DCM corrected phase (%d) is probably too high. Failed at %d (with status=%x)\n",corr,i,a);
00714 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 3);
00715 close (devfd);
00716 return -4;
00717 }
00718 ioctl(devfd, _IO(FPGACONF_WRITEREG, X313_WA_DCM ), 2);
00719 }
00720 }
00721
00722 #if 0 // What the hell was that???
00723 ra=0x20;
00724 rd=0x15555;
00725 ioctl(devfd, _IO(FPGACONF_WRITEREG, ra ), rd);
00726 #endif
00727
00728
00729
00730 resetSDRAM();
00731 readSDRAMdummy();
00732
00733 close (devfd);
00734
00735 return 0;
00736 }
00737 if (strcasecmp(argv[1], "-dbg")==0) {
00738 if (argc<3) {printf("Bit position and bit width are expected (optionally followed by preceeding text ('_' instead of spaces))\r\n");return -1;}
00739 bp= strtol (argv[2],&cp,10);
00740 if (argc >3) bq= strtol (argv[3],&cp,10);
00741 else bq=32;
00742 if (bq>32) bq=32;
00743 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00744 res=ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x10 ),0);
00745 for (i=0; i<bp;i++) res=ioctl(devfd, _IO(FPGACONF_READREG4, 0x10 ),0);
00746 d=0;
00747 for (i=0;i<32;i++)
00748 if ((i<bq) && (ioctl(devfd, _IO(FPGACONF_READREG4, 0x10 ),0) & 0x40000000)) d=(d>>1) | 0x80000000;
00749 else d=(d>>1) & 0x7fffffff;
00750 close (devfd);
00751 if (argc >4) {
00752 for (cp=argv[4];cp[0];cp++) if (cp[0]!='_') printf("%c",cp[0]);
00753 else printf(" ");
00754 printf(" ");
00755 }
00756 fvx[2]='1'+(bq>>2);
00757 printf(fvx,d);
00758 printf("\n");
00759 return 0;
00760 }
00761
00762 if (strcasecmp(argv[1], "-tr")==0) {
00763 if (argc<4) {printf("A nad N (hex) are expected\r\n");return -1;}
00764 a= strtol (argv[2],&cp,16);
00765 n= strtol (argv[3],&cp,16);
00766 ands[0]=0xffffffff;
00767 ors[0]=0;
00768 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00769 for (i=0; i<n;i++) {
00770 j=ioctl(devfd, _IO(FPGACONF_READREG, a ),0);
00771 ands[0] &= j;
00772 ors[0] |= j;
00773 }
00774 printf ("and=0x%x, or=0x%x\n",ands[0],ors[0]);
00775 close(devfd);
00776 return 0;
00777 }
00778
00779 if (strcasecmp(argv[1], "-mem")==0) {
00780 comp_mode=0;
00781 n=0x2000000;
00782 if (argc>=3) {
00783 n= strtol (argv[2],&cp,16);
00784 if (argc >=7) {
00785 comp_mode=1;
00786 ptrn16[0]= strtol (argv[3],&cp,16);
00787 ptrn16[1]= strtol (argv[4],&cp,16);
00788 ptrn16[2]= strtol (argv[5],&cp,16);
00789 ptrn16[3]= strtol (argv[6],&cp,16);
00790 }
00791 }
00792 if (n>0x2000000) n=0x2000000;
00793 n=n>>12;
00794 if (n<1) n=1;
00795
00796 if (comp_mode) {
00797 for (i=0;i<2048;i+=2) {tables[i]=ptrn[0];tables[i+1]=ptrn[1];}
00798 if ((devfd = open("/dev/fsdram", O_RDWR))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
00799 for (i=0;i<n;i++) if ((res=write(devfd,tables,8192))<8192) {
00800 printf("write failed, returned %d, expected - %d\n",res, 8192);
00801 close (devfd);
00802 return -1;
00803 }
00804 close (devfd);
00805 }
00806
00807 if ((devfd = open("/dev/fsdram", O_RDONLY))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
00808 ands[0]=0xffffffff;
00809 ands[1]=0xffffffff;
00810 ors[0]=0;
00811 ors[1]=0;
00812 nerr=0;
00813 for (i=0;i<n;i++) {
00814 if ((res=read(devfd,tables,8192))<8192) {
00815 printf("read failed, returned %d, expected - %d\n",res, 8192);
00816 close (devfd);
00817 return -1;
00818 }
00819 for (j=0;j<2048;j+=2) {
00820 ands[0] &= tables[j];
00821 ands[1] &= tables[j+1];
00822 ors[0] |= tables[j];
00823 ors[1] |= tables[j+1];
00824 }
00825 if (comp_mode) {
00826 for (j=0;j<2048;j+=2) {
00827 tables[j] ^= ptrn[0];
00828 tables[j+1] ^= ptrn[1];
00829 }
00830 } else {
00831 for (j=2;j<2048;j+=2) {
00832 tables[j-2] ^= tables[j];
00833 tables[j-1] ^= tables[j+1];
00834 }
00835 tables[2046]=0;
00836 tables[2047]=0;
00837 }
00838 for (j=0;j<8192;j++) {
00839 nerr+=bits_in_byte[btables[j]];
00840
00841 }
00842 }
00843 printf ("wrong bits - 0x%x ( in 0x%x tested 16-bit words\n",nerr,(n<<12));
00844 printf ("and %4x %4x %4x %4x\n",ands16[0],ands16[1],ands16[2],ands16[3]);
00845 printf ("or %4x %4x %4x %4x\n",ors16[0], ors16[1], ors16[2], ors16[3]);
00846 if (comp_mode) printf ("pattern %4x %4x %4x %4x\n",ptrn16[0],ptrn16[1],ptrn16[2],ptrn16[3]);
00847
00848
00849 close (devfd);
00850 return 0;
00851 }
00852
00853
00854
00855
00856 if (strcasecmp(argv[1], "-raw")==0) {
00857 if (argc<3) {printf("Line length (decimal, pixels) and filename with pixel data (hex bytes)\r\n");return -1;}
00858 ll= strtol (argv[2],&cp,10);
00859
00860 if ((tfile = fopen(argv[3], "r"))==NULL) {printf("error opening file %s\n",argv[3]); return -1;}
00861 if ((devfd = open("/dev/fsdram", O_RDWR))<0) {printf("error opening /dev/fsdram\r\n"); fclose (tfile); return -1;}
00862 d=0;
00863 n=0;
00864 nl=0;
00865
00866 fline[1023]=0;
00867 while (((cp=fgets(fline,1023,tfile)) !=NULL) && (n<2048)) {
00868 while (((d=strtol (cp,&ep,16)), ((ep-fline)<strlen(fline))) && (n<2048) && (ep != cp)){
00869 btables[n++]=d;
00870 cp=ep;
00871 if (n>=ll) {
00872 for (i=0; i<ll; i+=256) {
00873 nt=(nl>>4)*(((ll-1)>>8)+1)+(i>>8);
00874 sa=((nt >> 1) << 13) +
00875 ((nt & 1) << 8) +
00876 ((nl & 0xf) << 9);
00877 lseek(devfd,sa,0);
00878 write(devfd,&btables[i],((ll-i) > 256)?256:(ll-i));
00879 }
00880 nl++;
00881 n=0;
00882 }
00883 }
00884 }
00885 fclose (tfile);
00886 close (devfd);
00887 printf("read %d lines, each %d pixels long\n", (int) nl, (int) ll);
00888 return 0;
00889 }
00890
00891
00892
00893 if (strcasecmp(argv[1], "-mcu")==0) {
00894 sa=0x280000;
00895 if (argc<2) {printf("Address and filename\r\n");return -1;}
00896
00897 if ((tfile = fopen(argv[2], "r"))==NULL) {printf("error opening file %s\n",argv[2]); return -1;}
00898 d=0;
00899 n=0;
00900 fline[1023]=0;
00901
00902
00903 while (((cp=fgets(fline,1023,tfile)) !=NULL) && (n<2048)) {
00904 while (((d=strtol (cp,&ep,16)), ((ep-fline)<strlen(fline))) && (n<2048) && (ep != cp)){
00905 btables[n++]=d;
00906 cp=ep;
00907 }
00908 }
00909 fclose (tfile);
00910 printf("read %d elements\n",n);
00911
00912 if ((devfd = open("/dev/fsdram", O_RDWR))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
00913 for (i=0;i<n;i+=16){
00914 lseek(devfd,sa+ ((i & 0xf0) << 4)+((i & 0xf00)>>4),0);
00915 write(devfd,&btables[i],16);
00916 }
00917 close (devfd);
00918 return 0;
00919 }
00920 if (argv[1][0] != '-'){printf(usage); return 0;}
00921 if (strcasecmp(argv[1], "-table")==0) {
00922 if (argc<3) {
00923
00924
00925
00926
00927
00928
00929
00930
00931
00932
00933
00934
00935
00936
00937
00938
00939
00940
00941
00942
00943
00944
00945 return 0;
00946 }
00947 if (argc==3) {
00948 sa=0;
00949 cp=argv[2];
00950 } else {
00951 sa= strtol (argv[2],&cp,16);
00952 cp=argv[3];
00953 }
00954
00955
00956 if ((tfile = fopen(cp, "r"))==NULL) {printf("error opening file %s\n",cp); return -1;}
00957 d=0;
00958 i=0;
00959 fline[1023]=0;
00960
00961 while (((cp=fgets(fline,1023,tfile)) !=NULL) && (i<1024)) {
00962 while (((d=strtol (cp,&ep,16)), ((ep-fline)<strlen(fline))) && (i<2048) && (ep != cp)){
00963 tables[i++]=d;
00964 cp=ep;
00965 }
00966 }
00967 fclose (tfile);
00968
00969 printf("read %d elements\n",i);
00970
00971
00972
00973
00974
00975
00976
00977 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
00978
00979
00980
00981 ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x0e ), sa);
00982 for (j=0;j<i;j++) ioctl(devfd, _IO(FPGACONF_WRITEREG, 0x0f ), tables[j]);
00983 printf ("%x\n",(int) d);
00984 close (devfd);
00985 return 0;
00986 }
00987
00988 if (strcasecmp(argv[1], "-jpeg")==0) {
00989 printf ("Not supported in 7.2\n");
00990 return -1;
00991 #if SUPPORTED_IN_72
00992 if (argc<3) {printf("Need JPEG command number\r\n");return -1;}
00993 i= strtol (argv[2],&cp,16);
00994
00995
00996 if (i==0x0d)
00997 {
00998
00999 if ((devfd = open("/dev/sensorpars", O_RDONLY))<=0) {
01000 printf("error opening /dev/sensorpars, errno=%d\n",errno);
01001 #ifdef DEBUG_USAGE
01002 fpcflog = fopen("/var/log/fpcf.log", "a");
01003 fprintf (fpcflog, " error opening /dev/sensorpars, errno=%d\n",errno);
01004
01005 fclose(fpcflog);
01006 #endif
01007 return -1;}
01008 } else {
01009 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {
01010 printf("error opening /dev/ccam_dma.raw, errno=%d\n",errno);
01011 #ifdef DEBUG_USAGE
01012 fpcflog = fopen("/var/log/fpcf.log", "a");
01013 fprintf (fpcflog, " error opening /dev/ccam_dma.raw, errno=%d\n",errno);
01014 fclose(fpcflog);
01015 #endif
01016 return -1;}
01017 }
01018 res=ioctl(devfd, _IO(CMOSCAM_IOCTYPE, IO_CCAM_JPEG ), i);
01019 printf("0x%x\n",res);
01020 #ifdef DEBUG_USAGE
01021
01022 if ((fpcflog = fopen("/var/log/fpcf.log", "a"))==NULL) {printf("error opening file %s\n","/var/log/fpcf.log"); return -1;}
01023
01024 fprintf (fpcflog, " 0x%x\n",res);
01025 fclose(fpcflog);
01026 #endif
01027 close (devfd);
01028 return 0;
01029 #endif
01030 }
01031
01032 if (strcasecmp(argv[1], "-jctl")==0) {
01033 printf ("Not supported in 7.2\n");
01034 return -1;
01035 #if SUPPORTED_IN_72
01036
01037 if (argc<3) {printf("Need JPEG control word\r\n");return -1;}
01038 i= strtol (argv[2],&cp,16);
01039 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {printf("error opening /dev/ccam_dma.raw\n"); return -1;}
01040 res=ioctl(devfd, _IO(CMOSCAM_IOCTYPE, IO_CCAM_JPEG_CTRL ), i);
01041 close (devfd);
01042 return 0;
01043 #endif
01044 }
01045 if (strcasecmp(argv[1], "-jn")==0) {
01046 printf ("Not supported in 7.2\n");
01047 return -1;
01048 #if SUPPORTED_IN_72
01049 if (argc<3) {printf("Need number of frames to acquire\r\n");return -1;}
01050 i= strtol (argv[2],&cp,16);
01051 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {printf("error opening /dev/ccam_dma.raw\n"); return -1;}
01052 res=ioctl(devfd, _IO(CMOSCAM_IOCTYPE, IO_CCAM_JPEG_GET_N ), i);
01053 close (devfd);
01054 return 0;
01055 #endif
01056 }
01057 if (strcasecmp(argv[1], "-jl")==0) {
01058 printf ("Not supported in 7.2\n");
01059 return -1;
01060 #if SUPPORTED_IN_72
01061
01062 if (argc<3) {printf("Need dadat length (in 32-bit words) to acquire\r\n");return -1;}
01063 i= strtol (argv[2],&cp,16);
01064 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {printf("error opening /dev/ccam_dma.raw\n"); return -1;}
01065 res=ioctl(devfd, _IO(CMOSCAM_IOCTYPE, IO_CCAM_JPEG_GET_L ), i);
01066 close (devfd);
01067 return 0;
01068 #endif
01069 }
01070 if (strcasecmp(argv[1], "-dma")==0) {
01071 printf ("Not supported in 7.2\n");
01072 return -1;
01073 #if SUPPORTED_IN_72
01074
01075 if (argc<3) {printf("Need DMA command number\r\n");return -1;}
01076 i= strtol (argv[2],&cp,16);
01077 if ((i<0) || (i>2)) {printf("Supported DMA commands are 0,1 and 2 only\r\n");return -1;}
01078 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {printf("error opening /dev/ccam_dma.raw\n"); return -1;}
01079 res=ioctl(devfd, _IO(CMOSCAM_IOCTYPE, IO_CCAM_DMA ), i);
01080 close (devfd);
01081 return 0;
01082 #endif
01083 }
01084
01085 if ((strcasecmp(argv[1], "-dr" )==0) ||
01086 (strcasecmp(argv[1], "-drb")==0) ||
01087 (strcasecmp(argv[1], "-drw")==0) ||
01088 (strcasecmp(argv[1], "-drl")==0)) {
01089 printf ("Not supported in 7.2\n");
01090 return -1;
01091 #if SUPPORTED_IN_72
01092
01093 ws=0;
01094 if (strcasecmp(argv[1], "-drw")==0) ws=1;
01095 if (strcasecmp(argv[1], "-drl")==0) ws=2;
01096 if (argc<3) {
01097 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {printf("error opening /dev/ccam_dma.raw\n"); return -1;}
01098 fs=lseek(devfd,0,2);
01099 if (fs>=0) fs>>=ws;
01100 printf("DMA received 0x%x (%d) ", (int) fs, (int) fs);
01101 if (ws==0) printf("bytes\n");
01102 else if (ws==1) printf("words\n");
01103 else printf("long words\n");
01104 close (devfd);
01105 return 0;
01106 }
01107 sa= strtol (argv[2],&cp,16);
01108 n=1; if (argc >3) n= strtol (argv[3],&cp,16);
01109 if ((devfd = open("/dev/ccam_dma.raw", O_RDONLY))<=0) {printf("error opening /dev/ccam_dma.raw\n"); return -1;}
01110 while (n>0) {
01111 i=n; if (i>((FPCF_SDBUFFER_SIZE<<1)>>ws)) i=((FPCF_SDBUFFER_SIZE<<1)>>ws);
01112 if ((res=lseek(devfd,sa<<ws,0))<0) {
01113 printf("lseek failed, returned %d\n",res);
01114 close (devfd);
01115 return -1;
01116 }
01117
01118 if ((res=read(devfd,usbuf,i<<ws))<(i<<ws)) {
01119 if (res!=0) printf("\nread failed, returned %d bytes, expected - %d\n",res, (i<<ws));
01120 if (res <= 0 ) {
01121 close (devfd);
01122 return -1;
01123 }
01124 i=(res>>ws);
01125 }
01126
01127 for (j=0;j<i;j++) {
01128 if ( ((sa+j) & 0x0f) == 0) printf("\n%06x:",(int) (sa+j));
01129 if (ws==0) printf (" %2x", (int) usbuf8 [j]);
01130 else if (ws==1) printf (" %4x", (int) usbuf16[j]);
01131 else printf (" %8x", (int) usbuf32[j]);
01132 }
01133 sa += i;
01134 n -= i;
01135 }
01136 printf("\n");
01137 close (devfd);
01138 return 0;
01139 #endif
01140
01141 }
01142
01143 shft=-1;
01144 res=0;
01145 if (strcasecmp(argv[1], "-sr") ==0) shft=1;
01146 if (strcasecmp(argv[1], "-sr8") ==0) shft=0;
01147 if (strcasecmp(argv[1], "-sr16") ==0) shft=1;
01148 if (strcasecmp(argv[1], "-sr32") ==0) shft=2;
01149 if (shft>=0) {
01150
01151 if (argc<3) {printf("Need SDRAM address (hex) to read\r\n");return -1;}
01152 sa= strtol (argv[2],&cp,16);
01153 n=1; if (argc >3) n= strtol (argv[3],&cp,16);
01154 if ((devfd = open("/dev/fsdram", O_RDONLY))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
01155
01156 while (n>0) {
01157 i=n; if (i>(sizeof(usbuf)>>shft)) i=sizeof(usbuf)>>shft;
01158 if ((res=lseek(devfd,sa<<shft,0))<0) {
01159 printf("lseek failed, returned %d\n",res);
01160 close (devfd);
01161 return -1;
01162 }
01163 if ((res=read(devfd,usbuf,i<<shft))<(i<<shft)) {
01164 printf("read failed, returned %d, expected - %d\n",res, (i<<shft));
01165 close (devfd);
01166 return -1;
01167 }
01168
01169 for (j=0;j<i;j++) {
01170
01171 if (res && ( ((sa+j) & ((0x20 >> shft)-1)) == 0)) printf("\n%06x:",(int) (sa+j));
01172
01173 if (shft==0) printf (" %2x", (int) usbuf8[j]);
01174 else if (shft==1) printf (" %4x", (int) usbuf16[j]);
01175 else if (shft==2) printf (" %8x", (int) usbuf32[j]);
01176 res=1;
01177 }
01178 sa += i;
01179 n -= i;
01180 }
01181 printf("\n");
01182 close (devfd);
01183 return 0;
01184 }
01185 shft=-1;
01186 if (strcasecmp(argv[1], "-sw") ==0) shft=1;
01187 if (strcasecmp(argv[1], "-sw8") ==0) shft=0;
01188 if (strcasecmp(argv[1], "-sw16") ==0) shft=1;
01189 if (strcasecmp(argv[1], "-sw32") ==0) shft=2;
01190
01191 if (shft>=0)
01192 {
01193 if (argc<3) {printf("Need SDRAM address (hex) to write data\r\n");return -1;}
01194 if (argc<4) {printf("Need SDRAM data (hex) to write to SDRAM\r\n");return -1;}
01195 sa= strtol (argv[2],&cp,16);
01196 uld=(unsigned long) strtoll (argv[3],&cp,16);
01197 n=1; if (argc >4) n= (unsigned long) strtoll (argv[4],&cp,16);
01198 uli=0; if (argc >5) uli= (unsigned long) strtoll (argv[5],&cp,16);
01199
01200
01201
01202
01203
01204 if ((devfd = open("/dev/fsdram", O_RDWR))<0) {printf("error opening /dev/fsdram\r\n"); return -1;}
01205 while (n>0) {
01206 i=n; if (i>(sizeof(usbuf)>>shft)) i=sizeof(usbuf)>>shft;
01207
01208 if (shft==0) for (j=0;j<i;j++) {usbuf8[j] =uld; uld+=uli;}
01209 else if (shft==1) for (j=0;j<i;j++) {usbuf16[j]=uld; uld+=uli;}
01210 else if (shft==2) for (j=0;j<i;j++) {usbuf32[j]=uld; uld+=uli;}
01211 if ((res=lseek(devfd,sa<<shft,0))<0) {
01212 printf("lseek failed, returned %d\n",res);
01213 close (devfd);
01214 return -1;
01215 }
01216 if ((res=write(devfd,usbuf,i<<shft))<(i<<shft)) {
01217 printf("write failed, returned %d, expected - %d\n",res, (i<<shft));
01218 close (devfd);
01219 return -1;
01220 }
01221 sa += i;
01222 n -= i;
01223 }
01224
01225 close (devfd);
01226 return 0;
01227 }
01228
01229 shft=-1;
01230 if (strcasecmp(argv[1], "-i2cr8") ==0) shft=0;
01231 if (strcasecmp(argv[1], "-i2cr16") ==0) shft=1;
01232 if (shft>=0) {
01233 if (argc<3) {printf("Need I2C address (hex) to read: register address + 256* (slave address>>1)\r\n");return -1;}
01234 sa= strtol (argv[2],&cp,16);
01235 n=1; if (argc >3) n= strtol (argv[3],&cp,16);
01236 if (shft==1) {
01237 if ((devfd = open("/dev/xi2c16", O_RDONLY))<0) {printf("error opening /dev/xi2c16\r\n"); return -1;}
01238 } else {
01239 if ((devfd = open("/dev/xi2c8", O_RDONLY))<0) {printf("error opening /dev/xi2c8\r\n"); return -1;}
01240 }
01241
01242 while (n>0) {
01243 i=n; if (i>(sizeof(usbuf)>>shft)) i=sizeof(usbuf)>>shft;
01244 if ((res=lseek(devfd,sa<<shft,0))<0) {
01245 printf("lseek failed, returned %d\n",res);
01246 close (devfd);
01247 return -1;
01248 }
01249 if ((res=read(devfd,usbuf,i<<shft))<(i<<shft)) {
01250 printf("read failed, returned %d, expected - %d\n",res, (i<<shft));
01251 close (devfd);
01252 return -1;
01253 }
01254
01255 for (j=0;j<i;j++) {
01256 if (res && ( ((sa+j) & ((0x20 >> shft)-1)) == 0)) printf("\n%06x:",(int) (sa+j));
01257 if (shft==0) printf (" %2x", (int) usbuf8[j]);
01258
01259 else if (shft==1) printf (" %4x", ((((int) usbuf16[j])>>8) & 0xff) | ((((int) usbuf16[j]) << 8) & 0xff00) );
01260
01261 res=1;
01262 }
01263 sa += i;
01264 n -= i;
01265 }
01266 printf("\n");
01267 close (devfd);
01268 return 0;
01269 }
01270
01271 shft=-1;
01272 if (strcasecmp(argv[1], "-i2cw8") ==0) shft=0;
01273 if (strcasecmp(argv[1], "-i2cw16") ==0) shft=1;
01274 if (shft>=0) {
01275 if (argc<3) {printf("Need I2C address (hex) to write: register address + 256* (slave address>>1)\r\n");return -1;}
01276 if (argc<4) {printf("Need data (hex) to write to i2c bus 0\r\n");return -1;}
01277 sa= strtol (argv[2],&cp,16);
01278 uld=strtol (argv[3],&cp,16);
01279 if (shft==1) {
01280 if ((devfd = open("/dev/xi2c16", O_RDWR))<0) {printf("error opening /dev/xi2c16\r\n"); return -1;}
01281 uld= ((uld >>8) & 0xff) | ((uld <<8) & 0xff00);
01282 } else {
01283 if ((devfd = open("/dev/xi2c8", O_RDWR))<0) {printf("error opening /dev/xi2c8\r\n"); return -1;}
01284 }
01285 if ((res=lseek(devfd,sa<<shft,0))<0) {
01286 printf("lseek failed, returned %d\n",res);
01287 close (devfd);
01288 return -1;
01289 }
01290 if ((res=write(devfd,&uld,1<<shft))<(1<<shft)) {
01291 printf("write failed, returned %d, expected - %d\n",res, (1<<shft));
01292 close (devfd);
01293 return -1;
01294 }
01295 close (devfd);
01296 return 0;
01297 }
01298
01299
01300 if (strcasecmp(argv[1], "-s")==0) {
01301 if ((devfd = open("/dev/fpgaio", O_RDONLY))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
01302 d=ioctl(devfd, _IO(FPGACONF_GETSTATE,0), 0) ;
01303
01304 printf ("FPGA state is %x\r\n",(int) d);
01305 close (devfd);
01306 return 0;
01307 }
01308
01309
01310 iorw_args=0;
01311 if (strcasecmp(argv[1], "-r")==0) iorw_args=FPGACONF_READREG;
01312 if (strcasecmp(argv[1], "-rl")==0) iorw_args=FPGACONF_READREG_L;
01313 if (strcasecmp(argv[1], "-rh")==0) iorw_args=FPGACONF_READREG_H;
01314 if (strcasecmp(argv[1], "-r4")==0) iorw_args=FPGACONF_READREG4;
01315 if (strcasecmp(argv[1], "-rl4")==0) iorw_args=FPGACONF_READREG_L4;
01316 if (strcasecmp(argv[1], "-rh4")==0) iorw_args=FPGACONF_READREG_H4;
01317 if (strcasecmp(argv[1], "-w")==0) iorw_args=FPGACONF_WRITEREG;
01318 if (strcasecmp(argv[1], "-w4")==0) iorw_args=FPGACONF_WRITEREG4;
01319 if (strcasecmp(argv[1], "-rw")==0) iorw_args=FPGACONF_RD_WAITSTATES;
01320 if (strcasecmp(argv[1], "-ww")==0) iorw_args=FPGACONF_WR_WAITSTATES;
01321 if (iorw_args) {
01322
01323 rd=0;
01324 ra=0;
01325 switch (iorw_args) {
01326 case FPGACONF_WRITEREG:
01327 case FPGACONF_WRITEREG4:
01328 {
01329 if (argc<4) {printf("Need 32-bit data (hex) to write to a register\r\n"); return -1;}
01330 rd= (unsigned long) strtoll (argv[3],&cp,16);
01331 }
01332
01333 case FPGACONF_READREG:
01334 case FPGACONF_READREG_L:
01335 case FPGACONF_READREG_H:
01336 case FPGACONF_READREG4:
01337 case FPGACONF_READREG_L4:
01338 case FPGACONF_READREG_H4:
01339 {
01340 if (argc<3) {printf("Need register address (hex) to read\r\n");return -1;}
01341 ra= (strtol (argv[2],&cp,16) & 0xff);
01342 break;
01343 }
01344 case FPGACONF_WR_WAITSTATES:
01345 if (argc<3) {printf("Need value for rw_grp[i]_cfg (hex)\r\n");return -1;}
01346 if (argc<4) {
01347 ra=2;
01348 rd= (unsigned long) strtoll (argv[2],&cp,16);
01349 } else {
01350 ra= strtol (argv[2],&cp,16);
01351 rd= (unsigned long) strtoll (argv[3],&cp,16);
01352 if ((ra<1) || (ra>4)) { printf("address should be 1..4, you provided %ld\r\n",ra);return -1; }
01353 }
01354 case FPGACONF_RD_WAITSTATES:
01355 if (argc<3) {
01356 ra=2;
01357 } else {
01358 ra= strtol (argv[2],&cp,16);
01359 if ((ra<1) || (ra>4)) { printf("address should be 1..4, you provided %ld\r\n",ra);return -1; }
01360 }
01361 break;
01362 default: {printf("unrecognised IORW command # %d\r\n",iorw_args);return -1;}
01363 }
01364 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
01365 d=ioctl(devfd, _IO(iorw_args, ra ), rd);
01366 printf ("%x\n",(int) d);
01367 close (devfd);
01368
01369 return 0;
01370 }
01371 if (strcasecmp(argv[1], "-button")==0) {
01372 printf ("Not supported in 10353E\n");
01373 return -1;
01374 #if SUPPORTED_IN_72
01375 if ((devfd = open("/dev/fpgaconfi2c", O_RDWR))<0) {printf("error opening /dev/fpgaconfi2c\r\n"); return -1;}
01376 d=(ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_PA_RD ),0)>>6) & 1;
01377 printf ("%d\n",(int) d);
01378 close (devfd);
01379 return d;
01380 #endif
01381 }
01382
01383
01384 if ((argv[1][1] == 'a') || (argv[1][1] == 'A')) {
01385 printf ("Not supported in 10353\n");
01386 return -1;
01387 #if SUPPORTED_IN_72
01388
01389 if ((devfd = open("/dev/fpgaconfi2c", O_RDWR))<0) {printf("error opening /dev/fpgaconfi2c\r\n"); return -1;}
01390 if (argc<3) {
01391 d=ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_PA_RD ),0);
01392 printf ("%x\n",(int) d);
01393 } else {
01394 d=strtol (argv[2],&cp,16);
01395 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_PA_WR ),d);
01396 }
01397 close (devfd);
01398 return d;
01399 #endif
01400 }
01401
01402
01403 if ((argv[1][1] == 't') || (argv[1][1] == 'T')) {
01404 printf ("Not supported in 7.2\n");
01405 return -1;
01406 #if SUPPORTED_IN_72
01407 d=0; n= 0; i=0;
01408 if (argc>4) {
01409 d=(strtol (argv[4],&cp,16) & 0xff);
01410 n=(strtol (argv[3],&cp,16) & 0x7);
01411 i=(strtol (argv[2],&cp,16) & 0x1);
01412 } else if (argc>3) {
01413 d=(strtol (argv[3],&cp,16) & 0xff);
01414 n=(strtol (argv[2],&cp,16) & 0x7);
01415 } else if (argc>2) {
01416 d=(strtol (argv[2],&cp,16) & 0xff);
01417 }
01418 if ((devfd = open("/dev/fpgaconfi2c", O_RDWR))<0) {printf("error opening /dev/fpgaconfi2c\r\n"); return -1;}
01419 j=ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(i, n, d ));
01420 printf ("JTAG returned %x\n", j);
01421 close (devfd);
01422 return 0;
01423 #endif
01424
01425 }
01426
01427 if ((argv[1][1] == 'p') || (argv[1][1] == 'P')) {
01428 printf ("Not supported in 10353\n");
01429 return -1;
01430 #if SUPPORTED_IN_72
01431 if ((devfd = open("/dev/fpgaconfi2c", O_RDWR))<0) {printf("error opening /dev/fpgaconfi2c\r\n"); return -1;}
01432 if (argc>2) {
01433 if ((ifd=open(argv[2],O_RDONLY))<0) {printf("error opening bitstream file %s\r\n",argv[2]); close(devfd); return -1;}
01434 } else ifd=-1;
01435 i=0;
01436
01437 n=-1;
01438 if ( ifd>=0) {
01439 while ((i<1000) && (read(ifd,&charheadbuf[(i++) & 7],1)>0)) {
01440 j=0;
01441 while ((j<8) && (charheadbuf[(i+j) & 7]==syncseq[j])) j++;
01442
01443 if (j==8) {n=i-8;break;}
01444
01445
01446
01447
01448
01449
01450
01451 }
01452 if (n<0) {printf("No <ff ff ff ff aa 99 55 66> syncseq found\r\n"); close(devfd); return -1;}
01453 printf ("Skipping header %d bytes long\n",n);
01454 }
01455
01456
01457
01458 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_PGM ),1);
01459 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_PGM ),0);
01460 retr=0;
01461 while ((retr < 100000) && ((ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_STAT ),0) & 1) == 0)) retr ++;
01462 printf ("waited for INIT high %d cycles\r\n",retr);
01463 if ((ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_STAT ),0) & 1) == 0) {
01464 close (ifd);
01465 close (devfd);
01466 printf("FPGA not ready\r\n");
01467 return -2;
01468 }
01469
01470 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 5, 0 ));
01471 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 1, 0 ));
01472 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 2, 0 ));
01473 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 2, 0 ));
01474 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 5, 0xa0));
01475 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 1, 0 ));
01476 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 2, 0 ));
01477 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 2, 0 ));
01478
01479
01480 for (i=0; i<8; i++) {
01481 j=ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 0, syncseq[i] ));
01482 printf("i=%d, j=%x, syncseq[i]=%x\n",i,j,(int) syncseq[i]);
01483 }
01484
01485 testnum=7;
01486 retr=0;
01487 if (ifd>=0) {
01488 read(ifd,&b0,1); b=b0;
01489 while (read(ifd,&b0,1)>0) {
01490 testcs+=b;
01491 testnum++;
01492 i= ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 0, b ));
01493
01494
01495 if (i & 0x100) {
01496 printf("readback mismatch at %x - written:%x, read: %x\n",testnum,(int) b, i & 0xff);
01497 }
01498
01499 b=b0;
01500
01501
01502
01503
01504 retr++;
01505 }
01506 } else {
01507 b0=0; b=b0;
01508 for (n=0;n<8;n++) {
01509 b0=0;
01510 testcs+=b;
01511 testnum++;
01512 i= ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 0, b ));
01513 if (testnum<90) printf("num=%5x, wr= %2x, rd=%3x\n",testnum,(int) b, i );
01514
01515 if (i & 0x100) {
01516 printf("readback mismatch at %x - written:%x, read: %x\n",testnum,(int) b, i & 0xff);
01517 }
01518
01519 b=b0;
01520
01521
01522
01523
01524 retr++;
01525 }
01526 close (devfd);
01527 return 0;
01528 }
01529 testcs+=b;
01530 testnum++;
01531 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 7, b ));
01532 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 1, (b<<7)));
01533 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 1, 0 ));
01534 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 2, 0 ));
01535 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 2, 0 ));
01536 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 5, 0x30));
01537 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 1, 0 ));
01538 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 2, 0 ));
01539 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 0, 0 ));
01540 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 0, 0 ));
01541 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(1, 2, 0 ));
01542 ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_JTAG ),FPGA_JTAG_ARG(0, 1, 0 ));
01543 printf ("FPGA status = %x\r\n", ioctl(devfd, _IO(FPGACONF_IOCTYPE, FPGA_STAT ),0));
01544 printf ("testcs = %x, testnum= %x (%d)\r\n", testcs,testnum,testnum);
01545
01546 if ( ifd>=0) close (ifd);
01547 close (devfd);
01548 return 0;
01549 #endif
01550 }
01551
01552 if (argv[1][1] == 'X') {
01553 if (argc<3) {printf("Needs more args...\r\n"); return 0;}
01554 n= strtol (argv[2],&cp,10);
01555 if ((n<0) || (n>3)) {
01556 printf("Invalid clock number - %d\r\n", n);
01557 return -1;
01558 }
01559 if (argc<4) {
01560 if ((devfd = open("/dev/fpgaclocks", O_RDONLY))<0) {printf("error opening /dev/fpgaclocks\r\n"); return -1;}
01561 i= ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE_RD, n ),0);
01562 close (devfd);
01563 if (i<0) {printf("Error reading clock %d, code=%d\r\n", n, -i); return -1;}
01564 f=i;
01565 f*=0.000001;
01566 if (i) printf("Clock %d is set to %eMHz\r\n",n,f);
01567 else printf("Clock %d is OFF\r\n",n);
01568 return 0;
01569 }
01570 f= strtod (argv[3],&cp);
01571
01572
01573 if ((devfd = open("/dev/fpgaclocks", O_RDWR))<0) {printf("error opening /dev/fpgaclocks\r\n"); return -1;}
01574 i=1000000*f;
01575 switch (n) {
01576 case 0: j= ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE, 0 ),i); break;
01577 case 1: j= ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE, 1 ),i); break;
01578 case 2: j= ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE, 2 ),i); break;
01579 case 3: j= ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE, 3 ),i); break;
01580 }
01581 close (devfd);
01582 if (j<0) {
01583 printf("Error setting clock, code=%d\r\n", -j);
01584 return -1;
01585 } else if (j==0) {
01586 printf("Clock %d turned off\r\n",n);
01587 } else {
01588 f=0.000001*j;
01589 printf("Set clock %d to %eMHz\r\n",n,f);
01590 }
01591 return 0;
01592 }
01593
01594
01595 if (argv[1][1] == 'x') {
01596 if (argc<4) {printf("Needs more args...\r\n"); return 0;}
01597 n= strtol (argv[2],&cp,10);
01598 f= strtod (argv[3],&cp);
01599 i=1000000*f;
01600 if((f < CLOCK_LOW) || (f > CLOCK_HIGH)) {
01601 printf ("frequency should be in the range of %d...%d MHz, not %fMhz\n", CLOCK_LOW, CLOCK_HIGH, f);
01602 return -1;
01603 }
01604 if ((n<0) || (n>1)) {
01605 printf ("Only clocks 0 (fpga) and 1 (sensor) are supported, not %d\n",n);
01606 return -1;
01607 }
01608 devfd = open("/dev/circbuf", O_RDWR);
01609 if (devfd<0) {
01610 printf ("Error opening %s\n","/dev/circbuf");
01611 return -1;
01612 }
01613 switch (n) {
01614 case 0: j=ioctl(devfd, _CCCMD(CCAM_WPARS , P_CLK_FPGA ), i);break;
01615 case 1: j=ioctl(devfd, _CCCMD(CCAM_WPARS , P_CLK_SENSOR), i);break;
01616 default: j=-1;
01617 }
01618 if (j<0) printf ("Error setting clock %d to %dMHz\n",n,i);
01619 else printf ("clock %d will be set to %dMHz when sensor will be programmed\n",n,i);
01620 close (devfd);
01621 return 0;
01622 }
01623
01624
01625 if ((argv[1][1] == 'i') || (argv[1][1] == 'I')) {
01626 if ((argv[1][2] == 'r') || (argv[1][2] == 'R')) {
01627 if (argc<3) {
01628 sa=CY22393_SA;
01629 devfd = open("/dev/fpgaclocksi2c", O_RDONLY);
01630 printf ("open returned - %x\r\n",devfd);
01631 j= 0x58;
01632 printf("dumping all i2c data from slave address %x\r\n", (int) sa);
01633 for (i=0;i<j;i++) {
01634 if ((i & 0x0f)==0) printf("\r\n%2x:",i);
01635 d=ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE,FPGA_CLOCK_I2C_READREG), I2C_READARG ( 0, sa, i));
01636 printf(" %2lx", d);
01637 }
01638 printf ("\r\n");
01639 close(devfd);
01640 printf ("devfd closed\r\n");
01641 return 0;
01642 }
01643 if (argc<4) {printf("Needs more args...\r\n"); return 0;}
01644 sa= (strtol (argv[2],&cp,16) & 0xff);
01645 ra= (strtol (argv[3],&cp,16) & 0xff);
01646 devfd = open("/dev/fpgaclocksi2c", O_RDONLY);
01647 printf ("open returned - %x\r\n",devfd);
01648 d=ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE,FPGA_CLOCK_I2C_READREG), I2C_READARG (0, sa, ra)) ;
01649 printf ("i2c register = %lx\r\n", d);
01650 close(devfd);
01651 printf ("devfd closed\r\n");
01652 return 0;
01653 } else if ((argv[1][2] == 'w') || (argv[1][2] == 'W')) {
01654 if (argc<5) {printf("Needs more args...\r\n"); return 0;}
01655 sa= (strtol (argv[2],&cp,16) & 0xff);
01656 ra= (strtol (argv[3],&cp,16) & 0xff);
01657 rd= (strtol (argv[4],&cp,16) & 0xff);
01658 devfd = open("/dev/fpgaclocksi2c", O_WRONLY);
01659 printf ("open returned - %x\r\n",devfd);
01660 d=ioctl(devfd, _IO(FPGA_CLOCK_IOCTYPE, FPGA_CLOCK_I2C_WRITEREG ),I2C_WRITEARG(0, sa, ra, rd));
01661 printf ("i2c returned - %lx\r\n",d);
01662 close(devfd); printf ("devfd closed\r\n");
01663 return 0;
01664 }
01665 }
01666 if ((argv[1][1] == 'c') || (argv[1][1] == 'C')){
01667 printf ("Not supported in 7.2\n");
01668 return -1;
01669 #if SUPPORTED_IN_72
01670 if ((devfd = open("/dev/fpgaio", O_RDWR))<0) {printf("error opening /dev/fpgaio\r\n"); return -1;}
01671 if (argc<3) {
01672 res= ioctl(devfd, _IO(FPGACONF_CONTROL_REG,FPGACONF_CR_SHADOW), 0);
01673 i= ioctl(devfd, _IO(FPGACONF_CONTROL_REG,FPGACONF_CR_SHADOW1), 0);
01674 res |= ((i << 1) & 0x80000000);
01675 printf ("%x\n",res);
01676 close (devfd);
01677 return 0;
01678 }
01679 a=(strtol (argv[2],&cp,16) & 0x1f);
01680 res=0;
01681 if (argc>3) {
01682 res=(strtol (argv[3],&cp,16) & 0x3);
01683 i=ioctl(devfd, _IO(FPGACONF_CONTROL_REG, FPGACONF_CR_MODIFY), res | (a<<2));
01684 j=ioctl(devfd, _IO(FPGACONF_CONTROL_REG, FPGACONF_CR_MODIFY), 0 | (a<<2));
01685 printf ("CR[%x]=%x (was %x)\r\n",a,j,i);
01686 } else printf("%x\n", ioctl(devfd, _IO(FPGACONF_CONTROL_REG, FPGACONF_CR_MODIFY), 0 | (a<<2)));
01687 close(devfd);
01688 return 0;
01689 #endif
01690 }
01691 if (strcasecmp(argv[1], "-sysmem")==0) {
01692 if (argc<3) {printf("Number of 128KB chunks (decimal)to test is required\r\n");return -1;}
01693 ll=0x20000;
01694 n= strtol (argv[2],&cp,10);
01695 if (argc >3) {
01696 seed = strtol (argv[3],&cp,16);
01697 if (argc >4) {
01698 ll= strtol (argv[4],&cp,16);
01699 }
01700 } else seed=0;
01701 if (n>4096) n=4096;
01702 ll=ll>>2;
01703
01705 for (i=0; i<n; i++) {
01706 memchunks[i] = (int *) malloc(ll<<2);
01707 if (!memchunks[i]) {
01708 n=i+1;
01709 break;
01710 }
01711 }
01712 printf ("testing %d (0x%x) memory chunks of %d (0x%x) bytes each... ",n,n, (int) (ll<<2),(int) (ll<<2));
01713 fflush(NULL);
01714 res=seed;
01715 for (i=0; i<n; i++) for (j=0; j<ll; j++) {
01716 memchunks[i][j]= (res <<16) || res;
01717 res++;
01718 }
01719 res=seed;
01720 mn=0;
01721 for (i=0; i<n; i++) for (j=0; j<ll; j++) {
01722 if (memchunks[i][j]!= ((res <<16) || res)) {
01723 if (mn<1000) printf ("\n chunk 0x%x, word 0x%x expected 0x%x read 0x%x",i,j,((res <<16) || res),memchunks[i][j]);
01724 fflush(NULL);
01725 mn++;
01726 }
01727 res++;
01728 }
01730 for (i=0; i<n; i++) free(memchunks[i]);
01731 if (mn==0) printf ("done\n");
01732 else printf ("\nNumber of errors - %d (0x%x)\n",mn,mn);
01733 return 0;
01734 }
01735 printf(short_usage);
01736 return 0;
01737 }
