x393  1.0
FPGAcodeforElphelNC393camera
ahci_dma Module Reference
Inheritance diagram for ahci_dma:
Collaboration diagram for ahci_dma:

Static Public Member Functions

Always Constructs

ALWAYS_574  ( mclk )
ALWAYS_575  ( hclk )
ALWAYS_576  ( hclk )

Public Attributes

Inputs

mrst  
hrst  
mclk  
hclk  
ctba   [ 31 : 4 ]
ctba_ld  
prdtl   [ 15 : 0 ]
dev_wr  
cmd_start  
prd_start  
cmd_abort  
axi_wr_cache_mode   [ 3 : 0 ]
axi_rd_cache_mode   [ 3 : 0 ]
set_axi_wr_cache_mode  
set_axi_rd_cache_mode  
ct_addr   [ 4 : 0 ]
ct_re   [ 1 : 0 ]
prd_irq_clear  
sys_re  
sys_in   [ 31 : 0 ]
sys_we  
afi_awready  
afi_wready  
afi_bvalid  
afi_bid   [ 5 : 0 ]
afi_bresp   [ 1 : 0 ]
afi_wcount   [ 7 : 0 ]
afi_wacount   [ 5 : 0 ]
afi_arready  
afi_rdata   [ 63 : 0 ]
afi_rvalid  
afi_rid   [ 5 : 0 ]
afi_rlast  
afi_rresp   [ 1 : 0 ]
afi_rcount   [ 7 : 0 ]
afi_racount   [ 2 : 0 ]

Outputs

ct_busy   reg
ct_data   reg [ 31 : 0 ]
prd_done  
prd_irq_pend   reg
cmd_busy   reg
cmd_done  
abort_busy  
abort_done  
axi_mismatch  
sys_out   [ 31 : 0 ]
sys_dav  
last_h2d_data  
sys_nfull  
extra_din  
afi_awaddr   [ 31 : 0 ]
afi_awvalid  
afi_awid   [ 5 : 0 ]
afi_awlock   [ 1 : 0 ]
afi_awcache   reg [ 3 : 0 ]
afi_awprot   [ 2 : 0 ]
afi_awlen   [ 3 : 0 ]
afi_awsize   [ 1 : 0 ]
afi_awburst   [ 1 : 0 ]
afi_awqos   [ 3 : 0 ]
afi_wdata   [ 63 : 0 ]
afi_wvalid  
afi_wid   [ 5 : 0 ]
afi_wlast  
afi_wstrb   [ 7 : 0 ]
afi_bready  
afi_wrissuecap1en  
afi_araddr   [ 31 : 0 ]
afi_arvalid  
afi_arid   [ 5 : 0 ]
afi_arlock   [ 1 : 0 ]
afi_arcache   reg [ 3 : 0 ]
afi_arprot   [ 2 : 0 ]
afi_arlen   [ 3 : 0 ]
afi_arsize   [ 1 : 0 ]
afi_arburst   [ 1 : 0 ]
afi_arqos   [ 3 : 0 ]
afi_rready  
afi_rdissuecap1en  
debug_out   [ 31 : 0 ]
debug_out1   [ 31 : 0 ]
debug_dma_h2d   [ 31 : 0 ]

Parameters

SAFE_RD_BITS   3

Signals

reg[ 31 : 0 ]  ct_data_ram [ 0 : 31 ]
reg[ 3 : 0 ]  int_data_addr
reg[ 31 : 4 ]  ctba_r
reg[ 15 : 0 ]  prdtl_mclk
wire  cmd_start_hclk
reg  prd_start_r
wire  prd_start_hclk
reg  prd_start_hclk_r
wire  cmd_abort_hclk
reg  prd_enabled
reg[ 1 : 0 ]  ct_over_prd_enabled
reg[ 31 : 4 ]  ct_maddr
wire  ct_done
wire  first_prd_fetch
reg[ 31 : 0 ]  afi_addr
wire  axi_set_raddr_ready
wire  axi_set_waddr_ready
wire  axi_set_raddr_w
wire  axi_set_waddr_w
wire  axi_set_addr_data_w
reg  axi_set_raddr_r
reg  axi_set_waddr_r
reg  is_ct_addr
reg  is_prd_addr
reg  is_data_addr
reg[ 31 : 1 ]  data_addr
reg[ 3 : 0 ]  data_len
reg  data_irq
reg[ 21 : 1 ]  wcount
reg  wcount_set
reg[ 22 : 1 ]  qwcount
reg  qwcount_done
reg[ 21 : 3 ]  qw_datawr_left
reg[ 3 : 0 ]  qw_datawr_burst
reg  qw_datawr_last
wire  data_afi_re
reg[ 15 : 0 ]  prds_left
reg  last_prd
reg[ 1 : 0 ]  afi_rd_ctl
reg[ 1 : 0 ]  ct_busy_r
reg  prd_rd_busy
reg  dev_wr_mclk
reg  dev_wr_hclk
reg  prd_wr
reg  prd_rd
wire[ 3 : 0 ]  afi_wstb4
wire  done_dev_wr
wire  done_dev_rd
wire  prd_done_hclk
wire  done_flush
wire  cmd_done_hclk
wire  ct_done_mclk
reg[ 3 : 0 ]  afi_alen
wire  afi_wcount_many
reg  data_next_burst
wire  raddr_prd_rq
reg  raddr_prd_pend
wire  raddr_ct_rq
reg  raddr_ct_pend
wire  addr_data_rq_w
reg  addr_data_rq_r
wire  waddr_data_rq
wire  raddr_data_rq
reg  waddr_data_pend
reg  raddr_data_pend
reg[ 3 : 0 ]  ct_id
reg[ 3 : 0 ]  prd_id
reg[ 3 : 0 ]  dev_wr_id
reg[ 3 : 0 ]  dev_rd_id
reg[ 5 : 0 ]  afi_id
wire  fifo_nempty_mclk
reg  en_extra_din_r
reg[ 31 : 0 ]  ct_data_reg
reg  hrst_r
wire  abort_or_reset
wire  afi_dirty
reg  afi_dirty_mclk
wire  abort_done_hclk
wire  abort_done_mclk
reg  abort_done_unneeded
wire  aborting
wire  afi_wvalid_data
wire  afi_wvalid_abort
wire[ 5 : 0 ]  afi_wid_abort
wire  afi_rready_abort
wire  afi_wlast_abort
reg  abort_rq_mclk
reg  abort_busy_mclk
wire[ 21 : 0 ]  abort_debug
reg  rwaddr_rq_r
wire  debug_01
wire  debug_02
wire  debug_03
wire[ 21 : 1 ]  wcount_plus_data_addr
reg[ 7 : 0 ]  dbg_afi_awvalid_cntr
reg[ 7 : 0 ]  dbg_qwcount
reg[ 7 : 0 ]  dbg_qwcount_cntr
reg[ 7 : 0 ]  dbg_set_raddr_count
reg[ 7 : 0 ]  dbg_set_waddr_count
reg  dbg_was_mismatch

Module Instances

axi_hp_abort::axi_hp_abort_i   Module axi_hp_abort
ahci_dma_rd_fifo::ahci_dma_rd_fifo_i   Module ahci_dma_rd_fifo
ahci_dma_wr_fifo::ahci_dma_wr_fifo_i   Module ahci_dma_wr_fifo
pulse_cross_clock::cmd_start_hclk_i   Module pulse_cross_clock
pulse_cross_clock::cmd_abort_hclk_i   Module pulse_cross_clock
pulse_cross_clock::prd_start_hclk_i   Module pulse_cross_clock
pulse_cross_clock::cmd_done_i   Module pulse_cross_clock
pulse_cross_clock::ct_done_mclk_i   Module pulse_cross_clock
pulse_cross_clock::prd_done_mclk_i   Module pulse_cross_clock
pulse_cross_clock::abort_done_i   Module pulse_cross_clock

Detailed Description

Definition at line 41 of file ahci_dma.v.

Member Function Documentation

ALWAYS_574 (   mclk  
)
Always Construct

Definition at line 339 of file ahci_dma.v.

ALWAYS_575 (   hclk  
)
Always Construct

Definition at line 392 of file ahci_dma.v.

ALWAYS_576 (   hclk  
)
Always Construct

Definition at line 723 of file ahci_dma.v.

Member Data Documentation

mrst
Input

Definition at line 43 of file ahci_dma.v.

hrst
Input

Definition at line 44 of file ahci_dma.v.

mclk
Input

Definition at line 46 of file ahci_dma.v.

hclk
Input

Definition at line 47 of file ahci_dma.v.

ctba [ 31 : 4 ]
Input

Definition at line 51 of file ahci_dma.v.

ctba_ld
Input

Definition at line 52 of file ahci_dma.v.

prdtl [ 15 : 0 ]
Input

Definition at line 53 of file ahci_dma.v.

dev_wr
Input

Definition at line 54 of file ahci_dma.v.

cmd_start
Input

Definition at line 55 of file ahci_dma.v.

prd_start
Input

Definition at line 56 of file ahci_dma.v.

cmd_abort
Input

Definition at line 57 of file ahci_dma.v.

axi_wr_cache_mode [ 3 : 0 ]
Input

Definition at line 61 of file ahci_dma.v.

axi_rd_cache_mode [ 3 : 0 ]
Input

Definition at line 62 of file ahci_dma.v.

Definition at line 63 of file ahci_dma.v.

Definition at line 64 of file ahci_dma.v.

ct_busy reg
Output

Definition at line 68 of file ahci_dma.v.

ct_addr [ 4 : 0 ]
Input

Definition at line 70 of file ahci_dma.v.

ct_re [ 1 : 0 ]
Input

Definition at line 71 of file ahci_dma.v.

ct_data reg [ 31 : 0 ]
Output

Definition at line 72 of file ahci_dma.v.

prd_done
Output

Definition at line 76 of file ahci_dma.v.

Definition at line 77 of file ahci_dma.v.

prd_irq_pend reg
Output

Definition at line 78 of file ahci_dma.v.

cmd_busy reg
Output

Definition at line 79 of file ahci_dma.v.

cmd_done
Output

Definition at line 80 of file ahci_dma.v.

abort_busy
Output

Definition at line 81 of file ahci_dma.v.

abort_done
Output

Definition at line 82 of file ahci_dma.v.

axi_mismatch
Output

Definition at line 83 of file ahci_dma.v.

sys_out [ 31 : 0 ]
Output

Definition at line 86 of file ahci_dma.v.

sys_dav
Output

Definition at line 87 of file ahci_dma.v.

sys_re
Input

Definition at line 89 of file ahci_dma.v.

last_h2d_data
Output

Definition at line 90 of file ahci_dma.v.

sys_in [ 31 : 0 ]
Input

Definition at line 93 of file ahci_dma.v.

sys_nfull
Output

Definition at line 94 of file ahci_dma.v.

sys_we
Input

Definition at line 95 of file ahci_dma.v.

extra_din
Output

Definition at line 97 of file ahci_dma.v.

afi_awaddr [ 31 : 0 ]
Output

Definition at line 101 of file ahci_dma.v.

afi_awvalid
Output

Definition at line 102 of file ahci_dma.v.

afi_awready
Input

Definition at line 103 of file ahci_dma.v.

afi_awid [ 5 : 0 ]
Output

Definition at line 104 of file ahci_dma.v.

afi_awlock [ 1 : 0 ]
Output

Definition at line 105 of file ahci_dma.v.

afi_awcache reg [ 3 : 0 ]
Output

Definition at line 106 of file ahci_dma.v.

afi_awprot [ 2 : 0 ]
Output

Definition at line 107 of file ahci_dma.v.

afi_awlen [ 3 : 0 ]
Output

Definition at line 108 of file ahci_dma.v.

afi_awsize [ 1 : 0 ]
Output

Definition at line 109 of file ahci_dma.v.

afi_awburst [ 1 : 0 ]
Output

Definition at line 110 of file ahci_dma.v.

afi_awqos [ 3 : 0 ]
Output

Definition at line 111 of file ahci_dma.v.

afi_wdata [ 63 : 0 ]
Output

Definition at line 113 of file ahci_dma.v.

afi_wvalid
Output

Definition at line 114 of file ahci_dma.v.

afi_wready
Input

Definition at line 115 of file ahci_dma.v.

afi_wid [ 5 : 0 ]
Output

Definition at line 116 of file ahci_dma.v.

afi_wlast
Output

Definition at line 117 of file ahci_dma.v.

afi_wstrb [ 7 : 0 ]
Output

Definition at line 118 of file ahci_dma.v.

afi_bvalid
Input

Definition at line 120 of file ahci_dma.v.

afi_bready
Output

Definition at line 121 of file ahci_dma.v.

afi_bid [ 5 : 0 ]
Input

Definition at line 122 of file ahci_dma.v.

afi_bresp [ 1 : 0 ]
Input

Definition at line 123 of file ahci_dma.v.

afi_wcount [ 7 : 0 ]
Input

Definition at line 125 of file ahci_dma.v.

afi_wacount [ 5 : 0 ]
Input

Definition at line 126 of file ahci_dma.v.

Definition at line 127 of file ahci_dma.v.

afi_araddr [ 31 : 0 ]
Output

Definition at line 130 of file ahci_dma.v.

afi_arvalid
Output

Definition at line 131 of file ahci_dma.v.

afi_arready
Input

Definition at line 132 of file ahci_dma.v.

afi_arid [ 5 : 0 ]
Output

Definition at line 133 of file ahci_dma.v.

afi_arlock [ 1 : 0 ]
Output

Definition at line 134 of file ahci_dma.v.

afi_arcache reg [ 3 : 0 ]
Output

Definition at line 135 of file ahci_dma.v.

afi_arprot [ 2 : 0 ]
Output

Definition at line 136 of file ahci_dma.v.

afi_arlen [ 3 : 0 ]
Output

Definition at line 137 of file ahci_dma.v.

afi_arsize [ 1 : 0 ]
Output

Definition at line 138 of file ahci_dma.v.

afi_arburst [ 1 : 0 ]
Output

Definition at line 139 of file ahci_dma.v.

afi_arqos [ 3 : 0 ]
Output

Definition at line 140 of file ahci_dma.v.

afi_rdata [ 63 : 0 ]
Input

Definition at line 142 of file ahci_dma.v.

afi_rvalid
Input

Definition at line 143 of file ahci_dma.v.

afi_rready
Output

Definition at line 144 of file ahci_dma.v.

afi_rid [ 5 : 0 ]
Input

Definition at line 145 of file ahci_dma.v.

afi_rlast
Input

Definition at line 146 of file ahci_dma.v.

afi_rresp [ 1 : 0 ]
Input

Definition at line 147 of file ahci_dma.v.

afi_rcount [ 7 : 0 ]
Input

Definition at line 149 of file ahci_dma.v.

afi_racount [ 2 : 0 ]
Input

Definition at line 150 of file ahci_dma.v.

Definition at line 151 of file ahci_dma.v.

debug_out [ 31 : 0 ]
Output

Definition at line 153 of file ahci_dma.v.

debug_out1 [ 31 : 0 ]
Output

Definition at line 154 of file ahci_dma.v.

debug_dma_h2d [ 31 : 0 ]
Output

Definition at line 156 of file ahci_dma.v.

SAFE_RD_BITS 3
Parameter

Definition at line 163 of file ahci_dma.v.

ct_data_ram [ 0 : 31 ]
Signal

Definition at line 165 of file ahci_dma.v.

int_data_addr
Signal

Definition at line 166 of file ahci_dma.v.

ctba_r
Signal

Definition at line 168 of file ahci_dma.v.

prdtl_mclk
Signal

Definition at line 169 of file ahci_dma.v.

Definition at line 170 of file ahci_dma.v.

prd_start_r
Signal

Definition at line 171 of file ahci_dma.v.

Definition at line 172 of file ahci_dma.v.

Definition at line 173 of file ahci_dma.v.

Definition at line 174 of file ahci_dma.v.

prd_enabled
Signal

Definition at line 175 of file ahci_dma.v.

Definition at line 176 of file ahci_dma.v.

ct_maddr
Signal

Definition at line 178 of file ahci_dma.v.

ct_done
Signal

Definition at line 179 of file ahci_dma.v.

Definition at line 180 of file ahci_dma.v.

afi_addr
Signal

Definition at line 181 of file ahci_dma.v.

Definition at line 182 of file ahci_dma.v.

Definition at line 184 of file ahci_dma.v.

Definition at line 185 of file ahci_dma.v.

Definition at line 186 of file ahci_dma.v.

Definition at line 187 of file ahci_dma.v.

Definition at line 189 of file ahci_dma.v.

Definition at line 190 of file ahci_dma.v.

is_ct_addr
Signal

Definition at line 191 of file ahci_dma.v.

is_prd_addr
Signal

Definition at line 192 of file ahci_dma.v.

is_data_addr
Signal

Definition at line 193 of file ahci_dma.v.

data_addr
Signal

Definition at line 195 of file ahci_dma.v.

data_len
Signal

Definition at line 196 of file ahci_dma.v.

data_irq
Signal

Definition at line 197 of file ahci_dma.v.

wcount
Signal

Definition at line 198 of file ahci_dma.v.

wcount_set
Signal

Definition at line 199 of file ahci_dma.v.

qwcount
Signal

Definition at line 200 of file ahci_dma.v.

qwcount_done
Signal

Definition at line 201 of file ahci_dma.v.

Definition at line 203 of file ahci_dma.v.

Definition at line 204 of file ahci_dma.v.

Definition at line 205 of file ahci_dma.v.

data_afi_re
Signal

Definition at line 207 of file ahci_dma.v.

prds_left
Signal

Definition at line 209 of file ahci_dma.v.

last_prd
Signal

Definition at line 210 of file ahci_dma.v.

afi_rd_ctl
Signal

Definition at line 212 of file ahci_dma.v.

ct_busy_r
Signal

Definition at line 213 of file ahci_dma.v.

prd_rd_busy
Signal

Definition at line 214 of file ahci_dma.v.

dev_wr_mclk
Signal

Definition at line 216 of file ahci_dma.v.

dev_wr_hclk
Signal

Definition at line 217 of file ahci_dma.v.

prd_wr
Signal

Definition at line 218 of file ahci_dma.v.

prd_rd
Signal

Definition at line 219 of file ahci_dma.v.

afi_wstb4
Signal

Definition at line 220 of file ahci_dma.v.

done_dev_wr
Signal

Definition at line 222 of file ahci_dma.v.

done_dev_rd
Signal

Definition at line 223 of file ahci_dma.v.

prd_done_hclk
Signal

Definition at line 224 of file ahci_dma.v.

done_flush
Signal

Definition at line 225 of file ahci_dma.v.

cmd_done_hclk
Signal

Definition at line 226 of file ahci_dma.v.

ct_done_mclk
Signal

Definition at line 227 of file ahci_dma.v.

afi_alen
Signal

Definition at line 228 of file ahci_dma.v.

Definition at line 229 of file ahci_dma.v.

Definition at line 231 of file ahci_dma.v.

raddr_prd_rq
Signal

Definition at line 234 of file ahci_dma.v.

Definition at line 236 of file ahci_dma.v.

raddr_ct_rq
Signal

Definition at line 238 of file ahci_dma.v.

raddr_ct_pend
Signal

Definition at line 239 of file ahci_dma.v.

Definition at line 248 of file ahci_dma.v.

Definition at line 249 of file ahci_dma.v.

waddr_data_rq
Signal

Definition at line 251 of file ahci_dma.v.

raddr_data_rq
Signal

Definition at line 252 of file ahci_dma.v.

Definition at line 254 of file ahci_dma.v.

Definition at line 255 of file ahci_dma.v.

ct_id
Signal

Definition at line 257 of file ahci_dma.v.

prd_id
Signal

Definition at line 258 of file ahci_dma.v.

dev_wr_id
Signal

Definition at line 259 of file ahci_dma.v.

dev_rd_id
Signal

Definition at line 260 of file ahci_dma.v.

afi_id
Signal

Definition at line 261 of file ahci_dma.v.

Definition at line 263 of file ahci_dma.v.

Definition at line 264 of file ahci_dma.v.

ct_data_reg
Signal

Definition at line 265 of file ahci_dma.v.

hrst_r
Signal

Definition at line 267 of file ahci_dma.v.

Definition at line 268 of file ahci_dma.v.

afi_dirty
Signal

Definition at line 271 of file ahci_dma.v.

Definition at line 272 of file ahci_dma.v.

Definition at line 273 of file ahci_dma.v.

Definition at line 274 of file ahci_dma.v.

Definition at line 275 of file ahci_dma.v.

aborting
Signal

Definition at line 276 of file ahci_dma.v.

Definition at line 277 of file ahci_dma.v.

Definition at line 278 of file ahci_dma.v.

afi_wid_abort
Signal

Definition at line 279 of file ahci_dma.v.

Definition at line 280 of file ahci_dma.v.

Definition at line 281 of file ahci_dma.v.

abort_rq_mclk
Signal

Definition at line 283 of file ahci_dma.v.

Definition at line 284 of file ahci_dma.v.

abort_debug
Signal

Definition at line 285 of file ahci_dma.v.

rwaddr_rq_r
Signal

Definition at line 286 of file ahci_dma.v.

debug_01
Signal

Definition at line 386 of file ahci_dma.v.

debug_02
Signal

Definition at line 387 of file ahci_dma.v.

debug_03
Signal

Definition at line 388 of file ahci_dma.v.

Definition at line 390 of file ahci_dma.v.

Definition at line 715 of file ahci_dma.v.

dbg_qwcount
Signal

Definition at line 716 of file ahci_dma.v.

Definition at line 717 of file ahci_dma.v.

Definition at line 718 of file ahci_dma.v.

Definition at line 719 of file ahci_dma.v.

Definition at line 720 of file ahci_dma.v.

ahci_dma_rd_fifo ahci_dma_rd_fifo_i
Module Instance

Definition at line 584 of file ahci_dma.v.

ahci_dma_wr_fifo ahci_dma_wr_fifo_i
Module Instance

Definition at line 610 of file ahci_dma.v.

axi_hp_abort axi_hp_abort_i
Module Instance

Definition at line 553 of file ahci_dma.v.

pulse_cross_clock cmd_start_hclk_i
Module Instance

Definition at line 636 of file ahci_dma.v.

pulse_cross_clock cmd_abort_hclk_i
Module Instance

Definition at line 646 of file ahci_dma.v.

pulse_cross_clock prd_start_hclk_i
Module Instance

Definition at line 656 of file ahci_dma.v.

pulse_cross_clock cmd_done_i
Module Instance

Definition at line 670 of file ahci_dma.v.

pulse_cross_clock ct_done_mclk_i
Module Instance

Definition at line 681 of file ahci_dma.v.

pulse_cross_clock prd_done_mclk_i
Module Instance

Definition at line 692 of file ahci_dma.v.

pulse_cross_clock abort_done_i
Module Instance

Definition at line 703 of file ahci_dma.v.


The documentation for this Module was generated from the following files: