x393  1.0
FPGAcodeforElphelNC393camera
simul_clk_mult_div Module Reference
Inheritance diagram for simul_clk_mult_div:
Collaboration diagram for simul_clk_mult_div:

Public Attributes

Inputs

clk_in  
en  

Outputs

clk_out  

Parameters

MULTIPLIER   3
DIVISOR   5
SKIP_FIRST   5

GENERATE

GENERATE [51]  
GENERATE [64]  

Signals

wire  clk_int

Module Instances

simul_clk_mult::simul_clk_mult_i   Module simul_clk_mult [generate]
sim_clk_div::sim_clk_div_i   Module sim_clk_div [generate]

Detailed Description

Definition at line 41 of file simul_clk_mult_div.v.

Member Data Documentation

MULTIPLIER 3
Parameter

Definition at line 42 of file simul_clk_mult_div.v.

DIVISOR 5
Parameter

Definition at line 43 of file simul_clk_mult_div.v.

SKIP_FIRST 5
Parameter

Definition at line 44 of file simul_clk_mult_div.v.

clk_in
Input

Definition at line 46 of file simul_clk_mult_div.v.

en
Input

Definition at line 47 of file simul_clk_mult_div.v.

clk_out
Output

Definition at line 48 of file simul_clk_mult_div.v.

clk_int
Signal

Definition at line 50 of file simul_clk_mult_div.v.

GENERATE [51]
GENERATE

Definition at line 51 of file simul_clk_mult_div.v.

GENERATE [64]
GENERATE

Definition at line 64 of file simul_clk_mult_div.v.

sim_clk_div sim_clk_div_i
Module Instance

Definition at line 66 of file simul_clk_mult_div.v.

simul_clk_mult simul_clk_mult_i
Module Instance

Definition at line 53 of file simul_clk_mult_div.v.


The documentation for this Module was generated from the following files: