x393  1.0
FPGAcodeforElphelNC393camera
simul_clk_mult Module Reference
Inheritance diagram for simul_clk_mult:

Static Public Member Functions

Always Constructs

ALWAYS_425  ( clk_in )
ALWAYS_426  ( clk_in )

Public Attributes

Inputs

clk_in  
en  

Outputs

clk_out  

Parameters

MULTIPLIER   3
SKIP_FIRST   5

Signals

real  phase
real  prev_phase
real  out_half_period
integer  num_period
reg  en1
reg  clk_out_r

Detailed Description

Definition at line 41 of file simul_clk_mult.v.

Member Function Documentation

ALWAYS_425 (   clk_in  
)
Always Construct

Definition at line 56 of file simul_clk_mult.v.

ALWAYS_426 (   clk_in  
)
Always Construct

Definition at line 66 of file simul_clk_mult.v.

Member Data Documentation

MULTIPLIER 3
Parameter

Definition at line 42 of file simul_clk_mult.v.

SKIP_FIRST 5
Parameter

Definition at line 43 of file simul_clk_mult.v.

clk_in
Input

Definition at line 45 of file simul_clk_mult.v.

en
Input

Definition at line 46 of file simul_clk_mult.v.

clk_out
Output

Definition at line 47 of file simul_clk_mult.v.

phase
Signal

Definition at line 49 of file simul_clk_mult.v.

prev_phase
Signal

Definition at line 50 of file simul_clk_mult.v.

Definition at line 51 of file simul_clk_mult.v.

num_period
Signal

Definition at line 52 of file simul_clk_mult.v.

en1
Signal

Definition at line 53 of file simul_clk_mult.v.

clk_out_r
Signal

Definition at line 54 of file simul_clk_mult.v.


The documentation for this Module was generated from the following files: