45 parameter RTC_STATUS_REG_ADDR =
'h31,
// address where status can be read out (currently just sequence # and alternating bit) 46 parameter RTC_SEC_USEC_ADDR =
'h32,
//'h33 address where seconds of the snapshot can be read (microseconds - next address) 49 parameter RTC_MHZ =
25,
// RTC input clock in MHz (should be interger number) 50 parameter RTC_BITC_PREDIV =
5,
// number of bits to generate 2 MHz pulses counting refclk 52 parameter RTC_SET_SEC =
1,
// 32-bit full number of seconds (and actually update timer) 54 parameter RTC_SET_STATUS =
3 // set status mode, and take a time snapshot (wait response and read time) 59 input mrst,
// @ posedge mclk - sync reset 61 input refclk,
// not a global clock, reference frequency < mclk/2 62 // programming interface 63 input [
7:
0]
cmd_ad,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 64 input cmd_stb,
// strobe (with first byte) for the command a/d 66 output [
7:
0]
status_ad,
// status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25] 67 output status_rq,
// input request to send status downstream 68 input status_start,
// Acknowledge of the first status packet byte (address) 72 // output reg snap); // take a snapshot (externally) 88 reg [
3:
0]
halfusec =
0;
// 1-hot running pulse with 0.5 usec period 105 reg [
31:
0]
pio_sec;
// seconds snapshot to be read as PIO 106 reg [
19:
0]
pio_usec;
// micro seconds snapshot to be read as PIO 107 reg pio_alt_snap;
// FF to invert after each PIO snapshot (used to generate status) 183 )
cmd_deser_32bit_i (
184 .
rst (
1'b0),
//rst), // input 197 .
REGISTER_STATUS (
0),
200 )
status_generate_i (
201 .
rst (
1'b0),
// rst), // input status_generate_i status_generate
9558RTC_SEC_USEC_ADDR'h32
[ADDR_MASK2!=0?2:ADDR_MASK1!=0?1:0:0] 9935we
9586pre_cntrreg[RTC_BITC_PREDIV-1:0]
[DATA_WIDTH-1:0] 9934data
[ADDR_WIDTH-1:0] 9933addr
cmd_deser_32bit_i cmd_deser
[ALL_BITS-1:0] 10777status
9557RTC_STATUS_REG_ADDR'h31