397
10795NUM_BYTES(PAYLOAD_BITS+21)>>3
10802status_r0wire[PAYLOAD_BITS-1:0]
10803status_rreg[PAYLOAD_BITS-1:0]
10797ALIGNED_STATUS_BIT_2(ALIGNED_STATUS_WIDTH>2)?2:0
status_generate_only_i status_generate_only[generate]
10801status_r0rreg[PAYLOAD_BITS-1:0]
10810rq_rreg[NUM_BYTES-2:0]
10796ALIGNED_STATUS_WIDTH((NUM_BYTES-2)<<3)+2
10781STATUS_BITS((PAYLOAD_BITS > 0) ? PAYLOAD_BITS: 1
10782ALL_BITSSTATUS_BITS + 32 * EXTRA_WORDS
10809aligned_statuswire[ALIGNED_STATUS_WIDTH-1:0]
10806datareg[NUM_BYTES-1<<3-1:0]
[ALL_BITS-1:0] 10777status
status_generate_extra_i status_generate_extra[generate]
[PAYLOAD_BITS-1:0] 10791status