simul_axi_master_rdaddr Module Reference

Inheritance diagram for simul_axi_master_rdaddr:

Collaboration diagram for simul_axi_master_rdaddr:

Public Attributes

Inputs
clk
reset
arid_in	[ID_WIDTH - 1 : 0 ]
araddr_in	[ADDRESS_WIDTH - 1 : 0 ]
arlen_in	[ 3 : 0 ]
arsize_in	[ 1 : 0 ]
arburst_in	[ 1 : 0 ]
arcache_in	[ 3 : 0 ]
arprot_in	[ 2 : 0 ]
arready
set_cmd

Outputs
arid	[ID_WIDTH - 1 : 0 ]
araddr	[ADDRESS_WIDTH - 1 : 0 ]
arlen	[ 3 : 0 ]
arsize	[ 1 : 0 ]
arburst	[ 1 : 0 ]
arcache	[ 3 : 0 ]
arprot	[ 2 : 0 ]
arvalid
ready

Parameters
ID_WIDTH	integer 12
ADDRESS_WIDTH	integer 32
LATENCY	integer 0
DEPTH	integer 8
DATA_DELAY	3 . 5
VALID_DELAY	4 . 0

Signals
wire[ID_WIDTH - 1 : 0 ]	arid_out
wire[ADDRESS_WIDTH - 1 : 0 ]	araddr_out
wire[ 3 : 0 ]	arlen_out
wire[ 1 : 0 ]	arsize_out
wire[ 1 : 0 ]	arburst_out
wire[ 3 : 0 ]	arcache_out
wire[ 2 : 0 ]	arprot_out
wire	arvalid_out

Module Instances
simul_axi_fifo::simul_axi_fifo_i	Module simul_axi_fifo

Detailed Description

Definition at line 42 of file simul_axi_master_rdaddr.v.

Member Data Documentation

ID_WIDTH 12

Parameter

Definition at line 44 of file simul_axi_master_rdaddr.v.

ADDRESS_WIDTH 32

Parameter

Definition at line 45 of file simul_axi_master_rdaddr.v.

LATENCY 0

Parameter

Definition at line 46 of file simul_axi_master_rdaddr.v.

DEPTH 8

Parameter

Definition at line 47 of file simul_axi_master_rdaddr.v.

DATA_DELAY 3 . 5

Parameter

Definition at line 48 of file simul_axi_master_rdaddr.v.

VALID_DELAY 4 . 0

Parameter

Definition at line 49 of file simul_axi_master_rdaddr.v.

clk

Input

Definition at line 53 of file simul_axi_master_rdaddr.v.

reset

Input

Definition at line 54 of file simul_axi_master_rdaddr.v.

arid_in [ID_WIDTH - 1 : 0 ]

Input

Definition at line 55 of file simul_axi_master_rdaddr.v.

araddr_in [ADDRESS_WIDTH - 1 : 0 ]

Input

Definition at line 56 of file simul_axi_master_rdaddr.v.

arlen_in [ 3 : 0 ]

Input

Definition at line 57 of file simul_axi_master_rdaddr.v.

arsize_in [ 1 : 0 ]

Input

Definition at line 58 of file simul_axi_master_rdaddr.v.

arburst_in [ 1 : 0 ]

Input

Definition at line 59 of file simul_axi_master_rdaddr.v.

arcache_in [ 3 : 0 ]

Input

Definition at line 60 of file simul_axi_master_rdaddr.v.

arprot_in [ 2 : 0 ]

Input

Definition at line 61 of file simul_axi_master_rdaddr.v.

arid [ID_WIDTH - 1 : 0 ]

Output

Definition at line 63 of file simul_axi_master_rdaddr.v.

araddr [ADDRESS_WIDTH - 1 : 0 ]

Output

Definition at line 64 of file simul_axi_master_rdaddr.v.

arlen [ 3 : 0 ]

Output

Definition at line 65 of file simul_axi_master_rdaddr.v.

arsize [ 1 : 0 ]

Output

Definition at line 66 of file simul_axi_master_rdaddr.v.

arburst [ 1 : 0 ]

Output

Definition at line 67 of file simul_axi_master_rdaddr.v.

arcache [ 3 : 0 ]

Output

Definition at line 68 of file simul_axi_master_rdaddr.v.

arprot [ 2 : 0 ]

Output

Definition at line 69 of file simul_axi_master_rdaddr.v.

arvalid

Output

Definition at line 70 of file simul_axi_master_rdaddr.v.

arready

Input

Definition at line 71 of file simul_axi_master_rdaddr.v.

set_cmd

Input

Definition at line 73 of file simul_axi_master_rdaddr.v.

ready

Output

Definition at line 74 of file simul_axi_master_rdaddr.v.

arid_out

Signal

Definition at line 76 of file simul_axi_master_rdaddr.v.

araddr_out

Signal

Definition at line 77 of file simul_axi_master_rdaddr.v.

arlen_out

Signal

Definition at line 78 of file simul_axi_master_rdaddr.v.

arsize_out

Signal

Definition at line 79 of file simul_axi_master_rdaddr.v.

arburst_out

Signal

Definition at line 80 of file simul_axi_master_rdaddr.v.

arcache_out

Signal

Definition at line 81 of file simul_axi_master_rdaddr.v.

arprot_out

Signal

Definition at line 82 of file simul_axi_master_rdaddr.v.

arvalid_out

Signal

Definition at line 83 of file simul_axi_master_rdaddr.v.

simul_axi_fifo simul_axi_fifo_i

Module Instance

Definition at line 94 of file simul_axi_master_rdaddr.v.

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The documentation for this Module was generated from the following files:

• simulation_modules/simul_axi_master_rdaddr.v