x393  1.0
FPGAcodeforElphelNC393camera
sens_hispi_din Module Reference
Inheritance diagram for sens_hispi_din:
Collaboration diagram for sens_hispi_din:

Public Attributes

Inputs

mclk  
mrst  
dly_data   [HISPI_NUMLANES * 8 - 1 : 0 ]
set_idelay   [HISPI_NUMLANES - 1 : 0 ]
ld_idelay  
ipclk  
ipclk2x  
irst  
din_p   [HISPI_NUMLANES - 1 : 0 ]
din_n   [HISPI_NUMLANES - 1 : 0 ]

Outputs

dout   [HISPI_NUMLANES * 4 - 1 : 0 ]

Parameters

IODELAY_GRP  "IODELAY_SENSOR"
IDELAY_VALUE  integer 0
REFCLK_FREQUENCY  real 200 . 0
HIGH_PERFORMANCE_MODE  "FALSE"
HISPI_NUMLANES   4
HISPI_CAPACITANCE  "DONT_CARE"
HISPI_DIFF_TERM  "TRUE"
HISPI_UNTUNED_SPLIT  "FALSE"
HISPI_DQS_BIAS  "TRUE"
HISPI_IBUF_DELAY_VALUE  " 0 "
HISPI_IBUF_LOW_PWR  "TRUE"
HISPI_IFD_DELAY_VALUE  "AUTO"
HISPI_IOSTANDARD  "DIFF_SSTL18_I"

GENERATE

GENERATE [73]  

Signals

wire[HISPI_NUMLANES - 1 : 0 ]  din
wire[HISPI_NUMLANES - 1 : 0 ]  din_dly

Module Instances

ibufds_ibufgds_50::ibufds_ibufgds0_i   Module ibufds_ibufgds_50 [generate]
ibufds_ibufgds::ibufds_ibufgds0_i   Module ibufds_ibufgds [generate]
idelay_nofine::pxd_dly_i   Module idelay_nofine [generate]
iserdes_mem::iserdes_pxd_i   Module iserdes_mem [generate]

Detailed Description

Definition at line 41 of file sens_hispi_din.v.

Member Data Documentation

IODELAY_GRP "IODELAY_SENSOR"
Parameter

Definition at line 42 of file sens_hispi_din.v.

IDELAY_VALUE 0
Parameter

Definition at line 43 of file sens_hispi_din.v.

REFCLK_FREQUENCY 200 . 0
Parameter

Definition at line 44 of file sens_hispi_din.v.

HIGH_PERFORMANCE_MODE "FALSE"
Parameter

Definition at line 45 of file sens_hispi_din.v.

HISPI_NUMLANES 4
Parameter

Definition at line 47 of file sens_hispi_din.v.

HISPI_CAPACITANCE "DONT_CARE"
Parameter

Definition at line 48 of file sens_hispi_din.v.

HISPI_DIFF_TERM "TRUE"
Parameter

Definition at line 49 of file sens_hispi_din.v.

HISPI_UNTUNED_SPLIT "FALSE"
Parameter

Definition at line 50 of file sens_hispi_din.v.

HISPI_DQS_BIAS "TRUE"
Parameter

Definition at line 51 of file sens_hispi_din.v.

HISPI_IBUF_DELAY_VALUE " 0 "
Parameter

Definition at line 52 of file sens_hispi_din.v.

HISPI_IBUF_LOW_PWR "TRUE"
Parameter

Definition at line 53 of file sens_hispi_din.v.

HISPI_IFD_DELAY_VALUE "AUTO"
Parameter

Definition at line 54 of file sens_hispi_din.v.

HISPI_IOSTANDARD "DIFF_SSTL18_I"
Parameter

Definition at line 55 of file sens_hispi_din.v.

mclk
Input

Definition at line 57 of file sens_hispi_din.v.

mrst
Input

Definition at line 58 of file sens_hispi_din.v.

dly_data [HISPI_NUMLANES * 8 - 1 : 0 ]
Input

Definition at line 59 of file sens_hispi_din.v.

set_idelay [HISPI_NUMLANES - 1 : 0 ]
Input

Definition at line 60 of file sens_hispi_din.v.

ld_idelay
Input

Definition at line 61 of file sens_hispi_din.v.

ipclk
Input

Definition at line 62 of file sens_hispi_din.v.

ipclk2x
Input

Definition at line 63 of file sens_hispi_din.v.

irst
Input

Definition at line 64 of file sens_hispi_din.v.

din_p [HISPI_NUMLANES - 1 : 0 ]
Input

Definition at line 65 of file sens_hispi_din.v.

din_n [HISPI_NUMLANES - 1 : 0 ]
Input

Definition at line 66 of file sens_hispi_din.v.

dout [HISPI_NUMLANES * 4 - 1 : 0 ]
Output

Definition at line 67 of file sens_hispi_din.v.

din
Signal

Definition at line 70 of file sens_hispi_din.v.

din_dly
Signal

Definition at line 71 of file sens_hispi_din.v.

GENERATE [73]
GENERATE

Definition at line 73 of file sens_hispi_din.v.

ibufds_ibufgds ibufds_ibufgds0_i
Module Instance

Definition at line 91 of file sens_hispi_din.v.

ibufds_ibufgds_50 ibufds_ibufgds0_i
Module Instance

Definition at line 77 of file sens_hispi_din.v.

idelay_nofine pxd_dly_i
Module Instance

Definition at line 106 of file sens_hispi_din.v.

iserdes_mem iserdes_pxd_i
Module Instance

Definition at line 121 of file sens_hispi_din.v.


The documentation for this Module was generated from the following files: