Static Public Member Functions

Always Constructs
ALWAYS_17	( mclk )
ALWAYS_18	( mclk )
ALWAYS_19	( hclk )
ALWAYS_20	( hclk )
ALWAYS_21	( mclk )
ALWAYS_22	( hclk )
ALWAYS_23	( hclk )
ALWAYS_24	( hclk )
ALWAYS_25	( hclk )
ALWAYS_26	( hclk )
ALWAYS_27	( hclk )
ALWAYS_28	( hclk )
ALWAYS_29	( hclk )

Public Attributes

Inputs
mrst
hrst
mclk
hclk
cmd_ad	[ 7 : 0 ]
cmd_stb
status_start
cmd_wrmem
page_ready_chn
frame_done_chn
line_unfinished_chn1	[FRAME_HEIGHT_BITS - 1 : 0 ]
xfer_reset_page_rd
buf_wpage_nxt
buf_wr
buf_wdata	[ 63 : 0 ]
xfer_reset_page_wr
buf_rpage_nxt
buf_rd
afi_awready
afi_wready
afi_bvalid
afi_bid	[ 5 : 0 ]
afi_bresp	[ 1 : 0 ]
afi_wcount	[ 7 : 0 ]
afi_wacount	[ 5 : 0 ]
afi_arready
afi_rdata	[ 63 : 0 ]
afi_rvalid
afi_rid	[ 5 : 0 ]
afi_rlast
afi_rresp	[ 1 : 0 ]
afi_rcount	[ 7 : 0 ]
afi_racount	[ 2 : 0 ]
debug_sl
debug_di

Outputs
status_ad	[ 7 : 0 ]
status_rq
frame_start_chn
next_page_chn
suspend_chn1
buf_rdata	[ 63 : 0 ]
afi_awaddr	[ 31 : 0 ]
afi_awvalid
afi_awid	[ 5 : 0 ]
afi_awlock	[ 1 : 0 ]
afi_awcache	[ 3 : 0 ]
afi_awprot	[ 2 : 0 ]
afi_awlen	[ 3 : 0 ]
afi_awsize	[ 1 : 0 ]
afi_awburst	[ 1 : 0 ]
afi_awqos	[ 3 : 0 ]
afi_wdata	[ 63 : 0 ]
afi_wvalid
afi_wid	[ 5 : 0 ]
afi_wlast
afi_wstrb	[ 7 : 0 ]
afi_bready
afi_wrissuecap1en
afi_araddr	[ 31 : 0 ]
afi_arvalid
afi_arid	[ 5 : 0 ]
afi_arlock	[ 1 : 0 ]
afi_arcache	[ 3 : 0 ]
afi_arprot	[ 2 : 0 ]
afi_arlen	[ 3 : 0 ]
afi_arsize	[ 1 : 0 ]
afi_arburst	[ 1 : 0 ]
afi_arqos	[ 3 : 0 ]
afi_rready
afi_rdissuecap1en
debug_do

Parameters
MEMBRIDGE_ADDR	'h200
MEMBRIDGE_MASK	'h7f0
MEMBRIDGE_CTRL	'h0
MEMBRIDGE_STATUS_CNTRL	'h1
MEMBRIDGE_LO_ADDR64	'h2
MEMBRIDGE_SIZE64	'h3
MEMBRIDGE_START64	'h4
MEMBRIDGE_LEN64	'h5
MEMBRIDGE_WIDTH64	'h6
MEMBRIDGE_MODE	'h7
MEMBRIDGE_STATUS_REG	'h3b
FRAME_HEIGHT_BITS	16
522
523
BUFWR_WE_WIDTH	4
SAFE_RD_BITS	3
DELAY_ADVANCE_ADDR	3

Signals
wire[ 3 : 0 ]	cmd_a
wire[ 31 : 0 ]	cmd_data
wire	cmd_we
wire	set_ctrl_w
wire	set_status_w
wire	set_lo_addr64_w
wire	set_size64_w
wire	set_start64_w
wire	set_len64_w
wire	set_mode_w
wire	set_width64_w
reg[ 4 : 0 ]	mode_reg_mclk
reg[ 4 : 0 ]	mode_reg
wire	cache_debug
reg[ 28 : 0 ]	lo_addr64_mclk
reg[ 28 : 0 ]	size64_mclk
reg[ 28 : 0 ]	start64_mclk
reg[ 28 : 0 ]	len64_mclk
reg[FRAME_WIDTH_BITS: 0 ]	width64_mclk
reg[FRAME_WIDTH_BITS: 0 ]	width64_minus1_mclk
reg	rdwr_en_mclk
reg	rdwr_reset_addr_mclk
reg	start_mclk
reg[ 28 : 0 ]	lo_addr64
reg[ 28 : 0 ]	size64
reg[ 28 : 0 ]	start64
reg[ 28 : 0 ]	len64
reg[FRAME_WIDTH_BITS: 0 ]	last_in_line64
reg[ 24 : 0 ]	last_addr1k
reg	rdwr_en
reg	rdwr_reset_addr
wire	start_hclk
reg	rd_start
reg	wr_start
reg[ 2 : 0 ]	rdwr_start
reg	wr_mode
wire	page_ready
wire	frame_done
wire	reset_page_wr
wire	reset_page_rd
reg	page_ready_rd
reg	page_ready_wr
reg	next_page_rd
reg	next_page_wr
wire	next_page
reg[ 4 : 0 ]	rd_id
reg[ 4 : 0 ]	wr_id
reg	read_no_more
reg	mrstn
reg[ 28 : 0 ]	rel_addr64
wire	advance_rel_addr_w
wire	advance_rel_addr_wr
wire	advance_rel_addr_rd
reg	advance_rel_addr
reg[DELAY_ADVANCE_ADDR - 1 : 0 ]	advance_rel_addr_d
reg[ 28 : 0 ]	left64
reg	last_burst
reg	rollover
reg[ 3 : 0 ]	afi_len
reg[ 4 : 0 ]	afi_len_plus1
reg	low4_zero
reg[ 28 : 0 ]	buf_left64
reg[FRAME_WIDTH_BITS: 0 ]	buf_in_line64
reg[ 28 : 0 ]	axi_addr64
wire	left_zero
reg	read_started
reg	write_busy
wire	rw_in_progress
reg	busy
reg	done
reg	pre_done
reg[ 7 : 0 ]	axi_arw_requested
reg[ 7 : 0 ]	axi_bursts_requested
reg[ 7 : 0 ]	wresp_conf
wire[ 7 : 0 ]	axi_wr_pending
reg[ 7 : 0 ]	axi_wr_left
wire[ 7 : 0 ]	axi_rd_pending
reg[ 7 : 0 ]	axi_rd_received
reg	read_busy
reg	read_over
reg	afi_bvalid_r
reg[ 1 : 0 ]	read_page
reg[ 2 : 0 ]	read_pages_ready
reg	afi_wd_safe_not_full
reg	afi_wa_safe_not_full
wire	bufrd_rd_w
wire	bufwr_we_w
reg[ 2 : 0 ]	bufrd_rd
reg[BUFWR_WE_WIDTH - 1 : 0 ]	bufwr_we
reg	buf_rdwr
wire	is_last_in_line
wire	is_last_in_page
wire	next_page_rd_w
wire	next_page_wr_w
wire	done_page_rd_w
wire	safe_some_left_rd_w
reg	left_was_1
reg	left_many
reg[ 3 : 0 ]	src_wcntr
reg	wlast
reg	src_was_f
reg	afi_rd_safe_not_empty
reg	afi_ra_safe_not_full
reg	afi_safe_rd_pending
reg[ 1 : 0 ]	write_page
reg[ 2 : 0 ]	write_pages_ready
reg[ 1 : 0 ]	write_page_r
reg[ 6 : 0 ]	buf_in_line64_r
reg[ 30 : 0 ]	dbg_read_counter
reg[ 63 : 0 ]	rdata_r
wire[ 63 : 0 ]	afi_wdata0
reg[ 15 : 0 ]	dbg_write_counter

Module Instances
pulse_cross_clock::start_i	Module pulse_cross_clock
pulse_cross_clock::page_ready_i	Module pulse_cross_clock
pulse_cross_clock::frame_done_i	Module pulse_cross_clock
pulse_cross_clock::reset_page_wr_i	Module pulse_cross_clock
pulse_cross_clock::reset_page_rd_i	Module pulse_cross_clock
elastic_cross_clock::elastic_cross_clock_i	Module elastic_cross_clock
cmd_deser::cmd_deser_32bit_i	Module cmd_deser
status_generate::status_generate_i	Module status_generate
mcntrl_buf_rd::chn1rd_buf_i	Module mcntrl_buf_rd
mcntrl_buf_wr::chn1wr_buf_i	Module mcntrl_buf_wr
debug_slave::debug_slave_i	Module debug_slave