membridge Member List

This is the complete list of members for membridge, including all inherited members.

SHIFT_WIDTH	debug_slave	Parameter
READ_WIDTH	debug_slave	Parameter
WRITE_WIDTH	debug_slave	Parameter
DEBUG_CMD_LATENCY	debug_slave	Parameter
mclk	debug_slave	Input
mrst	debug_slave	Input
debug_di	debug_slave	Input
debug_sl	debug_slave	Input
debug_do	debug_slave	Output
rd_data	debug_slave	Input
wr_data	debug_slave	Output
stb	debug_slave	Output
data_sr	debug_slave	Signal
cmd	debug_slave	Signal
cmd_reg	debug_slave	Signal
cmd_reg_dly	debug_slave	Signal
ext_rdata	debug_slave	Signal
WIDTH	elastic_cross_clock	Parameter
EXTRA_DLY	elastic_cross_clock	Parameter
rst	elastic_cross_clock	Input
src_clk	elastic_cross_clock	Input
dst_clk	elastic_cross_clock	Input
in_pulses	elastic_cross_clock	Input
out_pulse	elastic_cross_clock	Output
busy	elastic_cross_clock	Output
pend_cntr	elastic_cross_clock	Signal
busy_single	elastic_cross_clock	Signal
single_rq_w	elastic_cross_clock	Signal
pulse_cross_clock.EXTRA_DLY	pulse_cross_clock	Parameter
elastic_cross_clock.EXTRA_DLY	pulse_cross_clock	Parameter
pulse_cross_clock.rst	pulse_cross_clock	Input
elastic_cross_clock.rst	pulse_cross_clock	Input
pulse_cross_clock.src_clk	pulse_cross_clock	Input
elastic_cross_clock.src_clk	pulse_cross_clock	Input
pulse_cross_clock.dst_clk	pulse_cross_clock	Input
elastic_cross_clock.dst_clk	pulse_cross_clock	Input
pulse_cross_clock.in_pulse	pulse_cross_clock	Input
elastic_cross_clock.in_pulse	pulse_cross_clock	Input
pulse_cross_clock.out_pulse	pulse_cross_clock	Output
elastic_cross_clock.out_pulse	pulse_cross_clock	Output
pulse_cross_clock.busy	pulse_cross_clock	Output
elastic_cross_clock.busy	pulse_cross_clock	Output
pulse_cross_clock.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
elastic_cross_clock.EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
pulse_cross_clock.in_reg	pulse_cross_clock	Signal
elastic_cross_clock.in_reg	pulse_cross_clock	Signal
pulse_cross_clock.out_reg	pulse_cross_clock	Signal
elastic_cross_clock.out_reg	pulse_cross_clock	Signal
pulse_cross_clock.busy_r	pulse_cross_clock	Signal
elastic_cross_clock.busy_r	pulse_cross_clock	Signal
STATUS_REG_ADDR	status_generate	Parameter
PAYLOAD_BITS	status_generate	Parameter
REGISTER_STATUS	status_generate	Parameter
EXTRA_WORDS	status_generate	Parameter
EXTRA_REG_ADDR	status_generate	Parameter
rst	status_generate	Input
clk	status_generate	Input
srst	status_generate	Input
we	status_generate	Input
wd	status_generate	Input
status	status_generate	Input
ad	status_generate	Output
rq	status_generate	Output
start	status_generate	Input
STATUS_BITS	status_generate	Parameter
ALL_BITS	status_generate	Parameter
REGISTERS	ram_var_w_var_r	Parameter
LOG2WIDTH_WR	ram_var_w_var_r	Parameter
LOG2WIDTH_RD	ram_var_w_var_r	Parameter
11862	ram_var_w_var_r	Parameter
rclk	ram_var_w_var_r	Input
raddr	ram_var_w_var_r	Input
ren	ram_var_w_var_r	Input
regen	ram_var_w_var_r	Input
data_out	ram_var_w_var_r	Output
wclk	ram_var_w_var_r	Input
waddr	ram_var_w_var_r	Input
we	ram_var_w_var_r	Input
web	ram_var_w_var_r	Input
data_in	ram_var_w_var_r	Input
MEMBRIDGE_ADDR	membridge
MEMBRIDGE_MASK	membridge
MEMBRIDGE_CTRL	membridge
MEMBRIDGE_STATUS_CNTRL	membridge
MEMBRIDGE_LO_ADDR64	membridge
MEMBRIDGE_SIZE64	membridge
MEMBRIDGE_START64	membridge
MEMBRIDGE_LEN64	membridge
LOG2WIDTH_RD	mcntrl_buf_rd	Parameter
ext_clk	mcntrl_buf_rd	Input
ext_raddr	mcntrl_buf_rd	Input
ext_rd	mcntrl_buf_rd	Input
ext_regen	mcntrl_buf_rd	Input
ext_data_out	mcntrl_buf_rd	Output
wclk	mcntrl_buf_rd	Input
MEMBRIDGE_WIDTH64	membridge
wpage_in	mcntrl_buf_rd	Input
wpage_set	mcntrl_buf_rd	Input
page_next	mcntrl_buf_rd	Input
page	mcntrl_buf_rd	Output
we	mcntrl_buf_rd	Input
data_in	mcntrl_buf_rd	Input
page_r	mcntrl_buf_rd	Signal
waddr	mcntrl_buf_rd	Signal
LOG2WIDTH_WR	mcntrl_buf_wr	Parameter
ext_clk	mcntrl_buf_wr	Input
MEMBRIDGE_MODE	membridge
ext_waddr	mcntrl_buf_wr	Input
ext_we	mcntrl_buf_wr	Input
ext_data_in	mcntrl_buf_wr	Input
rclk	mcntrl_buf_wr	Input
rpage_in	mcntrl_buf_wr	Input
rpage_set	mcntrl_buf_wr	Input
page_next	mcntrl_buf_wr	Input
page	mcntrl_buf_wr	Output
rd	mcntrl_buf_wr	Input
data_out	mcntrl_buf_wr	Output
MEMBRIDGE_STATUS_REG	membridge
page_r	mcntrl_buf_wr	Signal
raddr	mcntrl_buf_wr	Signal
regen	mcntrl_buf_wr	Signal
FRAME_HEIGHT_BITS	membridge
522	membridge
523	membridge
mrst	membridge
hrst	membridge
mclk	membridge
hclk	membridge
cmd_ad	membridge
cmd_stb	membridge
status_ad	membridge
status_rq	membridge
status_start	membridge
frame_start_chn	membridge
next_page_chn	membridge
cmd_wrmem	membridge
page_ready_chn	membridge
frame_done_chn	membridge
line_unfinished_chn1	membridge
suspend_chn1	membridge
xfer_reset_page_rd	membridge
buf_wpage_nxt	membridge
buf_wr	membridge
buf_wdata	membridge
xfer_reset_page_wr	membridge
buf_rpage_nxt	membridge
buf_rd	membridge
buf_rdata	membridge
afi_awaddr	membridge
afi_awvalid	membridge
afi_awready	membridge
afi_awid	membridge
afi_awlock	membridge
afi_awcache	membridge
afi_awprot	membridge
afi_awlen	membridge
afi_awsize	membridge
afi_awburst	membridge
afi_awqos	membridge
afi_wdata	membridge
afi_wvalid	membridge
afi_wready	membridge
afi_wid	membridge
afi_wlast	membridge
afi_wstrb	membridge
afi_bvalid	membridge
afi_bready	membridge
afi_bid	membridge
afi_bresp	membridge
afi_wcount	membridge
afi_wacount	membridge
afi_wrissuecap1en	membridge
afi_araddr	membridge
afi_arvalid	membridge
afi_arready	membridge
afi_arid	membridge
afi_arlock	membridge
afi_arcache	membridge
afi_arprot	membridge
afi_arlen	membridge
afi_arsize	membridge
afi_arburst	membridge
afi_arqos	membridge
afi_rdata	membridge
afi_rvalid	membridge
afi_rready	membridge
afi_rid	membridge
afi_rlast	membridge
afi_rresp	membridge
afi_rcount	membridge
afi_racount	membridge
afi_rdissuecap1en	membridge
debug_do	membridge
debug_sl	membridge
debug_di	membridge
BUFWR_WE_WIDTH	membridge
SAFE_RD_BITS	membridge
cmd_a	membridge
cmd_data	membridge
cmd_we	membridge
set_ctrl_w	membridge
set_status_w	membridge
set_lo_addr64_w	membridge
set_size64_w	membridge
set_start64_w	membridge
set_len64_w	membridge
set_mode_w	membridge
set_width64_w	membridge
mode_reg_mclk	membridge
mode_reg	membridge
cache_debug	membridge
lo_addr64_mclk	membridge
size64_mclk	membridge
start64_mclk	membridge
len64_mclk	membridge
width64_mclk	membridge
width64_minus1_mclk	membridge
rdwr_en_mclk	membridge
rdwr_reset_addr_mclk	membridge
start_mclk	membridge
lo_addr64	membridge
size64	membridge
start64	membridge
len64	membridge
last_in_line64	membridge
last_addr1k	membridge
rdwr_en	membridge
rdwr_reset_addr	membridge
start_hclk	membridge
rd_start	membridge
wr_start	membridge
rdwr_start	membridge
wr_mode	membridge
page_ready	membridge
frame_done	membridge
reset_page_wr	membridge
reset_page_rd	membridge
page_ready_rd	membridge
page_ready_wr	membridge
next_page_rd	membridge
next_page_wr	membridge
next_page	membridge
rd_id	membridge
wr_id	membridge
read_no_more	membridge
mrstn	membridge
DELAY_ADVANCE_ADDR	membridge
rel_addr64	membridge
advance_rel_addr_w	membridge
advance_rel_addr_wr	membridge
advance_rel_addr_rd	membridge
advance_rel_addr	membridge
advance_rel_addr_d	membridge
left64	membridge
last_burst	membridge
rollover	membridge
afi_len	membridge
afi_len_plus1	membridge
low4_zero	membridge
buf_left64	membridge
buf_in_line64	membridge
axi_addr64	membridge
left_zero	membridge
read_started	membridge
write_busy	membridge
rw_in_progress	membridge
busy	membridge
done	membridge
pre_done	membridge
axi_arw_requested	membridge
axi_bursts_requested	membridge
wresp_conf	membridge
axi_wr_pending	membridge
axi_wr_left	membridge
axi_rd_pending	membridge
axi_rd_received	membridge
read_busy	membridge
read_over	membridge
afi_bvalid_r	membridge
read_page	membridge
read_pages_ready	membridge
afi_wd_safe_not_full	membridge
afi_wa_safe_not_full	membridge
bufrd_rd_w	membridge
bufwr_we_w	membridge
bufrd_rd	membridge
bufwr_we	membridge
buf_rdwr	membridge
is_last_in_line	membridge
is_last_in_page	membridge
next_page_rd_w	membridge
next_page_wr_w	membridge
done_page_rd_w	membridge
safe_some_left_rd_w	membridge
left_was_1	membridge
left_many	membridge
src_wcntr	membridge
wlast	membridge
src_was_f	membridge
afi_rd_safe_not_empty	membridge
afi_ra_safe_not_full	membridge
afi_safe_rd_pending	membridge
write_page	membridge
write_pages_ready	membridge
write_page_r	membridge
buf_in_line64_r	membridge
dbg_read_counter	membridge
rdata_r	membridge
afi_wdata0	membridge
dbg_write_counter	membridge
ADDR	cmd_deser	Parameter
ADDR_MASK	cmd_deser	Parameter
NUM_CYCLES	cmd_deser	Parameter
ADDR_WIDTH	cmd_deser	Parameter
DATA_WIDTH	cmd_deser	Parameter
ADDR1	cmd_deser	Parameter
ADDR_MASK1	cmd_deser	Parameter
ADDR2	cmd_deser	Parameter
ADDR_MASK2	cmd_deser	Parameter
WE_EARLY	cmd_deser	Parameter
rst	cmd_deser	Input
clk	cmd_deser	Input
srst	cmd_deser	Input
ad	cmd_deser	Input
stb	cmd_deser	Input
addr	cmd_deser	Output
data	cmd_deser	Output
we	cmd_deser	Output
WE_WIDTH	cmd_deser	Parameter
ALWAYS_17 mclk	membridge	Always Construct
ALWAYS_18 mclk	membridge	Always Construct
ALWAYS_19 hclk	membridge	Always Construct
ALWAYS_20 hclk	membridge	Always Construct
ALWAYS_21 mclk	membridge	Always Construct
ALWAYS_22 hclk	membridge	Always Construct
ALWAYS_23 hclk	membridge	Always Construct
ALWAYS_24 hclk	membridge	Always Construct
ALWAYS_25 hclk	membridge	Always Construct
ALWAYS_26 hclk	membridge	Always Construct
ALWAYS_27 hclk	membridge	Always Construct
ALWAYS_28 hclk	membridge	Always Construct
ALWAYS_280 wclk	mcntrl_buf_rd	Always Construct
ALWAYS_281 rclk	mcntrl_buf_wr	Always Construct
ALWAYS_29 hclk	membridge	Always Construct
ALWAYS_497 mclk	debug_slave	Always Construct
ALWAYS_499 src_clk	elastic_cross_clock	Always Construct
pulse_cross_clock.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
elastic_cross_clock.ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
pulse_cross_clock.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
elastic_cross_clock.ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
cmd_deser	membridge
cmd_deser_dual	cmd_deser	Module Instance
cmd_deser_multi	cmd_deser	Module Instance
cmd_deser_single	cmd_deser	Module Instance
debug_slave	membridge
elastic_cross_clock	membridge
GENERATE [107]	ram_var_w_var_r	GENERATE
GENERATE [63]	cmd_deser	GENERATE
GENERATE [68]	status_generate	GENERATE
mcntrl_buf_rd	membridge
mcntrl_buf_wr	membridge
pulse_cross_clock	membridge
pulse_cross_clock	membridge
pulse_cross_clock	membridge
pulse_cross_clock	membridge
pulse_cross_clock	membridge
ram36_declare_init.vh	ram_var_w_var_r	Include
ram36_pass_init.vh	ram_var_w_var_r	Include
ram_64w_64r	ram_var_w_var_r	Module Instance
ram_64w_lt64r	ram_var_w_var_r	Module Instance
ram_dummy	ram_var_w_var_r	Module Instance
ram_lt64w_64r	ram_var_w_var_r	Module Instance
ram_lt64w_lt64r	ram_var_w_var_r	Module Instance
mcntrl_buf_rd.ram_var_w_var_r	mcntrl_buf_rd	Module Instance
mcntrl_buf_wr.ram_var_w_var_r	mcntrl_buf_wr	Module Instance
status_generate	membridge
status_generate_extra	status_generate	Module Instance
status_generate_only	status_generate	Module Instance