level_cross_clocks_single_bit Module Reference

Inheritance diagram for level_cross_clocks_single_bit:

Collaboration diagram for level_cross_clocks_single_bit:

Static Public Member Functions

Always Constructs
ALWAYS_517	( clk )

Public Attributes

Inputs
clk
d_in

Outputs
d_out

Parameters
REGISTER	3
FAST0	1 'b0
FAST1	1 'b0

Signals
reg[REGISTER - 3 : 0 ]	regs
wire	d_sync
wire[REGISTER - 2 : 0 ]	regs_next

Module Instances
level_cross_clocks_sync_bit::level_cross_clocks_sync_bit_i	Module level_cross_clocks_sync_bit

Detailed Description

Definition at line 78 of file level_cross_clocks.v.

Member Function Documentation

ALWAYS_517 (   clk   )

Always Construct

Definition at line 91 of file level_cross_clocks.v.

Member Data Documentation

REGISTER 3

Parameter

Definition at line 79 of file level_cross_clocks.v.

FAST0 1 'b0

Parameter

Definition at line 80 of file level_cross_clocks.v.

FAST1 1 'b0

Parameter

Definition at line 81 of file level_cross_clocks.v.

clk

Input

Definition at line 83 of file level_cross_clocks.v.

d_in

Input

Definition at line 84 of file level_cross_clocks.v.

d_out

Output

Definition at line 85 of file level_cross_clocks.v.

regs

Signal

Definition at line 87 of file level_cross_clocks.v.

d_sync

Signal

Definition at line 88 of file level_cross_clocks.v.

regs_next

Signal

Definition at line 89 of file level_cross_clocks.v.

level_cross_clocks_sync_bit level_cross_clocks_sync_bit_i

Module Instance

Definition at line 96 of file level_cross_clocks.v.

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The documentation for this Module was generated from the following files:

• util_modules/level_cross_clocks.v