x393  1.0
FPGAcodeforElphelNC393camera
level_cross_clocks_sync_bit Module Reference
Inheritance diagram for level_cross_clocks_sync_bit:

Static Public Member Functions

Always Constructs

ALWAYS_518  ( clk )

Public Attributes

Inputs

clk  
d_in  

Outputs

d_out  

Parameters

FAST0   1 'b0
FAST1   1 'b0

Signals

reg[ 1 : 0 ]  sync_zer

Detailed Description

Definition at line 104 of file level_cross_clocks.v.

Member Function Documentation

ALWAYS_518 (   clk  
)
Always Construct

Definition at line 117 of file level_cross_clocks.v.

Member Data Documentation

FAST0 1 'b0
Parameter

Definition at line 105 of file level_cross_clocks.v.

FAST1 1 'b0
Parameter

Definition at line 106 of file level_cross_clocks.v.

clk
Input

Definition at line 108 of file level_cross_clocks.v.

d_in
Input

Definition at line 109 of file level_cross_clocks.v.

d_out
Output

Definition at line 110 of file level_cross_clocks.v.

sync_zer
Signal

Definition at line 115 of file level_cross_clocks.v.


The documentation for this Module was generated from the following files: