dqs_single Module Reference

Inheritance diagram for dqs_single:

Collaboration diagram for dqs_single:

Public Attributes

Inputs
clk
clk_div
rst
dci_disable
dly_data	[ 7 : 0 ]
din	[ 3 : 0 ]
tin	[ 3 : 0 ]
set_odelay
ld_odelay
set_idelay
ld_idelay

Inouts
dqs
ndqs

Outputs
dqs_received_dly

Parameters
IODELAY_GRP	"IODELAY_MEMORY"
IDELAY_VALUE	integer 0
ODELAY_VALUE	integer 0
IBUF_LOW_PWR	"TRUE"
IOSTANDARD	"DIFF_SSTL15_T_DCI"
SLEW	"SLOW"
REFCLK_FREQUENCY	real 300 . 0
HIGH_PERFORMANCE_MODE	"FALSE"

Signals
wire	d_ser
wire	dqs_tri
wire	dqs_data_dly
wire	dqs_di

Module Instances
oserdes_mem::oserdes_i	Module oserdes_mem
odelay_fine_pipe::dqs_out_dly_i	Module odelay_fine_pipe
IOBUFDS_DCIEN::iobufs_dqs_i	Module IOBUFDS_DCIEN
idelay_fine_pipe::dqs_in_dly_i	Module idelay_fine_pipe

Detailed Description

Definition at line 40 of file dqs_single.v.

Member Data Documentation

IODELAY_GRP "IODELAY_MEMORY"

Parameter

Definition at line 41 of file dqs_single.v.

IDELAY_VALUE 0

Parameter

Definition at line 42 of file dqs_single.v.

ODELAY_VALUE 0

Parameter

Definition at line 43 of file dqs_single.v.

IBUF_LOW_PWR "TRUE"

Parameter

Definition at line 44 of file dqs_single.v.

IOSTANDARD "DIFF_SSTL15_T_DCI"

Parameter

Definition at line 45 of file dqs_single.v.

SLEW "SLOW"

Parameter

Definition at line 46 of file dqs_single.v.

REFCLK_FREQUENCY 300 . 0

Parameter

Definition at line 47 of file dqs_single.v.

HIGH_PERFORMANCE_MODE "FALSE"

Parameter

Definition at line 48 of file dqs_single.v.

dqs

Inout

Definition at line 50 of file dqs_single.v.

ndqs

Inout

Definition at line 51 of file dqs_single.v.

clk

Input

Definition at line 52 of file dqs_single.v.

clk_div

Input

Definition at line 53 of file dqs_single.v.

rst

Input

Definition at line 54 of file dqs_single.v.

dqs_received_dly

Output

Definition at line 55 of file dqs_single.v.

dci_disable

Input

Definition at line 59 of file dqs_single.v.

dly_data [ 7 : 0 ]

Input

Definition at line 60 of file dqs_single.v.

din [ 3 : 0 ]

Input

Definition at line 61 of file dqs_single.v.

tin [ 3 : 0 ]

Input

Definition at line 62 of file dqs_single.v.

set_odelay

Input

Definition at line 63 of file dqs_single.v.

ld_odelay

Input

Definition at line 64 of file dqs_single.v.

set_idelay

Input

Definition at line 65 of file dqs_single.v.

ld_idelay

Input

Definition at line 66 of file dqs_single.v.

d_ser

Signal

Definition at line 68 of file dqs_single.v.

dqs_tri

Signal

Definition at line 69 of file dqs_single.v.

dqs_data_dly

Signal

Definition at line 70 of file dqs_single.v.

dqs_di

Signal

Definition at line 71 of file dqs_single.v.

idelay_fine_pipe dqs_in_dly_i

Module Instance

Definition at line 115 of file dqs_single.v.

IOBUFDS_DCIEN iobufs_dqs_i

Module Instance

Definition at line 100 of file dqs_single.v.

odelay_fine_pipe dqs_out_dly_i

Module Instance

Definition at line 85 of file dqs_single.v.

oserdes_mem oserdes_i

Module Instance

Definition at line 74 of file dqs_single.v.

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The documentation for this Module was generated from the following files:

• memctrl/phy/dqs_single.v