Public Attributes

Inputs
mclk
dq_tri	[ 1 : 0 ]
dqs_tri	[ 1 : 0 ]
SDRST
SDCLK
SDNCLK
SDA	[ADDRESS_NUMBER - 1 : 0 ]
SDBA	[ 2 : 0 ]
SDWE
SDRAS
SDCAS
SDCKE
SDODT
SDDML
SDDMU

Inouts
SDD	[ 15 : 0 ]
DQSL
NDQSL
DQSU
NDQSU

Parameters
ADDRESS_NUMBER	15
TRISTATE_DELAY_CLK	4 'h2
TRISTATE_DELAY	0
CLK_DELAY	1500
CMDA_DELAY	1500
DQS_IN_DELAY	1500
DQ_IN_DELAY	1500
DQS_OUT_DELAY	1500
DQ_OUT_DELAY	1500
CLK_DELAY_H	CLK_DELAY / 4
CMDA_DELAY_H	CMDA_DELAY / 4
DQS_IN_DELAY_H	DQS_IN_DELAY / 4
DQ_IN_DELAY_H	DQ_IN_DELAY / 4
DQS_OUT_DELAY_H	DQS_OUT_DELAY / 4
DQ_OUT_DELAY_H	DQ_OUT_DELAY / 4

Signals
wire	CLK_DELAY_HSDCLK_H1
wire	CLK_DELAY_HSDNCLK_H1
wire	CMDA_DELAY_HSDRST_H1
wire[ADDRESS_NUMBER - 1 : 0 ]	CMDA_DELAY_HSDA_H1
wire[ 2 : 0 ]	CMDA_DELAY_HSDBA_H1
wire	CMDA_DELAY_HSDWE_H1
wire	CMDA_DELAY_HSDRAS_H1
wire	CMDA_DELAY_HSDCAS_H1
wire	CMDA_DELAY_HSDCKE_H1
wire	CMDA_DELAY_HSDODT_H1
wire	CLK_DELAY_HSDCLK_H2
wire	CLK_DELAY_HSDNCLK_H2
wire	CMDA_DELAY_HSDRST_H2
wire[ADDRESS_NUMBER - 1 : 0 ]	CMDA_DELAY_HSDA_H2
wire[ 2 : 0 ]	CMDA_DELAY_HSDBA_H2
wire	CMDA_DELAY_HSDWE_H2
wire	CMDA_DELAY_HSDRAS_H2
wire	CMDA_DELAY_HSDCAS_H2
wire	CMDA_DELAY_HSDCKE_H2
wire	CMDA_DELAY_HSDODT_H2
wire	CLK_DELAY_HSDCLK_H3
wire	CLK_DELAY_HSDNCLK_H3
wire	CMDA_DELAY_HSDRST_H3
wire[ADDRESS_NUMBER - 1 : 0 ]	CMDA_DELAY_HSDA_H3
wire[ 2 : 0 ]	CMDA_DELAY_HSDBA_H3
wire	CMDA_DELAY_HSDWE_H3
wire	CMDA_DELAY_HSDRAS_H3
wire	CMDA_DELAY_HSDCAS_H3
wire	CMDA_DELAY_HSDCKE_H3
wire	CMDA_DELAY_HSDODT_H3
wire	CLK_DELAY_HSDCLK_D
wire	CLK_DELAY_HSDNCLK_D
wire	CMDA_DELAY_HSDRST_D
wire[ADDRESS_NUMBER - 1 : 0 ]	CMDA_DELAY_HSDA_D
wire[ 2 : 0 ]	CMDA_DELAY_HSDBA_D
wire	CMDA_DELAY_HSDWE_D
wire	CMDA_DELAY_HSDRAS_D
wire	CMDA_DELAY_HSDCAS_D
wire	CMDA_DELAY_HSDCKE_D
wire	CMDA_DELAY_HSDODT_D
wire[ 1 : 0 ]	en_dq_dl
wire[ 1 : 0 ]	en_dqs_dl
wire[ 1 : 0 ]	TRISTATE_DELAYen_dq_d0
wire[ 1 : 0 ]	TRISTATE_DELAYen_dqs_d0
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dq_d1
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dqs_d1
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dq_d2
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dqs_d2
wire[ 1 : 0 ]	DQ_IN_DELAY_Hen_dq_d3
wire[ 1 : 0 ]	DQ_IN_DELAY_Hen_dqs_d3
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dq_d4
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dqs_d4
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dq_d5
wire[ 1 : 0 ]	DQ_OUT_DELAY_Hen_dqs_d5
wire[ 1 : 0 ]	DQ_IN_DELAY_Hen_dq_d6
wire[ 1 : 0 ]	DQ_IN_DELAY_Hen_dqs_d6
wire[ 1 : 0 ]	DQ_IN_DELAY_Hen_dq_d7
wire[ 1 : 0 ]	DQ_IN_DELAY_Hen_dqs_d7
wire[ 1 : 0 ]	en_dq_out
wire[ 1 : 0 ]	en_dqs_out
wire[ 1 : 0 ]	en_dq_in
wire[ 1 : 0 ]	en_dqs_in
wire[ 15 : 0 ]	SDD_H1
wire	SDDML_H1
wire	SDDMU_H1
wire	DQSL_H1
wire	NDQSL_H1
wire	DQSU_H1
wire	NDQSU_H1
wire[ 15 : 0 ]	SDD_H2
wire	SDDML_H2
wire	SDDMU_H2
wire	DQSL_H2
wire	NDQSL_H2
wire	DQSU_H2
wire	NDQSU_H2
wire[ 15 : 0 ]	SDD_H3
wire	SDDML_H3
wire	SDDMU_H3
wire	DQSL_H3
wire	NDQSL_H3
wire	DQSU_H3
wire	NDQSU_H3
wire[ 15 : 0 ]	SDD_D
wire	SDDML_D
wire	SDDMU_D
wire	DQSL_D
wire	NDQSL_D
wire	DQSU_D
wire	NDQSU_D
wire[ 15 : 0 ]	SDD_DH1
wire	DQSL_DH1
wire	NDQSL_DH1
wire	DQSU_DH1
wire	NDQSU_DH1
wire[ 15 : 0 ]	SDD_DH2
wire	DQSL_DH2
wire	NDQSL_DH2
wire	DQSU_DH2
wire	NDQSU_DH2
wire[ 15 : 0 ]	SDD_DH3
wire	DQSL_DH3
wire	NDQSL_DH3
wire	DQSU_DH3
wire	NDQSU_DH3