ddr3_wrap Member List

This is the complete list of members for ddr3_wrap, including all inherited members.

WIDTH	dly_16	Parameter
clk	dly_16	Input
rst	dly_16	Input
dly	dly_16	Input
din	dly_16	Input
dout	dly_16	Output
ADDRESS_NUMBER	ddr3_wrap
TRISTATE_DELAY_CLK	ddr3_wrap
TRISTATE_DELAY	ddr3_wrap
CLK_DELAY	ddr3_wrap
CMDA_DELAY	ddr3_wrap
DQS_IN_DELAY	ddr3_wrap
DQ_IN_DELAY	ddr3_wrap
DQS_OUT_DELAY	ddr3_wrap
DQ_OUT_DELAY	ddr3_wrap
mclk	ddr3_wrap
dq_tri	ddr3_wrap
dqs_tri	ddr3_wrap
SDRST	ddr3_wrap
SDCLK	ddr3_wrap
SDNCLK	ddr3_wrap
SDA	ddr3_wrap
SDBA	ddr3_wrap
SDWE	ddr3_wrap
SDRAS	ddr3_wrap
SDCAS	ddr3_wrap
SDCKE	ddr3_wrap
SDODT	ddr3_wrap
SDD	ddr3_wrap
SDDML	ddr3_wrap
DQSL	ddr3_wrap
NDQSL	ddr3_wrap
SDDMU	ddr3_wrap
DQSU	ddr3_wrap
NDQSU	ddr3_wrap
CLK_DELAY_H	ddr3_wrap
CMDA_DELAY_H	ddr3_wrap
DQS_IN_DELAY_H	ddr3_wrap
DQ_IN_DELAY_H	ddr3_wrap
DQS_OUT_DELAY_H	ddr3_wrap
DQ_OUT_DELAY_H	ddr3_wrap
CLK_DELAY_HSDCLK_H1	ddr3_wrap
CLK_DELAY_HSDNCLK_H1	ddr3_wrap
CMDA_DELAY_HSDRST_H1	ddr3_wrap
CMDA_DELAY_HSDA_H1	ddr3_wrap
CMDA_DELAY_HSDBA_H1	ddr3_wrap
CMDA_DELAY_HSDWE_H1	ddr3_wrap
CMDA_DELAY_HSDRAS_H1	ddr3_wrap
CMDA_DELAY_HSDCAS_H1	ddr3_wrap
CMDA_DELAY_HSDCKE_H1	ddr3_wrap
CMDA_DELAY_HSDODT_H1	ddr3_wrap
CLK_DELAY_HSDCLK_H2	ddr3_wrap
CLK_DELAY_HSDNCLK_H2	ddr3_wrap
CMDA_DELAY_HSDRST_H2	ddr3_wrap
CMDA_DELAY_HSDA_H2	ddr3_wrap
CMDA_DELAY_HSDBA_H2	ddr3_wrap
CMDA_DELAY_HSDWE_H2	ddr3_wrap
CMDA_DELAY_HSDRAS_H2	ddr3_wrap
CMDA_DELAY_HSDCAS_H2	ddr3_wrap
CMDA_DELAY_HSDCKE_H2	ddr3_wrap
CMDA_DELAY_HSDODT_H2	ddr3_wrap
CLK_DELAY_HSDCLK_H3	ddr3_wrap
CLK_DELAY_HSDNCLK_H3	ddr3_wrap
CMDA_DELAY_HSDRST_H3	ddr3_wrap
CMDA_DELAY_HSDA_H3	ddr3_wrap
CMDA_DELAY_HSDBA_H3	ddr3_wrap
CMDA_DELAY_HSDWE_H3	ddr3_wrap
CMDA_DELAY_HSDRAS_H3	ddr3_wrap
CMDA_DELAY_HSDCAS_H3	ddr3_wrap
CMDA_DELAY_HSDCKE_H3	ddr3_wrap
CMDA_DELAY_HSDODT_H3	ddr3_wrap
CLK_DELAY_HSDCLK_D	ddr3_wrap
CLK_DELAY_HSDNCLK_D	ddr3_wrap
CMDA_DELAY_HSDRST_D	ddr3_wrap
CMDA_DELAY_HSDA_D	ddr3_wrap
CMDA_DELAY_HSDBA_D	ddr3_wrap
CMDA_DELAY_HSDWE_D	ddr3_wrap
CMDA_DELAY_HSDRAS_D	ddr3_wrap
CMDA_DELAY_HSDCAS_D	ddr3_wrap
CMDA_DELAY_HSDCKE_D	ddr3_wrap
CMDA_DELAY_HSDODT_D	ddr3_wrap
en_dq_dl	ddr3_wrap
en_dqs_dl	ddr3_wrap
TRISTATE_DELAYen_dq_d0	ddr3_wrap
TRISTATE_DELAYen_dqs_d0	ddr3_wrap
DQ_OUT_DELAY_Hen_dq_d1	ddr3_wrap
DQ_OUT_DELAY_Hen_dqs_d1	ddr3_wrap
DQ_OUT_DELAY_Hen_dq_d2	ddr3_wrap
DQ_OUT_DELAY_Hen_dqs_d2	ddr3_wrap
DQ_IN_DELAY_Hen_dq_d3	ddr3_wrap
DQ_IN_DELAY_Hen_dqs_d3	ddr3_wrap
DQ_OUT_DELAY_Hen_dq_d4	ddr3_wrap
DQ_OUT_DELAY_Hen_dqs_d4	ddr3_wrap
DQ_OUT_DELAY_Hen_dq_d5	ddr3_wrap
DQ_OUT_DELAY_Hen_dqs_d5	ddr3_wrap
DQ_IN_DELAY_Hen_dq_d6	ddr3_wrap
DQ_IN_DELAY_Hen_dqs_d6	ddr3_wrap
DQ_IN_DELAY_Hen_dq_d7	ddr3_wrap
DQ_IN_DELAY_Hen_dqs_d7	ddr3_wrap
en_dq_out	ddr3_wrap
en_dqs_out	ddr3_wrap
en_dq_in	ddr3_wrap
en_dqs_in	ddr3_wrap
SDD_H1	ddr3_wrap
SDDML_H1	ddr3_wrap
SDDMU_H1	ddr3_wrap
DQSL_H1	ddr3_wrap
NDQSL_H1	ddr3_wrap
DQSU_H1	ddr3_wrap
NDQSU_H1	ddr3_wrap
SDD_H2	ddr3_wrap
SDDML_H2	ddr3_wrap
SDDMU_H2	ddr3_wrap
DQSL_H2	ddr3_wrap
NDQSL_H2	ddr3_wrap
DQSU_H2	ddr3_wrap
NDQSU_H2	ddr3_wrap
SDD_H3	ddr3_wrap
SDDML_H3	ddr3_wrap
SDDMU_H3	ddr3_wrap
DQSL_H3	ddr3_wrap
NDQSL_H3	ddr3_wrap
DQSU_H3	ddr3_wrap
NDQSU_H3	ddr3_wrap
SDD_D	ddr3_wrap
SDDML_D	ddr3_wrap
SDDMU_D	ddr3_wrap
DQSL_D	ddr3_wrap
NDQSL_D	ddr3_wrap
DQSU_D	ddr3_wrap
NDQSU_D	ddr3_wrap
SDD_DH1	ddr3_wrap
DQSL_DH1	ddr3_wrap
NDQSL_DH1	ddr3_wrap
DQSU_DH1	ddr3_wrap
NDQSU_DH1	ddr3_wrap
SDD_DH2	ddr3_wrap
DQSL_DH2	ddr3_wrap
NDQSL_DH2	ddr3_wrap
DQSU_DH2	ddr3_wrap
NDQSU_DH2	ddr3_wrap
SDD_DH3	ddr3_wrap
DQSL_DH3	ddr3_wrap
NDQSL_DH3	ddr3_wrap
DQSU_DH3	ddr3_wrap
NDQSU_DH3	ddr3_wrap
ddr3	ddr3_wrap
dly01_16	dly_16	Module Instance
dly_16	ddr3_wrap
GENERATE [50]	dly_16	GENERATE