ahci_sata_layers Module Reference

Inheritance diagram for ahci_sata_layers:

Collaboration diagram for ahci_sata_layers:

Static Public Member Functions

Always Constructs
ALWAYS_588	( clk )
ALWAYS_589	( datascope_clk )
ALWAYS_590	( clk )

Public Attributes

Inputs
exrst
reliable_clk
h2d_data	[ 31 : 0 ]
h2d_mask	[ 1 : 0 ]
h2d_type	[ 1 : 0 ]
h2d_valid
d2h_ready
pcmd_st_cleared
syncesc_send
comreset_send
set_offline
send_R_OK
send_R_ERR
sctl_ipm	[ 3 : 0 ]
sctl_spd	[ 3 : 0 ]
extclk_p	wire
extclk_n	wire
rxp_in	wire
rxn_in	wire
drp_rst
drp_clk
drp_en
drp_we
drp_addr	[ 14 : 0 ]
drp_di	[ 15 : 0 ]
hclk

Outputs
rst
clk
h2d_ready
d2h_data	[ 31 : 0 ]
d2h_mask	[ 1 : 0 ]
d2h_type	[ 1 : 0 ]
d2h_valid
d2h_many
phy_speed	[ 1 : 0 ]
gtx_ready
xmit_ok
xmit_err
x_rdy_collision
syncesc_recv
syncesc_send_done
cominit_got
serr_DT
serr_DS
serr_DH
serr_DC
serr_DB
serr_DW
serr_DI
serr_EE
serr_EP
serr_EC
serr_ET
serr_EM
serr_EI
txp_out	wire
txn_out	wire
datascope_clk
datascope_waddr	[ADDRESS_BITS - 1 : 0 ]
datascope_we
datascope_di	[ 31 : 0 ]
drp_rdy
drp_do	[ 15 : 0 ]
xclk_period	[FREQ_METER_WIDTH - 1 : 0 ]
debug_phy	[ 31 : 0 ]
debug_link	[ 31 : 0 ]

Parameters
ADDRESS_BITS	10
DATASCOPE_START_BIT	14
DATASCOPE_POST_MEAS	16
BITS_TO_START_XMIT	6
DATA_BYTE_WIDTH	4
ELASTIC_DEPTH	4
ELASTIC_OFFSET	7
FREQ_METER_WIDTH	12
PHY_SPEED	2
FIFO_ADDR_WIDTH	9
D2H_TYPE_DMA	0
D2H_TYPE_FIS_HEAD	1
D2H_TYPE_OK	2
D2H_TYPE_ERR	3
H2D_TYPE_FIS_DATA	0
H2D_TYPE_FIS_HEAD	1
H2D_TYPE_FIS_LAST	2

Signals
wire	phy_ready
wire	link_established
wire[ 31 : 0 ]	ll_h2d_data_in
wire[ 1 : 0 ]	ll_h2d_mask_in
wire	ll_strobe_out
wire	ll_h2d_last
wire[ 1 : 0 ]	h2d_type_out
wire[ 31 : 0 ]	ll_d2h_data_out
wire[ 1 : 0 ]	ll_d2h_mask_out
wire	ll_d2h_valid
wire	ll_d2h_almost_full
reg[ 1 : 0 ]	d2h_type_in
reg	fis_over_r
reg	ll_frame_req
wire	ll_frame_ackn
wire	ll_incom_start
wire	ll_incom_done
wire	ll_incom_invalidate
reg	ll_incom_invalidate_r
wire	ll_link_reset
wire[DATA_BYTE_WIDTH * 8 - 1 : 0 ]	ph2ll_data_out
wire[DATA_BYTE_WIDTH - 1 : 0 ]	ph2ll_charisk_out
wire[DATA_BYTE_WIDTH - 1 : 0 ]	ph2ll_err_out
wire[DATA_BYTE_WIDTH * 8 - 1 : 0 ]	ll2ph_data_in
wire[DATA_BYTE_WIDTH - 1 : 0 ]	ll2ph_charisk_in
wire[FIFO_ADDR_WIDTH - 1 : 0 ]	h2d_raddr
wire[ 1 : 0 ]	h2d_fifo_re_regen
wire[FIFO_ADDR_WIDTH - 1 : 0 ]	h2d_waddr
wire[FIFO_ADDR_WIDTH : 0 ]	h2d_fill
wire	h2d_nempty
wire[FIFO_ADDR_WIDTH - 1 : 0 ]	d2h_raddr
wire[ 1 : 0 ]	d2h_fifo_re_regen
wire[FIFO_ADDR_WIDTH - 1 : 0 ]	d2h_waddr
wire[FIFO_ADDR_WIDTH : 0 ]	d2h_fill
wire	d2h_nempty
wire	h2d_fifo_rd
wire	h2d_fifo_wr
wire	d2h_fifo_rd
wire	d2h_fifo_wr
reg	h2d_pending
wire	rxelsfull
wire	rxelsempty
wire	xclk
wire	debug_detected_alignp
wire[ 31 : 0 ]	debug_phy0
wire[ 31 : 0 ]	datascope0_di
reg[ 1 : 0 ]	debug_last_d2h_type_in
reg[ 1 : 0 ]	debug_last_d2h_type
reg	dbg_was_link5
wire	dbg_was_link5_xclk

Module Instances
pulse_cross_clock::dbg_was_link5_i	Module pulse_cross_clock
link::link	Module link
sata_phy::phy	Module sata_phy
fifo_sameclock_control::fifo_h2d_control_i	Module fifo_sameclock_control
ram18p_var_w_var_r::fifo_h2d_i	Module ram18p_var_w_var_r
fifo_sameclock_control::fifo_d2h_control_i	Module fifo_sameclock_control
ram18p_var_w_var_r::fifo_d2h_i	Module ram18p_var_w_var_r
freq_meter::freq_meter_i	Module freq_meter

Detailed Description

Definition at line 28 of file ahci_sata_layers.v.

Member Function Documentation

ALWAYS_588 (   clk   )

Always Construct

Definition at line 241 of file ahci_sata_layers.v.

ALWAYS_589 (   datascope_clk   )

Always Construct

Definition at line 253 of file ahci_sata_layers.v.

ALWAYS_590 (   clk   )

Always Construct

Definition at line 322 of file ahci_sata_layers.v.

Member Data Documentation

ADDRESS_BITS 10

Parameter

Definition at line 30 of file ahci_sata_layers.v.

DATASCOPE_START_BIT 14

Parameter

Definition at line 31 of file ahci_sata_layers.v.

DATASCOPE_POST_MEAS 16

Parameter

Definition at line 32 of file ahci_sata_layers.v.

BITS_TO_START_XMIT 6

Parameter

Definition at line 34 of file ahci_sata_layers.v.

DATA_BYTE_WIDTH 4

Parameter

Definition at line 35 of file ahci_sata_layers.v.

ELASTIC_DEPTH 4

Parameter

Definition at line 36 of file ahci_sata_layers.v.

ELASTIC_OFFSET 7

Parameter

Definition at line 37 of file ahci_sata_layers.v.

FREQ_METER_WIDTH 12

Parameter

Definition at line 38 of file ahci_sata_layers.v.

exrst

Input

Definition at line 41 of file ahci_sata_layers.v.

reliable_clk

Input

Definition at line 42 of file ahci_sata_layers.v.

rst

Output

Definition at line 43 of file ahci_sata_layers.v.

clk

Output

Definition at line 44 of file ahci_sata_layers.v.

h2d_data [ 31 : 0 ]

Input

Definition at line 47 of file ahci_sata_layers.v.

h2d_mask [ 1 : 0 ]

Input

Definition at line 48 of file ahci_sata_layers.v.

h2d_type [ 1 : 0 ]

Input

Definition at line 49 of file ahci_sata_layers.v.

h2d_valid

Input

Definition at line 50 of file ahci_sata_layers.v.

h2d_ready

Output

Definition at line 51 of file ahci_sata_layers.v.

d2h_data [ 31 : 0 ]

Output

Definition at line 54 of file ahci_sata_layers.v.

d2h_mask [ 1 : 0 ]

Output

Definition at line 55 of file ahci_sata_layers.v.

d2h_type [ 1 : 0 ]

Output

Definition at line 56 of file ahci_sata_layers.v.

d2h_valid

Output

Definition at line 57 of file ahci_sata_layers.v.

d2h_many

Output

Definition at line 58 of file ahci_sata_layers.v.

d2h_ready

Input

Definition at line 59 of file ahci_sata_layers.v.

phy_speed [ 1 : 0 ]

Output

Definition at line 62 of file ahci_sata_layers.v.

gtx_ready

Output

Definition at line 63 of file ahci_sata_layers.v.

xmit_ok

Output

Definition at line 64 of file ahci_sata_layers.v.

xmit_err

Output

Definition at line 65 of file ahci_sata_layers.v.

x_rdy_collision

Output

Definition at line 66 of file ahci_sata_layers.v.

syncesc_recv

Output

Definition at line 67 of file ahci_sata_layers.v.

pcmd_st_cleared

Input

Definition at line 69 of file ahci_sata_layers.v.

syncesc_send

Input

Definition at line 70 of file ahci_sata_layers.v.

syncesc_send_done

Output

Definition at line 71 of file ahci_sata_layers.v.

comreset_send

Input

Definition at line 72 of file ahci_sata_layers.v.

cominit_got

Output

Definition at line 73 of file ahci_sata_layers.v.

set_offline

Input

Definition at line 74 of file ahci_sata_layers.v.

send_R_OK

Input

Definition at line 76 of file ahci_sata_layers.v.

send_R_ERR

Input

Definition at line 77 of file ahci_sata_layers.v.

serr_DT

Output

Definition at line 81 of file ahci_sata_layers.v.

serr_DS

Output

Definition at line 82 of file ahci_sata_layers.v.

serr_DH

Output

Definition at line 83 of file ahci_sata_layers.v.

serr_DC

Output

Definition at line 84 of file ahci_sata_layers.v.

serr_DB

Output

Definition at line 85 of file ahci_sata_layers.v.

serr_DW

Output

Definition at line 86 of file ahci_sata_layers.v.

serr_DI

Output

Definition at line 87 of file ahci_sata_layers.v.

serr_EE

Output

Definition at line 89 of file ahci_sata_layers.v.

serr_EP

Output

Definition at line 90 of file ahci_sata_layers.v.

serr_EC

Output

Definition at line 91 of file ahci_sata_layers.v.

serr_ET

Output

Definition at line 92 of file ahci_sata_layers.v.

serr_EM

Output

Definition at line 93 of file ahci_sata_layers.v.

serr_EI

Output

Definition at line 94 of file ahci_sata_layers.v.

sctl_ipm [ 3 : 0 ]

Input

Definition at line 96 of file ahci_sata_layers.v.

sctl_spd [ 3 : 0 ]

Input

Definition at line 97 of file ahci_sata_layers.v.

extclk_p wire

Input

Definition at line 101 of file ahci_sata_layers.v.

extclk_n wire

Input

Definition at line 102 of file ahci_sata_layers.v.

txp_out wire

Output

Definition at line 104 of file ahci_sata_layers.v.

txn_out wire

Output

Definition at line 105 of file ahci_sata_layers.v.

rxp_in wire

Input

Definition at line 106 of file ahci_sata_layers.v.

rxn_in wire

Input

Definition at line 107 of file ahci_sata_layers.v.

datascope_clk

Output

Definition at line 110 of file ahci_sata_layers.v.

datascope_waddr [ADDRESS_BITS - 1 : 0 ]

Output

Definition at line 111 of file ahci_sata_layers.v.

datascope_we

Output

Definition at line 112 of file ahci_sata_layers.v.

datascope_di [ 31 : 0 ]

Output

Definition at line 113 of file ahci_sata_layers.v.

drp_rst

Input

Definition at line 117 of file ahci_sata_layers.v.

drp_clk

Input

Definition at line 118 of file ahci_sata_layers.v.

drp_en

Input

Definition at line 119 of file ahci_sata_layers.v.

drp_we

Input

Definition at line 120 of file ahci_sata_layers.v.

drp_addr [ 14 : 0 ]

Input

Definition at line 121 of file ahci_sata_layers.v.

drp_di [ 15 : 0 ]

Input

Definition at line 122 of file ahci_sata_layers.v.

drp_rdy

Output

Definition at line 123 of file ahci_sata_layers.v.

drp_do [ 15 : 0 ]

Output

Definition at line 124 of file ahci_sata_layers.v.

xclk_period [FREQ_METER_WIDTH - 1 : 0 ]

Output

Definition at line 126 of file ahci_sata_layers.v.

debug_phy [ 31 : 0 ]

Output

Definition at line 127 of file ahci_sata_layers.v.

debug_link [ 31 : 0 ]

Output

Definition at line 128 of file ahci_sata_layers.v.

hclk

Input

Definition at line 129 of file ahci_sata_layers.v.

PHY_SPEED 2

Parameter

Definition at line 133 of file ahci_sata_layers.v.

FIFO_ADDR_WIDTH 9

Parameter

Definition at line 134 of file ahci_sata_layers.v.

D2H_TYPE_DMA 0

Parameter

Definition at line 136 of file ahci_sata_layers.v.

D2H_TYPE_FIS_HEAD 1

Parameter

Definition at line 137 of file ahci_sata_layers.v.

D2H_TYPE_OK 2

Parameter

Definition at line 138 of file ahci_sata_layers.v.

D2H_TYPE_ERR 3

Parameter

Definition at line 139 of file ahci_sata_layers.v.

H2D_TYPE_FIS_DATA 0

Parameter

Definition at line 141 of file ahci_sata_layers.v.

H2D_TYPE_FIS_HEAD 1

Parameter

Definition at line 142 of file ahci_sata_layers.v.

H2D_TYPE_FIS_LAST 2

Parameter

Definition at line 143 of file ahci_sata_layers.v.

phy_ready

Signal

Definition at line 145 of file ahci_sata_layers.v.

link_established

Signal

Definition at line 146 of file ahci_sata_layers.v.

ll_h2d_data_in

Signal

Definition at line 147 of file ahci_sata_layers.v.

ll_h2d_mask_in

Signal

Definition at line 148 of file ahci_sata_layers.v.

ll_strobe_out

Signal

Definition at line 149 of file ahci_sata_layers.v.

ll_h2d_last

Signal

Definition at line 150 of file ahci_sata_layers.v.

h2d_type_out

Signal

Definition at line 151 of file ahci_sata_layers.v.

ll_d2h_data_out

Signal

Definition at line 153 of file ahci_sata_layers.v.

ll_d2h_mask_out

Signal

Definition at line 154 of file ahci_sata_layers.v.

ll_d2h_valid

Signal

Definition at line 155 of file ahci_sata_layers.v.

ll_d2h_almost_full

Signal

Definition at line 156 of file ahci_sata_layers.v.

d2h_type_in

Signal

Definition at line 157 of file ahci_sata_layers.v.

fis_over_r

Signal

Definition at line 158 of file ahci_sata_layers.v.

ll_frame_req

Signal

Definition at line 160 of file ahci_sata_layers.v.

ll_frame_ackn

Signal

Definition at line 161 of file ahci_sata_layers.v.

ll_incom_start

Signal

Definition at line 163 of file ahci_sata_layers.v.

ll_incom_done

Signal

Definition at line 164 of file ahci_sata_layers.v.

ll_incom_invalidate

Signal

Definition at line 165 of file ahci_sata_layers.v.

ll_incom_invalidate_r

Signal

Definition at line 166 of file ahci_sata_layers.v.

ll_link_reset

Signal

Definition at line 169 of file ahci_sata_layers.v.

ph2ll_data_out

Signal

Definition at line 171 of file ahci_sata_layers.v.

ph2ll_charisk_out

Signal

Definition at line 172 of file ahci_sata_layers.v.

ph2ll_err_out

Signal

Definition at line 173 of file ahci_sata_layers.v.

ll2ph_data_in

Signal

Definition at line 174 of file ahci_sata_layers.v.

ll2ph_charisk_in

Signal

Definition at line 175 of file ahci_sata_layers.v.

h2d_raddr

Signal

Definition at line 177 of file ahci_sata_layers.v.

h2d_fifo_re_regen

Signal

Definition at line 178 of file ahci_sata_layers.v.

h2d_waddr

Signal

Definition at line 179 of file ahci_sata_layers.v.

h2d_fill

Signal

Definition at line 180 of file ahci_sata_layers.v.

h2d_nempty

Signal

Definition at line 181 of file ahci_sata_layers.v.

d2h_raddr

Signal

Definition at line 183 of file ahci_sata_layers.v.

d2h_fifo_re_regen

Signal

Definition at line 184 of file ahci_sata_layers.v.

d2h_waddr

Signal

Definition at line 185 of file ahci_sata_layers.v.

d2h_fill

Signal

Definition at line 186 of file ahci_sata_layers.v.

d2h_nempty

Signal

Definition at line 187 of file ahci_sata_layers.v.

h2d_fifo_rd

Signal

Definition at line 188 of file ahci_sata_layers.v.

h2d_fifo_wr

Signal

Definition at line 189 of file ahci_sata_layers.v.

d2h_fifo_rd

Signal

Definition at line 191 of file ahci_sata_layers.v.

d2h_fifo_wr

Signal

Definition at line 192 of file ahci_sata_layers.v.

h2d_pending

Signal

Definition at line 193 of file ahci_sata_layers.v.

rxelsfull

Signal

Definition at line 195 of file ahci_sata_layers.v.

rxelsempty

Signal

Definition at line 196 of file ahci_sata_layers.v.

xclk

Signal

Definition at line 197 of file ahci_sata_layers.v.

debug_detected_alignp

Signal

Definition at line 199 of file ahci_sata_layers.v.

debug_phy0

Signal

Definition at line 200 of file ahci_sata_layers.v.

datascope0_di

Signal

Definition at line 202 of file ahci_sata_layers.v.

debug_last_d2h_type_in

Signal

Definition at line 238 of file ahci_sata_layers.v.

debug_last_d2h_type

Signal

Definition at line 239 of file ahci_sata_layers.v.

dbg_was_link5

Signal

Definition at line 250 of file ahci_sata_layers.v.

dbg_was_link5_xclk

Signal

Definition at line 251 of file ahci_sata_layers.v.

fifo_sameclock_control fifo_h2d_control_i

Module Instance

Definition at line 415 of file ahci_sata_layers.v.

fifo_sameclock_control fifo_d2h_control_i

Module Instance

Definition at line 449 of file ahci_sata_layers.v.

freq_meter freq_meter_i

Module Instance

Definition at line 483 of file ahci_sata_layers.v.

link link

Module Instance

Definition at line 272 of file ahci_sata_layers.v.

pulse_cross_clock dbg_was_link5_i

Module Instance

Definition at line 258 of file ahci_sata_layers.v.

ram18p_var_w_var_r fifo_h2d_i

Module Instance

Definition at line 432 of file ahci_sata_layers.v.

ram18p_var_w_var_r fifo_d2h_i

Module Instance

Definition at line 466 of file ahci_sata_layers.v.

sata_phy phy

Module Instance

Definition at line 350 of file ahci_sata_layers.v.

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The documentation for this Module was generated from the following files:

• x393_sata/ahci/ahci_sata_layers.v