x393  1.0
FPGAcodeforElphelNC393camera
cmda_single.v
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1 
39 `timescale 1ns/1ps
40 
41 module cmda_single #(
42  parameter IODELAY_GRP ="IODELAY_MEMORY",
43  parameter integer ODELAY_VALUE = 0,
44  parameter IOSTANDARD = "SSTL15",
45  parameter SLEW = "SLOW",
46  parameter real REFCLK_FREQUENCY = 300.0,
47  parameter HIGH_PERFORMANCE_MODE = "FALSE"
48 )(
49  output dq, // I/O pad (appears on the output 1/2 clk_div earlier, than DDR data)
50  input clk, // free-running system clock, same frequency as iclk (shared for R/W)
51  input clk_div, // free-running half clk frequency, front aligned to clk (shared for R/W)
52  input rst,
53  input [7:0] dly_data, // delay value (3 LSB - fine delay)
54  input [1:0] din, // parallel data to be sent out
55 // input [1:0] tin, // tristate for data out (sent out earlier than data!)
56  input tin, // tristate for data out (sent out earlier than data!)
57  input set_delay, // clk_div synchronous load odelay value from dly_data
58  input ld_delay // clk_div synchronous set odealy value from loaded
59 );
60 wire d_ser;
61 wire dq_tri;
63 
65  .MODE_DDR("FALSE")
66 ) oserdes_i (
67  .clk(clk), // serial output clock
68  .clk_div(clk_div), // oclk divided by 2, front aligned
69  .rst(rst), // reset
70  .din(din[1:0]), // parallel data in
71 // .tin(tin[1:0]), // parallel tri-state in
72  .tin(tin), // parallel tri-state in
73  .dout_dly(d_ser), // data out to be connected to odelay input
74  .dout_iob(), // data out to be connected directly to the output buffer
75  .tout_dly(), // tristate out to be connected to odelay input
76  .tout_iob(dq_tri) // tristate out to be connected directly to the tristate control of the output buffer
77 );
80  .DELAY_VALUE(ODELAY_VALUE),
83 ) dqs_out_dly_i(
84  .clk(clk_div),
85  .rst(rst),
86  .set(set_delay),
87  .ld(ld_delay),
88  .delay(dly_data[7:0]),
89  .data_in(d_ser),
91 );
92 
95  .SLEW(SLEW)
96 ) iobufs_dqs_i (
97  .O(dq),
98  .I(dq_data_dly),
99  .T(dq_tri));
100 
101 endmodule
102 
6071SLEW"SLOW"
Definition: cmda_single.v:45
6085dq_data_dlywire
Definition: cmda_single.v:62
6070IOSTANDARD"SSTL15"
Definition: cmda_single.v:44
6083d_serwire
Definition: cmda_single.v:60
[MODE_DDR=="TRUE"?3:1:0] 11538din
Definition: oserdes_mem.v:48
[7:0] 6078dly_data
Definition: cmda_single.v:53
iobufs_dqs_i OBUFT
Definition: cmda_single.v:93
[1:0] 6079din
Definition: cmda_single.v:54
6073HIGH_PERFORMANCE_MODE"FALSE"
Definition: cmda_single.v:47
dqs_out_dly_i odelay_fine_pipe
Definition: cmda_single.v:78
oserdes_i oserdes_mem
Definition: cmda_single.v:64
6068IODELAY_GRP"IODELAY_MEMORY"
Definition: cmda_single.v:42
[MODE_DDR=="TRUE"?3:0:0] 11539tin
Definition: oserdes_mem.v:50
real 6072REFCLK_FREQUENCY300.0
Definition: cmda_single.v:46
integer 6069ODELAY_VALUE0
Definition: cmda_single.v:43
6084dq_triwire
Definition: cmda_single.v:61