os/linux-2.6-tag--devboard-R2_10-4/arch/cris/arch-v32/drivers/elphel/pgm_functions.c

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00001 /*!********************************************************************************
00002 *! FILE NAME  : pgm_functions.c
00003 *! DESCRIPTION: sensor/FPGA programming functions, called from
00004 *! IRQ/tasklet
00005 *! Copyright (C) 2008 Elphel, Inc.
00006 *! -----------------------------------------------------------------------------**
00007 *!
00008 *!  This program is free software: you can redistribute it and/or modify
00009 *!  it under the terms of the GNU General Public License as published by
00010 *!  the Free Software Foundation, either version 3 of the License, or
00011 *!  (at your option) any later version.
00012 *!
00013 *!  This program is distributed in the hope that it will be useful,
00014 *!  but WITHOUT ANY WARRANTY; without even the implied warranty of
00015 *!  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00016 *!  GNU General Public License for more details.
00017 *!
00018 *!  You should have received a copy of the GNU General Public License
00019 *!  along with this program.  If not, see <http://www.gnu.org/licenses/>.
00020 *! -----------------------------------------------------------------------------**
00021 *!  $Log: pgm_functions.c,v $
00022 *!  Revision 1.1.1.1  2008/11/27 20:04:00  elphel
00023 *!
00024 *!
00025 *!  Revision 1.32  2008/11/27 09:27:31  elphel
00026 *!  Support fro new parameters (vignetting correction related)
00027 *!
00028 *!  Revision 1.31  2008/11/14 01:01:40  elphel
00029 *!  fixed new bug in pgm_gammaload
00030 *!
00031 *!  Revision 1.30  2008/11/13 05:40:45  elphel
00032 *!  8.0.alpha16 - modified histogram storage, profiling
00033 *!
00034 *!  Revision 1.29  2008/11/03 18:43:18  elphel
00035 *!  8.0.alpha12 with working apps/astreamer
00036 *!
00037 *!  Revision 1.28  2008/10/31 18:26:32  elphel
00038 *!  Adding support for constants like SENSOR_REGS32 (defined constant plus 32 to simplify referencing sensor registers from PHP
00039 *!
00040 *!  Revision 1.27  2008/10/29 04:18:28  elphel
00041 *!  v.8.0.alpha10 made a separate structure for global parameters (not related to particular frames in a frame queue)
00042 *!
00043 *!  Revision 1.26  2008/10/23 08:08:05  elphel
00044 *!  corrected histogram window size setup (data written to FPGA is actual window size -2 for both width and height)
00045 *!
00046 *!  Revision 1.25  2008/10/22 05:29:03  elphel
00047 *!  Rev. 8.0.alpha5 - working on external trigger mode - moved programming away from the sequencer that can only pass 24 data bits
00048 *!
00049 *!  Revision 1.24  2008/10/21 04:03:39  elphel
00050 *!  bug fix (missing break in switch)
00051 *!
00052 *!  Revision 1.23  2008/10/20 18:45:07  elphel
00053 *!  just more debug printk
00054 *!
00055 *!  Revision 1.22  2008/10/18 06:14:21  elphel
00056 *!  8.0.alpha4 - removed some obsolete parameters, renumbered others, split P_FLIP into P_FLIPH and P_FLIPV (different latencies because of bad frames), pgm_window-> pgm_window, pgm_window_safe
00057 *!
00058 *!  Revision 1.21  2008/10/17 05:44:48  elphel
00059 *!  fixing latencies
00060 *!
00061 *!  Revision 1.20  2008/10/12 06:13:10  elphel
00062 *!  snapshot
00063 *!
00064 *!  Revision 1.19  2008/10/11 18:46:07  elphel
00065 *!  snapshot
00066 *!
00067 *!  Revision 1.18  2008/10/08 21:26:25  elphel
00068 *!  snapsot 7.2.0.pre4 - first images (actually - second)
00069 *!
00070 *!  Revision 1.17  2008/10/06 08:33:03  elphel
00071 *!  snapshot, first images
00072 *!
00073 *!  Revision 1.15  2008/10/05 05:13:33  elphel
00074 *!  snapshot003
00075 *!
00076 *!  Revision 1.14  2008/10/04 16:10:12  elphel
00077 *!  snapshot
00078 *!
00079 *!  Revision 1.13  2008/09/28 00:31:57  elphel
00080 *!  snapshot
00081 *!
00082 *!  Revision 1.12  2008/09/25 00:58:12  elphel
00083 *!  snapshot
00084 *!
00085 *!  Revision 1.11  2008/09/22 22:55:49  elphel
00086 *!  snapshot
00087 *!
00088 *!  Revision 1.10  2008/09/19 04:37:26  elphel
00089 *!  snapshot
00090 *!
00091 *!  Revision 1.9  2008/09/16 00:49:32  elphel
00092 *!  snapshot
00093 *!
00094 *!  Revision 1.8  2008/09/12 20:40:13  elphel
00095 *!  snapshot
00096 *!
00097 *!  Revision 1.7  2008/09/12 00:23:59  elphel
00098 *!  removed cc353.c, cc353.h
00099 *!
00100 *!  Revision 1.6  2008/09/05 23:21:32  elphel
00101 *!  snapshot
00102 *!
00103 *!  Revision 1.4  2008/09/04 17:37:13  elphel
00104 *!  documenting
00105 *!
00106 *!  Revision 1.3  2008/07/29 01:15:06  elphel
00107 *!  another snapshot
00108 *!
00109 *!  Revision 1.2  2008/07/27 23:25:07  elphel
00110 *!  next snapshot
00111 *!
00112 *!  Revision 1.1  2008/07/27 04:27:49  elphel
00113 *!  next snapshot
00114 *!
00115 *!
00116 */
00117 
00118 // TODO:remove unneeded
00119 #include <linux/types.h> 
00120 #include <asm/div64.h>   
00121 
00122 #include <linux/module.h>
00123 #include <linux/sched.h>
00124 #include <linux/slab.h>
00125 #include <linux/errno.h>
00126 #include <linux/kernel.h>
00127 #include <linux/fs.h>
00128 #include <linux/string.h>
00129 #include <linux/init.h>
00130 #include <linux/autoconf.h>
00131 #include <linux/vmalloc.h>
00132 
00133 #include <asm/system.h>
00134 #include <asm/byteorder.h> // endians
00135 #include <asm/io.h>
00136 
00137 #include <asm/irq.h>
00138 
00139 #include <asm/delay.h>
00140 #include <asm/uaccess.h>
00141 #include <asm/elphel/c313a.h>
00142 #include <asm/elphel/exifa.h>
00143 #include "fpgactrl.h"  // defines port_csp0_addr, port_csp4_addr 
00144 #include "fpga_sdram.h" // use a single fpga_initSDRAM(void)
00145 #include "fpgaconfi2c.h"  //to control clocks
00146 //#include "cc3x3.h"
00147 #include "fpga_io.h"
00148 #include "x3x3.h"           // hardware definitions
00149 #include "framepars.h"
00150 #include "sensor_common.h"
00151 #include "gamma_tables.h"
00152 #include "quantization_tables.h"
00153 #include "latency.h"
00154 #include "pgm_functions.h"
00155 #include "cxdma.h"         // is_dma_on()
00156 #include "jpeghead.h"      // to program FPGA Huffman tables
00157 
00161 #if ELPHEL_DEBUG
00162 // #define MDF2(x) { if (GLOBALPARS(G_DEBUG) & (1 <<2)) {printk("%s:%d:%s ",__FILE__,__LINE__,__FUNCTION__ );x ;} }
00163  #define MDF3(x) { if (GLOBALPARS(G_DEBUG) & (1 <<3)) {printk("%s:%d:%s ",__FILE__,__LINE__,__FUNCTION__ );x ;} }
00164  #define MDF9(x) { if (GLOBALPARS(G_DEBUG) & (1 <<9)) {printk("%s:%d:%s ",__FILE__,__LINE__,__FUNCTION__ );x ;} }
00165  #define MDF16(x) { if (GLOBALPARS(G_DEBUG) & (1 <<16)) {printk("%s:%d:%s ",__FILE__,__LINE__,__FUNCTION__ );x ;} }
00166  #define ELPHEL_DEBUG_THIS 0
00167 // #define ELPHEL_DEBUG_THIS 1
00168 #else
00169 // #define MDF2(x)
00170  #define MDF3(x)
00171  #define MDF9(x)
00172  #define MDF16(x)
00173  #define ELPHEL_DEBUG_THIS 0
00174 #endif
00175 
00176 #if ELPHEL_DEBUG_THIS
00177   #define MDF1(x) printk("%s:%d:%s ",__FILE__,__LINE__,__FUNCTION__ );x
00178   #define MD1(x)  printk("%s:%d: ",__FILE__,__LINE__ );x
00179   #define MD12(x) printk("%s:%d: ",__FILE__,__LINE__ );x
00180 #else
00181   #define MDF1(x)
00182   #define MD1(x)
00183   #define MD12(x)
00184 #endif
00185 
00186 
00187   int pgm_recalcseq     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8); 
00188   int pgm_detectsensor  (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00189   int pgm_sensorphase   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00190   int pgm_i2c           (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00191   int pgm_initsensor    (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00192   int pgm_afterinit     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00193   int pgm_window        (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00194   int pgm_window_safe   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00195 inline int pgm_window_common (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00196   int pgm_exposure      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00197   int pgm_gains         (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00198   int pgm_triggermode   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00199   int pgm_sensorin      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00200   int pgm_sensorstop    (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00201   int pgm_sensorrun     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00202   int pgm_gamma         (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00203   int pgm_hist          (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00204   int pgm_aexp          (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00205   int pgm_quality       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00206   int pgm_memsensor     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00207   int pgm_memcompressor (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00208   int pgm_limitfps      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00209   int pgm_compmode      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00210   int pgm_focusmode     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00211   int pgm_trigseq       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00212   int pgm_irq           (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00213   int pgm_comprestart   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00214   int pgm_compstop      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00215   int pgm_compctl       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00216   int pgm_gammaload     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00217   int pgm_sensorregs    (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00218   int pgm_prescal       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8);
00219 
00223 int init_pgm_proc(void) {
00224   int i;
00225   MDF1(printk("\n"));
00226   for (i=0;i<64;i++) sensorproc->pgm_func[i]=NULL;
00227   sensorproc->pgm_func[onchange_recalcseq]=    &pgm_recalcseq;     
00228   sensorproc->pgm_func[onchange_detectsensor]= &pgm_detectsensor;  
00229   sensorproc->pgm_func[onchange_sensorphase]=  &pgm_sensorphase;   
00230   sensorproc->pgm_func[onchange_i2c]=          &pgm_i2c;           
00231   sensorproc->pgm_func[onchange_initsensor]=   &pgm_initsensor;    
00232   sensorproc->pgm_func[onchange_afterinit]=    &pgm_afterinit;     
00233   sensorproc->pgm_func[onchange_window]=       &pgm_window;        
00234   sensorproc->pgm_func[onchange_window_safe]=  &pgm_window_safe;   
00235   sensorproc->pgm_func[onchange_exposure]=     &pgm_exposure;      
00236   sensorproc->pgm_func[onchange_gains]=        &pgm_gains;         
00237   sensorproc->pgm_func[onchange_triggermode]=  &pgm_triggermode;   
00238   sensorproc->pgm_func[onchange_sensorin]=     &pgm_sensorin;      
00239   sensorproc->pgm_func[onchange_sensorstop]=   &pgm_sensorstop;    
00240   sensorproc->pgm_func[onchange_sensorrun]=    &pgm_sensorrun;     
00241   sensorproc->pgm_func[onchange_gamma]=        &pgm_gamma;         
00242   sensorproc->pgm_func[onchange_hist]=         &pgm_hist;          
00243   sensorproc->pgm_func[onchange_aexp]=         &pgm_aexp;          
00244   sensorproc->pgm_func[onchange_quality]=      &pgm_quality;       
00245   sensorproc->pgm_func[onchange_memsensor]=    &pgm_memsensor;     
00246   sensorproc->pgm_func[onchange_memcompressor]=&pgm_memcompressor; 
00247   sensorproc->pgm_func[onchange_limitfps]=     &pgm_limitfps;      
00248   sensorproc->pgm_func[onchange_compmode]=     &pgm_compmode;      
00249   sensorproc->pgm_func[onchange_focusmode]=    &pgm_focusmode;     
00250   sensorproc->pgm_func[onchange_trigseq]=      &pgm_trigseq;       
00251   sensorproc->pgm_func[onchange_irq]=          &pgm_irq;           
00252   sensorproc->pgm_func[onchange_comprestart]=  &pgm_comprestart;   
00253   sensorproc->pgm_func[onchange_compstop]=     &pgm_compstop;      
00254   sensorproc->pgm_func[onchange_compctl]=      &pgm_compctl;       
00255   sensorproc->pgm_func[onchange_gammaload]=    &pgm_gammaload;     
00256   sensorproc->pgm_func[onchange_sensorregs]=   &pgm_sensorregs;    
00257   sensorproc->pgm_func[onchange_prescal]=      &pgm_prescal;       
00258 return 0;
00259 }
00260 //int add_sensor_proc(int index, int (*sens_func)(struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8)) { /// initialize array of functions that program different 
00267 int add_sensor_proc(int index, int (*sens_func)(struct sensor_t * ,  struct framepars_t * , struct framepars_t *, int )) {
00268   MDF1(printk("index=0x%x\n",index));
00269   sensorproc->pgm_func[32+(index & 0x1f)]=       sens_func;
00270 return 0;
00271 }
00272 
00284 int pgm_detectsensor   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00285   MDF3(printk(" frame8=%d\n",frame8));
00286   if (frame8 >= 0) return -1; 
00287   if (thispars->pars[P_SENSOR]) return 0; 
00288 
00289 
00290 
00291 
00293   camera_interrupts (0);
00294   MDF1(printk("Disabled camera interrupts\n"));
00297 //  f1=imageParamsR[P_CLK_SENSOR]=20000000; setClockFreq(1, imageParamsR[P_CLK_SENSOR]); X3X3_RSTSENSDCM;
00298    int was_sensor_freq=getClockFreq(1); 
00299    setFramePar(thispars, P_CLK_FPGA,  getClockFreq(0)); 
00300    setFramePar(thispars, P_CLK_SENSOR,  20000000);
00301    setClockFreq(1, thispars->pars[P_CLK_SENSOR]);
00302    udelay (100);// 0.0001 sec to stabilize clocks
00303    X3X3_RSTSENSDCM; 
00304    udelay (50000);// 0.05 sec to stabilize clocks
00306    CCAM_DCLK_ON;
00307    CCAM_CNVEN_OFF;
00308    CCAM_NEGRST;  
00309    CCAM_MRST_ON;
00310    CCAM_TRIG_INT;
00311    CCAM_TIMESTAMP_NORMAL;
00312    udelay (100); 
00313 
00314    printk("removing MRST from the sensor\r\n");
00315    CCAM_MRST_OFF;
00316    CCAM_ARST_OFF;
00317 #ifdef CONFIG_ETRAX_ELPHEL_MT9X001
00318    printk("trying MT9X001\r\n");
00319    if (thispars->pars[P_SENSOR]) mt9x001_pgm_detectsensor(sensor,  thispars, prevpars, frame8);  // try Micron 5.0 Mpixel - should return sensor type
00320 #endif
00322 #define ENABLE_OLD_SENSORS 1
00323 #ifdef ENABLE_OLD_SENSORS
00324    if (thispars->pars[P_SENSOR]==0)  { // no - it is not MT9P001)
00325    CCAM_CNVEN_ON;
00330         port_csp0_addr[X313_WA_DCDC] = 0x44; // 48 - enough, 41 - ok - was 0x61; //
00331         printk ("sensor power set low\r\n ");
00332      udelay (10000); // Wait voltage to come up (~10 ms)
00333         printk ("will set to 0x41\r\n");
00334      udelay (10000); // to find the problem
00335         port_csp0_addr[X313_WA_DCDC] = 0x41; // 
00336         printk ("will set to 0x30\r\n");
00337      udelay (10000); // to find the problem
00338         port_csp0_addr[X313_WA_DCDC] = 0x30; //
00339         printk ("will set to 0x28\r\n");
00340      udelay (10000); // to find the problem
00341         port_csp0_addr[X313_WA_DCDC] = 0x28; //
00342         printk ("will set to 0x24\r\n");
00343      udelay (10000); // to find the problem
00344         port_csp0_addr[X313_WA_DCDC] = 0x24; //
00345         printk ("will set to 0x22\r\n");
00346      udelay (10000); // to find the problem
00347         port_csp0_addr[X313_WA_DCDC] = 0x22; //
00348      udelay (100000); // to find the problem
00349         port_csp0_addr[X313_WA_DCDC] = 0x10; // now - full frequency (same as 0x21). Slow that down if the sensor clock is above 20MHz (i.e.0x22 for 40MHz)
00350         printk (".. full\r\n");
00351      udelay (10000); // Wait voltage to stabilize
00352      CCAM_POSRST;  //set positive MRST polarity (default)
00353      udelay (100); // apply clock before removing MRST
00354      CCAM_MRST_OFF;
00355    }
00356 #ifdef CONFIG_ETRAX_ELPHEL_KAC1310
00357    if (thispars->pars[P_SENSOR]==0) kac1310_pgm_detectsensor(sensor,  thispars, prevpars, frame8);  
00358 #endif
00359 #ifdef CONFIG_ETRAX_ELPHEL_IBIS51300
00360    if (thispars->pars[P_SENSOR]==0) ibis1300_pgm_detectsensor(sensor,  thispars, prevpars, frame8); 
00361 #endif
00363    if (thispars->pars[P_SENSOR]==0) {
00364      CCAM_NEGRST;  //set negative MRST polarity
00365 printk ("Inverted MRST\n");
00366       udelay (100);
00367    }
00368 #ifdef CONFIG_ETRAX_ELPHEL_MT9X001
00369    printk("trying MT9X001\n");
00370    if (thispars->pars[P_SENSOR]==0) mt9x001_pgm_detectsensor(sensor,  thispars, prevpars, frame8);  // try Micron 1.3/2.0/3.0 Mpixel
00371 #endif
00372 #ifdef CONFIG_ETRAX_ELPHEL_KAC1310
00373    if (thispars->pars[P_SENSOR]==0) kac5000_pgm_detectsensor(sensor,  thispars, prevpars, frame8);  // try KAC-5000
00374 #endif
00375 #ifdef CONFIG_ETRAX_ELPHEL_ZR32112
00376    if (thispars->pars[P_SENSOR]==0) zr32112_pgm_detectsensor(sensor,  thispars, prevpars, frame8); // try ZR32112
00377 #endif
00378 #ifdef CONFIG_ETRAX_ELPHEL_ZR32212
00379    if (thispars->pars[P_SENSOR]==0) zr32212_pgm_detectsensor(sensor,  thispars, prevpars, frame8); // try ZR32212
00380 #endif
00381 #endif // *************** temporary disabling other sensors ********************
00382 
00383    if (thispars->pars[P_SENSOR]==0) {
00384      sensor->sensorType=SENSOR_NONE;                 
00385      printk("No image sensor found\r\n");
00386    }
00387    setFramePar(thispars, P_SENSOR_WIDTH,   sensor->imageWidth);  
00388    setFramePar(thispars, P_SENSOR_HEIGHT,  sensor->imageHeight); 
00389 //   setFramePar(thispars, P_SENSOR,         sensor->sensorType); ///already set
00391    if (sensor->i2c_period==0) sensor->i2c_period=2500;           
00392    int qperiod=thispars->pars[P_I2C_QPERIOD];
00393    if (qperiod==0) qperiod=(sensor->i2c_period * (thispars->pars[P_CLK_FPGA]/1000))/4000000;
00394    setFramePar(thispars, P_I2C_QPERIOD | FRAMEPAIR_FORCE_NEWPROC,  qperiod); 
00395    int i2cbytes=thispars->pars[P_I2C_BYTES];
00396    if (i2cbytes==0) i2cbytes=sensor->i2c_bytes;
00397    setFramePar(thispars, P_I2C_BYTES | FRAMEPAIR_FORCE_NEWPROC,  i2cbytes); 
00398 
00399    if ((was_sensor_freq < sensor->minClockFreq) || (was_sensor_freq > sensor->maxClockFreq)) was_sensor_freq=sensor->nomClockFreq;
00400    setFramePar(thispars, P_CLK_SENSOR | FRAMEPAIR_FORCE_NEWPROC,  was_sensor_freq); 
00401 //#define P_SENSOR_PHASE  74 // packed, low 16 bit - signed fine phase, bits [18:17] - 90-degrees shift
00402    int phase=thispars->pars[P_SENSOR_PHASE];
00403    if (phase==0) phase= (((int) sensor->sensorPhase90) << 16) | ((0x10000 + ((int)  sensor->sensorPhase)) & 0xffff);
00404    setFramePar(thispars, P_SENSOR_PHASE | FRAMEPAIR_FORCE_NEWPROC,  phase); 
00405    setFramePar(thispars, P_IRQ_SMART | FRAMEPAIR_FORCE_NEWPROC,  3);        
00406 
00409    camera_interrupts (1);
00410    return 0;
00411 }
00412 
00413 
00415 
00425 int pgm_initsensor   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00426   MDF3(printk(" frame8=%d\n",frame8));
00427   if (frame8 >= 0) return -1; 
00428 
00429   return 0;
00430 }
00431 
00432 
00434 /*
00435 #define AFTERINIT_SET(p,v)        { pars_to_update[nupdate  ].num=(p) | FRAMEPAIR_FORCE_NEW; \
00436                                         pars_to_update[nupdate++].val=(v);}
00437 #define AFTERINIT_UPDATE(p)       { pars_to_update[nupdate  ].num=(p) | FRAMEPAIR_FORCE_NEW; \
00438                                         pars_to_update[nupdate++].val=thispars->pars[(p)];}
00439 #define AFTERINIT_UPDATE_SET(p,v) { pars_to_update[nupdate  ].num=(p) | FRAMEPAIR_FORCE_NEW; \
00440                                         pars_to_update[nupdate++].val=thispars->pars[(p)]?thispars->pars[(p)]:(v);}
00441 */
00442 //#define SETFRAMEPARS_SET(p,v)
00443 
00452 int pgm_afterinit  (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00453 //  struct frameparspair_t * pars_to_update[20]; /// 16 needed, increase if more entries will be added
00454   struct frameparspair_t pars_to_update[24]; 
00455   int nupdate=0;
00456   MDF3(printk(" frame8=%d\n",frame8));
00458   int woi_width=thispars->pars[P_WOI_WIDTH];
00459   int woi_height=thispars->pars[P_WOI_HEIGHT];
00460   if ((woi_width == 0) || (woi_height == 0)) { 
00461     woi_width= sensor->imageWidth;
00462     woi_height=sensor->imageHeight;
00463   }
00464   SETFRAMEPARS_SET(P_WOI_WIDTH | FRAMEPAIR_FORCE_NEW, woi_width);
00465   SETFRAMEPARS_SET(P_WOI_HEIGHT | FRAMEPAIR_FORCE_NEW, woi_height);
00466   SETFRAMEPARS_UPDATE(P_WOI_LEFT | FRAMEPAIR_FORCE_NEW);
00467   SETFRAMEPARS_UPDATE(P_WOI_TOP | FRAMEPAIR_FORCE_NEW);
00468   SETFRAMEPARS_UPDATE(P_FLIPH | FRAMEPAIR_FORCE_NEW); 
00469   SETFRAMEPARS_UPDATE(P_FLIPV | FRAMEPAIR_FORCE_NEW); 
00470 
00471   SETFRAMEPARS_UPDATE_SET(P_HISTWND_RWIDTH | FRAMEPAIR_FORCE_NEW, 0x8000);  
00472   SETFRAMEPARS_UPDATE_SET(P_HISTWND_RHEIGHT | FRAMEPAIR_FORCE_NEW, 0x8000); 
00473   SETFRAMEPARS_UPDATE_SET(P_HISTWND_RLEFT | FRAMEPAIR_FORCE_NEW, 0x8000);   
00474   SETFRAMEPARS_UPDATE_SET(P_HISTWND_RTOP | FRAMEPAIR_FORCE_NEW, 0x8000);    
00475 
00476   SETFRAMEPARS_UPDATE_SET(P_DCM_HOR | FRAMEPAIR_FORCE_NEW,  1);
00477   SETFRAMEPARS_UPDATE_SET(P_DCM_VERT | FRAMEPAIR_FORCE_NEW, 1);
00478   SETFRAMEPARS_UPDATE_SET(P_BIN_HOR | FRAMEPAIR_FORCE_NEW,  1);
00479   SETFRAMEPARS_UPDATE_SET(P_BIN_VERT | FRAMEPAIR_FORCE_NEW, 1);
00481   SETFRAMEPARS_UPDATE_SET(P_GAINR | FRAMEPAIR_FORCE_NEW, 0x100); 
00482   SETFRAMEPARS_UPDATE_SET(P_GAING | FRAMEPAIR_FORCE_NEW, 0x100); 
00483   SETFRAMEPARS_UPDATE_SET(P_GAINB | FRAMEPAIR_FORCE_NEW, 0x100); 
00484   SETFRAMEPARS_UPDATE_SET(P_GAINGB | FRAMEPAIR_FORCE_NEW,0x100); 
00485 
00486   SETFRAMEPARS_UPDATE(P_BAYER | FRAMEPAIR_FORCE_NEW);
00487 
00489   if (thispars->pars[P_EXPOS]) {
00490     SETFRAMEPARS_UPDATE(P_EXPOS | FRAMEPAIR_FORCE_NEW);
00491   } else if (thispars->pars[P_VEXPOS]) {
00492     SETFRAMEPARS_UPDATE(P_VEXPOS | FRAMEPAIR_FORCE_NEW);
00493   } else {
00494     SETFRAMEPARS_SET(P_EXPOS | FRAMEPAIR_FORCE_NEW, 10000); 
00495   }
00496   SETFRAMEPARS_UPDATE(P_TRIG | FRAMEPAIR_FORCE_NEW); 
00497 
00498 
00499   if (nupdate)  setFramePars(thispars, nupdate, pars_to_update);  
00500   return 0;
00501 }
00502 
00512 int pgm_sensorphase(struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00513   struct frameparspair_t pars_to_update[4]; 
00514   int nupdate=0;
00515 
00516   MDF3(printk(" frame8=%d\n",frame8));
00517   if (frame8 >= 0) return -1; 
00518   int was_sensor_freq=getClockFreq(1); 
00519   if (unlikely(thispars->pars[P_CLK_SENSOR] > sensor->maxClockFreq))  SETFRAMEPARS_SET(P_CLK_SENSOR,  sensor->maxClockFreq);
00520   if (thispars->pars[P_CLK_SENSOR] != was_sensor_freq) {
00521     if (unlikely(setClockFreq(1, thispars->pars[P_CLK_SENSOR])<0)) { 
00522       setClockFreq(1, was_sensor_freq);
00523        SETFRAMEPARS_SET(P_CLK_SENSOR,  was_sensor_freq);
00524     }
00525     X3X3_RSTSENSDCM; 
00526     if (sensor->needReset & SENSOR_NEED_RESET_CLK) schedule_this_pgm_func(thispars, onchange_initsensor);
00527   }
00530   int  hact_shift= 0.004 * (sensor->hact_delay/(1000000000.0/thispars->pars[P_CLK_SENSOR])) + 0.5;
00531   MD12(printk ("hact_shift=%d\r\n",hact_shift));
00532   if (hact_shift>3) hact_shift=3;
00533   CCAM_SET_HACT_PHASE(hact_shift) ; 
00534 
00535 
00536 
00537 
00538 
00539 
00540 
00541 
00542 
00543 
00544 
00545 
00546 
00547 
00548 
00553    if (thispars->pars[P_SENSOR_PHASE]) {
00554      X3X3_RSTSENSDCM; 
00555      int sensor_phase90=(thispars->pars[P_SENSOR_PHASE]>>16)&3;
00556      int sensor_phase=   thispars->pars[P_SENSOR_PHASE] & 0xffff;
00557      if (sensor_phase>0x8000) sensor_phase-=0x10000; 
00558    MD12(printk("sensor_phase=0x%x sensor_phase90=0x%x\r\n", sensor_phase, sensor_phase90 ));
00559      int i;
00560      for (i=sensor_phase90;i>0;i--) X3X3_SENSDCM_INC90 ;  
00561      if      (sensor_phase > 0) for (i=sensor_phase; i > 0; i--) {X3X3_SENSDCM_INC ; udelay(1); }
00562      else if (sensor_phase < 0) for (i=sensor_phase; i < 0; i++) {X3X3_SENSDCM_DEC ; udelay(1); }
00563      if (sensor->needReset & SENSOR_NEED_RESET_PHASE) schedule_this_pgm_func(thispars, onchange_initsensor);
00564    }
00565   if (nupdate)  setFramePars(thispars, nupdate, pars_to_update);  
00566   return 0;
00567 }
00568 
00569 
00578 int pgm_exposure   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00579   MDF3(printk(" frame8=%d\n",frame8));
00580   return 0;
00581 }
00582 
00591 int pgm_i2c        (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00592   MDF3(printk(" frame8=%d\n",frame8));
00593   if (frame8 >= PARS_FRAMES) return -1; 
00594   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
00595   X3X3_SEQ_SEND1(fpga_addr,   X313_I2C_CMD,  X3X3_SET_I2C_BYTES(thispars->pars[P_I2C_BYTES]+1) |
00596                                               X3X3_SET_I2C_DLY  (thispars->pars[P_I2C_QPERIOD]));
00597   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_I2C_CMD, (int) (X3X3_SET_I2C_BYTES(thispars->pars[P_I2C_BYTES]+1) | X3X3_SET_I2C_DLY  (thispars->pars[P_I2C_QPERIOD]))  ));
00598 
00599   return 0;
00600 }
00601 
00611 
00612 
00613 int pgm_window      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00614   MDF3(printk(" frame8=%d\n",frame8));
00615   return pgm_window_common (sensor,  thispars, prevpars, frame8);
00616 }
00617 int pgm_window_safe (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00618   MDF3(printk(" frame8=%d\n",frame8));
00619   return pgm_window_common (sensor,  thispars, prevpars, frame8);
00620 }
00621 inline int pgm_window_common (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00622   int dv,dh,bv,bh,width,height,timestamp_len,oversize,pfh,pf_stripes,ah, left,top,is_color;
00623   MDF3(printk(" frame8=%d\n",frame8));
00624   oversize=thispars->pars[P_OVERSIZE];
00625   is_color=1;
00626   struct frameparspair_t pars_to_update[18]; 
00627   int nupdate=0;
00628 
00629   switch (thispars->pars[P_COLOR] & 0x0f){
00630      case COLORMODE_MONO6:
00631      case COLORMODE_MONO4:
00632       is_color=0;
00633   } 
00635   if (FRAMEPAR_MODIFIED(P_FLIPH)) {
00636     if (unlikely((thispars->pars[P_FLIPH] & sensor->flips & 1)!=thispars->pars[P_FLIPH])) { 
00637        SETFRAMEPARS_SET(P_FLIPH, (thispars->pars[P_FLIPH] & sensor->flips & 1));
00638     }
00639   }
00640   if (FRAMEPAR_MODIFIED(P_FLIPV)) {
00641     if (unlikely((thispars->pars[P_FLIPV] & (sensor->flips>>1) & 1)!=thispars->pars[P_FLIPV])) { 
00642        SETFRAMEPARS_SET(P_FLIPV, (thispars->pars[P_FLIPV] & (sensor->flips >> 1 ) & 1));
00643     }
00644   }
00646   dh = thispars->pars[P_DCM_HOR];
00647   if (FRAMEPAR_MODIFIED(P_DCM_HOR)) {
00648     if (dh<1) dh=1; else if (dh>32) dh=32;
00649     while ((dh>1) && !(sensor->dcmHor  & (1 << (dh-1)))) dh--; 
00650     if (unlikely(dh!=thispars->pars[P_DCM_HOR])) SETFRAMEPARS_SET(P_DCM_HOR, dh);
00651   }
00653   dv = thispars->pars[P_DCM_VERT];
00654   if (FRAMEPAR_MODIFIED(P_DCM_VERT)) {
00655     if (dv<1) dv=1; else if (dv>32) dv=32;
00656     while ((dv>1) && !(sensor->dcmVert  & (1 << (dv-1)))) dv--; 
00657     if (unlikely(dv!=thispars->pars[P_DCM_HOR])) SETFRAMEPARS_SET(P_DCM_VERT, dv); 
00658   }
00660   bh = thispars->pars[P_BIN_HOR];
00661   if (FRAMEPAR_MODIFIED(P_BIN_HOR)) {
00662     if (bh<1) bh=1; else if (bh>dh) bh=dh;
00663     while ((bh>1) && !(sensor->binHor  & (1 << (bh-1)))) bh--; 
00664     if (unlikely(bh!=thispars->pars[P_BIN_HOR])) SETFRAMEPARS_SET(P_DCM_HOR, bh); 
00665   }
00667   bv = thispars->pars[P_BIN_VERT];
00668   if (FRAMEPAR_MODIFIED(P_BIN_VERT)) {
00669     if (bv<1) bv=1; else if (bv>dv) bv=dv;
00670     while ((bv>1) && !(sensor->binVert  & (1 << (bv-1)))) bv--; 
00671     if (unlikely(bv!=thispars->pars[P_BIN_VERT])) SETFRAMEPARS_SET(P_DCM_VERT, bv); 
00672   }
00675   timestamp_len = (((thispars->pars[P_PF_HEIGHT] >> 16) & 3)==2)? X313_TIMESTAMPLEN*dh : 0;
00677   width=thispars->pars[P_WOI_WIDTH];
00678   if ((!oversize) && (width > sensor->imageWidth)) width= sensor->imageWidth;
00680   width= (((width/dh) + timestamp_len)/X313_TILEHOR)*X313_TILEHOR-timestamp_len; 
00681 
00682   while (width < sensor->minWidth) width+=X313_TILEHOR;
00683   if (unlikely(thispars->pars[P_ACTUAL_WIDTH] != (width+timestamp_len))) {
00684        SETFRAMEPARS_SET(P_ACTUAL_WIDTH, width+timestamp_len); 
00685   }
00686   if (unlikely(thispars->pars[P_SENSOR_PIXH] != width+X313_MARGINS))
00687        SETFRAMEPARS_SET(P_SENSOR_PIXH,  width+X313_MARGINS); 
00688   width*=dh;
00689   if (unlikely(thispars->pars[P_WOI_WIDTH] != width))
00690        SETFRAMEPARS_SET(P_WOI_WIDTH, width);  
00691 
00692   pfh = (thispars->pars[P_PF_HEIGHT] & 0xffff);
00693   height=thispars->pars[P_WOI_HEIGHT];
00694 //  pf_stripes;
00695   if(pfh > 0) {
00696      if (pfh < sensor->minHeight)  pfh =  sensor->minHeight;
00697      if (pfh & 1) pfh++;
00698      if (height > X313_MAXHEIGHT*dv) height=X313_MAXHEIGHT*dv;
00699      pf_stripes = height / (pfh * dv);
00700      if(pf_stripes < 1) pf_stripes = 1;
00701      if (unlikely(thispars->pars[P_SENSOR_PIXV] != pfh)) SETFRAMEPARS_SET(P_SENSOR_PIXV,  pfh);
00702   } else {
00703        if ((!oversize ) && (height > sensor->imageHeight)) height=sensor->imageHeight;
00704        height= ((height/dv)/X313_TILEVERT) * X313_TILEVERT; 
00705 
00706        while (height < sensor->minHeight) height+=X313_TILEVERT;
00707        if (unlikely(thispars->pars[P_SENSOR_PIXV] != height+X313_MARGINS))
00708            SETFRAMEPARS_SET(P_SENSOR_PIXV,  height+X313_MARGINS); 
00709        height*=dv;
00710        pf_stripes = 0;
00711        pfh = 0;
00712   }
00714   if (unlikely((thispars->pars[P_PF_HEIGHT] & 0xffff) != pfh))
00715         SETFRAMEPARS_SET(P_PF_HEIGHT, (thispars->pars[P_PF_HEIGHT] & 0xffff0000 ) | pfh );
00717   if (unlikely(thispars->pars[P_WOI_HEIGHT] != height))
00718         SETFRAMEPARS_SET(P_WOI_HEIGHT, height); 
00719 
00720   ah=height/dv;
00721   if (unlikely(thispars->pars[P_ACTUAL_HEIGHT] != ah))
00722         SETFRAMEPARS_SET(P_ACTUAL_HEIGHT, ah); 
00723 
00724   left = thispars->pars[P_WOI_LEFT];
00725   if (!oversize) { 
00726     if (is_color)                    left &= 0xfffe;
00727     if ((left + width + X313_MARGINS) > sensor->clearWidth) { 
00728          left = sensor->clearWidth - width - X313_MARGINS;
00729          if (is_color)               left &= 0xfffe;
00730     }
00731     if (left & 0x8000) left = 0;
00732   }
00734   if (unlikely(thispars->pars[P_WOI_LEFT] != left)) SETFRAMEPARS_SET(P_WOI_LEFT, left);
00735 
00737   top = thispars->pars[P_WOI_TOP];
00738   if (!oversize) { 
00739     if (is_color)                    top &= 0xfffe;
00740     if ((top + height + X313_MARGINS) > sensor->clearHeight) { 
00741          top = sensor->clearHeight - height - X313_MARGINS;
00742          if (is_color)               top &= 0xfffe;
00743     }
00744     if (top & 0x8000) top = 0;
00745   }
00747   if (unlikely(thispars->pars[P_WOI_TOP] != top)) SETFRAMEPARS_SET(P_WOI_TOP, top);
00748   if (nupdate)  setFramePars(thispars, nupdate, pars_to_update);  
00749   return 0;
00750 }
00751 
00753 
00762 
00763 int pgm_limitfps   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00765   MDF3(printk(" frame8=%d\n",frame8));
00766   if (frame8 >= PARS_FRAMES) return -1; 
00767   struct frameparspair_t pars_to_update[8]; 
00768   int nupdate=0;
00769   int async=(thispars->pars[P_TRIG] & 4)?1:0;
00770   int cycles;  
00771   int min_period;  
00772   int period=0;
00773   cycles=thispars->pars[P_TILES]; 
00774 #if USELONGLONG
00775   uint64_t ull_min_period;
00776   uint64_t ull_period;
00777 #endif
00778   MDF9(printk(" tiles=%d(0x%x)\n",cycles,cycles));
00779   
00780   switch (thispars->pars[P_COLOR] & 0x0f){
00781      case COLORMODE_MONO6:
00782      case COLORMODE_COLOR:
00783      case COLORMODE_JP46:
00784      case COLORMODE_JP46DC:
00785      case COLORMODE_COLOR20:
00786         cycles*=6; 
00787         break;
00788      default:
00789         cycles*=4;
00790   } 
00791   cycles  *=64 *2; //cycles per frame (64 pixels/block, 2 clock cycles/pixel)
00792   MDF9(printk(" cycles=%d(0x%x)\n",cycles,cycles));
00793   cycles += thispars->pars[P_FPGA_XTRA]; // extra cycles needed for the compressor to start/finish the frame;
00794   MDF9(printk(" cycles with P_FPGA_XTRA =%d(0x%x)\n",cycles,cycles));
00797 
00798 
00799 #if USELONGLONG
00800   ull_min_period=(((long long) cycles) * ((long long) thispars->pars[P_CLK_SENSOR]));
00801   __div64_32(&ull_min_period, thispars->pars[P_CLK_FPGA]);
00802   min_period= ull_min_period;
00803   MDF9(printk("min_period =%d(0x%x)\n",min_period,min_period));
00804 //  min_period = (((long long) cycles) * ((long long) thispars->pars[P_CLK_SENSOR])) / ((long long) thispars->pars[P_CLK_FPGA]);
00805 #else
00806   if (cycles <          (1<<16) ) {
00807      min_period = (cycles * (thispars->pars[P_CLK_SENSOR] >> 12)) / (thispars->pars[P_CLK_FPGA]>>12);
00808   } else   if (cycles < (1<<18) ) {
00809      min_period = (((cycles>>2) * (thispars->pars[P_CLK_SENSOR] >> 12)) / (thispars->pars[P_CLK_FPGA]>>12)) << 2 ;
00810   } else   if (cycles < (1<<20) ) {
00811      min_period = (((cycles>>4) * (thispars->pars[P_CLK_SENSOR] >> 12)) / (thispars->pars[P_CLK_FPGA]>>12)) << 4 ;
00812   } else   if (cycles < (1<<22) ) {
00813      min_period = (((cycles>>6) * (thispars->pars[P_CLK_SENSOR] >> 12)) / (thispars->pars[P_CLK_FPGA]>>12)) << 6 ;
00814   } else   if (cycles < (1<<24) ) {
00815      min_period = (((cycles>>8) * (thispars->pars[P_CLK_SENSOR] >> 12)) / (thispars->pars[P_CLK_FPGA]>>12)) << 8 ;
00816   } else {
00817      min_period = (((cycles>>10) *(thispars->pars[P_CLK_SENSOR] >> 12)) / (thispars->pars[P_CLK_FPGA]>>12)) << 10 ;
00818   }
00820   MDF9(printk("min_period =%d(0x%x)\n",min_period,min_period));
00821 #endif
00823   if (thispars->pars[P_FPSFLAGS]) {
00824 #if USELONGLONG
00825     ull_period=(((long long) thispars->pars[P_CLK_SENSOR]) * (long long) 1000);
00826     __div64_32(&ull_period, thispars->pars[P_FP1000SLIM]);
00827     period= ull_period;
00828   MDF9(printk("period =%d(0x%x)\n",period,period));
00829 //    period=(((long long) thispars->pars[P_CLK_SENSOR]) * (long long) 1000)/((long long) thispars->pars[P_FP1000SLIM]);
00830 #else
00831     period=125*(( thispars->pars[P_CLK_SENSOR] << 3) / thispars->pars[P_FP1000SLIM]); 
00832   MDF9(printk("period =%d(0x%x)\n",period,period));
00833 #endif
00834   }
00835   MDF1(printk(" period=%d\n",period));
00836   if ((thispars->pars[P_FPSFLAGS] & 1) && (period>min_period)) min_period=period;
00837   if (min_period != thispars->pars[P_PERIOD_MIN]) SETFRAMEPARS_SET(P_PERIOD_MIN, min_period);  
00838   if (((thispars->pars[P_FPSFLAGS] & 2)==0) || (period < min_period)) period=0x7fffffff; 
00839   if (period != thispars->pars[P_PERIOD_MAX]) SETFRAMEPARS_SET(P_PERIOD_MAX, period);         
00840 
00841   if (async && (thispars->pars[P_TRIG_PERIOD] >=256)) { // <256 - single trig
00842     if (thispars->pars[P_TRIG_PERIOD] < min_period) SETFRAMEPARS_SET(P_TRIG_PERIOD, min_period);  
00843     if ((thispars->pars[P_FPSFLAGS] & 2) && (thispars->pars[P_TRIG_PERIOD] > period)) {
00844        SETFRAMEPARS_SET(P_TRIG_PERIOD, period);  
00845     }
00846   }
00847   if (nupdate)  setFramePars(thispars, nupdate, pars_to_update);  
00848 
00849   return 0;
00850 }
00851 
00860 int pgm_gains      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00862   MDF3(printk(" frame8=%d\n",frame8));
00863   return 0;
00864 }
00865 
00874 int pgm_triggermode(struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00875   MDF3(printk(" frame8=%d\n",frame8));
00876   if (frame8 >= PARS_FRAMES) return -1; 
00877   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
00878   int async=(thispars->pars[P_TRIG] & 4)?1:0;
00879   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_DCR0, X353_DCR0(SENSTRIGEN,async));
00880   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_DCR1, X353_DCR1(EARLYTRIG, (async && thispars->pars[P_EARLY_TIMESTAMP])?1:0));
00881 
00882   return 0;
00883 }
00884 
00893 int pgm_sensorin   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00894   MDF3(printk(" frame8=%d\n",frame8));
00895   if (frame8 >= PARS_FRAMES) return -1; 
00896   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
00898   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SENSFPN, X313_SENSFPN_D( \
00899                          (thispars->pars[P_FPGATEST]), \
00900                          (thispars->pars[P_FPNS]),  \
00901                          (thispars->pars[P_FPNM]),     \
00902                          ((thispars->pars[P_BITS]>8)?1:0), \
00903                           thispars->pars[P_SHIFTL]));
00904 
00905   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SENSFPN, (int) (X313_SENSFPN_D( \
00906                          (thispars->pars[P_FPGATEST]), \
00907                          (thispars->pars[P_FPNS]),  \
00908                          (thispars->pars[P_FPNM]),     \
00909                          ((thispars->pars[P_BITS]>8)?1:0), \
00910                           thispars->pars[P_SHIFTL]))));
00911 
00912 
00914   int n_scan_lines;
00915   if ((thispars->pars[P_PF_HEIGHT] & 0xffff)>0) n_scan_lines= \
00916        (thispars->pars[P_ACTUAL_HEIGHT] & 0xfff) | ((thispars->pars[P_ACTUAL_HEIGHT]/(thispars->pars[P_PF_HEIGHT] &  0xffff))<<16);
00917   else n_scan_lines= thispars->pars[P_ACTUAL_HEIGHT]+X313_MARGINS+thispars->pars[P_OVERLAP];
00918   X3X3_SEQ_SEND1 (fpga_addr,  X313_WA_NLINES, n_scan_lines);
00919   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_NLINES, (int) n_scan_lines));
00921   if (FRAMEPAR_MODIFIED(P_BAYER) || FRAMEPAR_MODIFIED(P_FLIPH) || FRAMEPAR_MODIFIED(P_FLIPV)) {
00922     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_DCR0, X353_DCR0(BAYER_PHASE,thispars->pars[P_BAYER] ^ ((thispars->pars[P_FLIPH] & 1) | ((thispars->pars[P_FLIPV] & 1)<<1)) ^ sensor->bayer)); 
00923     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int)X313_WA_DCR0, (int)X353_DCR0(BAYER_PHASE,thispars->pars[P_BAYER] ^ ((thispars->pars[P_FLIPH] & 1) | ((thispars->pars[P_FLIPV] & 1)<<1)) ^ sensor->bayer) ));
00924 
00925   }
00926   return 0;
00927 }
00928 
00937 int pgm_sensorrun(struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00938   MDF3(printk(" frame8=%d\n",frame8));
00939   if (frame8 >= PARS_FRAMES) return -1; 
00940   int fpga_data=0;
00941   switch (thispars->pars[P_SENSOR_RUN] & 3) {
00942     case 1: fpga_data=4; break;
00943     case 2:
00944     case 3: fpga_data=5; break;
00945   }
00946   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
00947 // only start/single, stopping will be handled by the pgm_sensorstop
00948   if (fpga_data) {
00949      X3X3_SEQ_SEND1(fpga_addr,  X313_WA_TRIG, fpga_data);
00950      MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_TRIG, (int) fpga_data));
00951   }
00952   return 0;
00953 }
00954 
00963 int pgm_sensorstop (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
00964   MDF3(printk(" frame8=%d\n",frame8));
00965   if (frame8 >= PARS_FRAMES) return -1; 
00966   int fpga_data=0;
00967   switch (thispars->pars[P_SENSOR_RUN] & 3) {
00968     case 1: fpga_data=4; break;
00969     case 2:
00970     case 3: fpga_data=5; break;
00971   }
00972   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
00973 // only start/single, stopping will be handled by the pgm_sensorstop
00974   if ((thispars->pars[P_SENSOR_RUN] & 3)==0){
00975     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_TRIG, fpga_data);
00976     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_TRIG, (int) fpga_data));
00977   }
00978   return 0;
00979 }
00980 
01000 int pgm_gamma      (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01001   MDF3(printk(" frame8=%d, (getThisFrameNumber() & PARS_FRAMES_MASK)= %ld\n",frame8, getThisFrameNumber() & PARS_FRAMES_MASK));
01002   MDF3(printk(" frame8=%d, thispars->pars[P_GTAB_*]=0x%lx 0x%lx 0x%lx 0x%lx, thispars->pars[P_FRAME]=0x%lx"
01003               " get_locked_hash32(*)=0x%lx 0x%lx 0x%lx 0x%lx\n",
01004 frame8, thispars->pars[P_GTAB_R],thispars->pars[P_GTAB_R+1],thispars->pars[P_GTAB_R+2],thispars->pars[P_GTAB_R+3],thispars->pars[P_FRAME],
01005 get_locked_hash32(0),get_locked_hash32(1),get_locked_hash32(2),get_locked_hash32(3)));
01006 
01007 
01008   MDF16(printk(" frame8=%d, thispars->pars[P_GTAB_*]=0x%lx 0x%lx 0x%lx 0x%lx, thispars->pars[P_FRAME]=0x%lx\n",frame8, thispars->pars[P_GTAB_R],thispars->pars[P_GTAB_R+1],thispars->pars[P_GTAB_R+2],thispars->pars[P_GTAB_R+3],thispars->pars[P_FRAME]));
01009   if (frame8 >= PARS_FRAMES) return -1; 
01010 
01011 #if 0
01012   if ((frame8>=0) && (frame8!=((getThisFrameNumber()+1) & PARS_FRAMES_MASK))) {
01013     MDF3(printk("too early\n"));
01014     return -ERR_PGM_TRYAGAINLATER;
01015   }
01016 #endif
01019   int color, rslt;
01020   struct frameparspair_t pars_to_update[4]; 
01021   int nupdate=0;
01022   struct {
01023     unsigned short scale;
01024     unsigned short hash16;
01025   } gamma32;
01026   unsigned long * pgamma32= (unsigned long *) & gamma32;
01027   for (color=0; color<4; color++) {
01028 
01029      if (get_locked_hash32(color)!=thispars->pars[P_GTAB_R+color]) { 
01030        *pgamma32=thispars->pars[P_GTAB_R+color];
01031        rslt=set_gamma_table (gamma32.hash16, gamma32.scale, NULL,  GAMMA_MODE_HARDWARE, color); 
01032        if (rslt<=0) SETFRAMEPARS_SET(P_GTAB_R+color, get_locked_hash32(color)); 
01033      }
01034   }
01035   if (nupdate) {
01036      setFramePars(thispars, nupdate, pars_to_update);  
01037      MDF3(printk("had to restore back %d gamma tables (color components) \n",nupdate));
01038      return -1;
01039   }
01040   return 0;
01041 }
01042 
01043 
01044 
01053 int pgm_hist       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01054   struct {
01055     long left;
01056     long width;
01057     long top;
01058     long height;
01059   } hist_setup_data;
01060   struct frameparspair_t pars_to_update[4]={
01061    {P_HISTWND_LEFT, 0},
01062    {P_HISTWND_WIDTH, 0},
01063    {P_HISTWND_TOP, 0},
01064    {P_HISTWND_HEIGHT, 0}
01065   };
01066   MDF3(printk(" frame8=%d\n",frame8));
01067   if (frame8 >= PARS_FRAMES) return -1; 
01068   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01070   hist_setup_data.width=  ((thispars->pars[P_HISTWND_RWIDTH] * thispars->pars[P_ACTUAL_WIDTH])>>16) & 0xffe;
01071   if (hist_setup_data.width<2) hist_setup_data.width=2;
01072   else if (hist_setup_data.width > thispars->pars[P_ACTUAL_WIDTH]) hist_setup_data.width = thispars->pars[P_ACTUAL_WIDTH];
01073   hist_setup_data.left=  ((thispars->pars[P_HISTWND_RLEFT] * (thispars->pars[P_ACTUAL_WIDTH]-hist_setup_data.width)) >>16) & 0xffe;
01074   if (hist_setup_data.left> (thispars->pars[P_ACTUAL_WIDTH]-hist_setup_data.width)) hist_setup_data.left = thispars->pars[P_ACTUAL_WIDTH]-hist_setup_data.width;
01075 
01076   hist_setup_data.height=  ((thispars->pars[P_HISTWND_RHEIGHT] * thispars->pars[P_ACTUAL_HEIGHT])>>16) & 0xffe;
01077   if (hist_setup_data.height<2) hist_setup_data.height=2;
01078   else if (hist_setup_data.height > thispars->pars[P_ACTUAL_HEIGHT]) hist_setup_data.height = thispars->pars[P_ACTUAL_HEIGHT];
01079   hist_setup_data.top=  ((thispars->pars[P_HISTWND_RTOP] * (thispars->pars[P_ACTUAL_HEIGHT]-hist_setup_data.height)) >>16) & 0xffe;
01080   if (hist_setup_data.top > (thispars->pars[P_ACTUAL_HEIGHT]-hist_setup_data.height)) hist_setup_data.top = thispars->pars[P_ACTUAL_HEIGHT]-hist_setup_data.height;
01081 
01082   if ((hist_setup_data.left   != thispars->pars[P_HISTWND_LEFT]) ||
01083       (hist_setup_data.width  != thispars->pars[P_HISTWND_WIDTH]) ||
01084       (hist_setup_data.top    != thispars->pars[P_HISTWND_TOP]) ||
01085       (hist_setup_data.height != thispars->pars[P_HISTWND_HEIGHT])) {
01087       X3X3_SEQ_SEND1(fpga_addr,  X313_WA_HIST_LEFT,   hist_setup_data.left);
01088       X3X3_SEQ_SEND1(fpga_addr,  X313_WA_HIST_WIDTH,  hist_setup_data.width-2);
01089       X3X3_SEQ_SEND1(fpga_addr,  X313_WA_HIST_TOP,    hist_setup_data.top);
01090       X3X3_SEQ_SEND1(fpga_addr,  X313_WA_HIST_HEIGHT, hist_setup_data.height-2);
01091   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_HIST_LEFT,   (int) hist_setup_data.left));
01092   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_HIST_WIDTH,  (int) hist_setup_data.width-2));
01093   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_HIST_TOP,    (int) hist_setup_data.top));
01094   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_HIST_HEIGHT, (int) hist_setup_data.height-2));
01095       pars_to_update[0].val=hist_setup_data.left;
01096       pars_to_update[1].val=hist_setup_data.width;
01097       pars_to_update[2].val=hist_setup_data.top;
01098       pars_to_update[3].val=hist_setup_data.height;
01099      setFramePars(thispars, 4, pars_to_update);  
01100   } 
01101   return 0;
01102 }
01103 
01104 
01114 int pgm_aexp       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01115 //TODO:
01116   MDF3(printk(" frame8=%d\n",frame8));
01117   return 0;
01118 }
01119 
01128 int pgm_quality    (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01129   MDF3(printk(" frame8=%d\n",frame8));
01130   if (frame8 >= PARS_FRAMES) return -1; 
01131   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01134 
01135   if ((thispars->pars[P_COMPMOD_QTAB]=set_qtable_fpga(thispars->pars[P_QUALITY]))>=0) {
01136     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COMP_CMD,   COMPCMD_QTAB(thispars->pars[P_COMPMOD_QTAB]));
01137     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_COMP_CMD, (int) COMPCMD_QTAB(thispars->pars[P_COMPMOD_QTAB])));
01138     return 0;
01139   } else return -1;
01140 }
01141 
01150 int pgm_memsensor     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01151   int ntilex,ntiley,goodEOL,padlen, imgsz,sa;
01152   MDF3(printk(" frame8=%d\n",frame8));
01153   if (frame8 >= PARS_FRAMES) return -1; 
01154   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01156   ntilex=((thispars->pars[P_ACTUAL_WIDTH]+X313_MARGINS+7)>>3);
01157   ntiley=thispars->pars[P_ACTUAL_HEIGHT]+(((thispars->pars[P_PF_HEIGHT] & 0xffff)>0)?0:X313_MARGINS);
01158   MDF3(printk("ntilex=0x%x ntiley=0x%x\n",ntilex,ntiley));
01159   if ((thispars->pars[P_PF_HEIGHT] & 0xffff)==0) { 
01160     if(!thispars->pars[P_BGFRAME] && ((thispars->pars[P_FPNS]!=0) || (thispars->pars[P_FPNM]!=0))) {
01162        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH1_CTL1, X313_SDCHAN_REG1(0,0,0, X313_MAP_FPN, (ntilex-1), (ntiley-1)));
01163        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH1_CTL2, X313_SDCHAN_REG2(0,0,0, X313_MAP_FPN, (ntilex-1), (ntiley-1)));
01164        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH1_CTL0, X313_SDCHAN_REG0(0,0,0, X313_MAP_FPN, (ntilex-1), (ntiley-1)));
01166        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SD_MODE, X313_CHN_EN_D(1)); 
01167        MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH1_CTL1, (int) X313_SDCHAN_REG1(0,0,0, X313_MAP_FPN, (ntilex-1), (ntiley-1))));
01168        MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH1_CTL2, (int) X313_SDCHAN_REG2(0,0,0, X313_MAP_FPN, (ntilex-1), (ntiley-1))));
01169        MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH1_CTL0, (int) X313_SDCHAN_REG0(0,0,0, X313_MAP_FPN, (ntilex-1), (ntiley-1))));
01170        MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SD_MODE, (int) X313_CHN_EN_D(1)));
01171 
01172     } else  {
01173         X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SD_MODE, X313_CHN_DIS_D(1));
01174         MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SD_MODE, (int) X313_CHN_DIS_D(1)));
01175     }
01176   } else  {
01177     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SD_MODE, X313_CHN_DIS_D(1));
01178     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SD_MODE, (int) X313_CHN_DIS_D(1)));
01179   }
01186 
01187   if ((thispars->pars[P_BITS]==8) && (!thispars->pars[P_BGFRAME])) { 
01188     ntilex=((thispars->pars[P_ACTUAL_WIDTH]+X313_MARGINS+15)>>4);
01189     goodEOL=((thispars->pars[P_ACTUAL_WIDTH] & 0x0f) == 0) && ((thispars->pars[P_ACTUAL_WIDTH] & 0x1f0) != 0);
01190     if (goodEOL) ntilex--;
01191   MDF3(printk("ntilex=0x%x ntiley=0x%x goodEOL=0x%x\n",ntilex,ntiley,goodEOL));
01192   }
01193   MDF3(printk("ntilex=0x%x ntiley=0x%x\n",ntilex,ntiley));
01194 
01196   if (thispars->pars[P_OVERLAP]>0) ntiley=(ntiley<<1); 
01197   padlen=((ntilex+31)>>5) << 8;
01199 //  imgsz=((padlen * (thispars->pars[P_ACTUAL_HEIGHT]+X313_MARGINS) * thispars->pars[P_PAGE_ACQ]) << ((thispars->pars(P_TRIG) & 1)?1:0)); /// mostly rotten too
01200   imgsz=padlen * ntiley;
01201   MDF3(printk("imgsz=0x%x, padlen=0x%x\n",imgsz,padlen));
01202   if (thispars->pars[P_IMGSZMEM]!= imgsz)  setFramePar(thispars, P_IMGSZMEM, imgsz);  
01203   sa=X313_MAP_FRAME + (imgsz * thispars->pars[P_PAGE_ACQ]);  
01204   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH0_CTL1, X313_SDCHAN_REG1(0,1,1, sa, (ntilex-1), (ntiley-1)));
01205   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH0_CTL1, (int) X313_SDCHAN_REG1(0,1,1, sa, (ntilex-1), (ntiley-1))  ));
01206   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH0_CTL2, X313_SDCHAN_REG2(0,1,1, sa, (ntilex-1), (ntiley-1)));
01207   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH0_CTL2, (int) X313_SDCHAN_REG2(0,1,1, sa, (ntilex-1), (ntiley-1))  ));
01208   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH0_CTL0, X313_SDCHAN_REG0(0,1,1, sa, (ntilex-1), (ntiley-1))); 
01209   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH0_CTL0, (int) X313_SDCHAN_REG0(0,1,1, sa, (ntilex-1), (ntiley-1))  ));
01210   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SD_MODE, X313_CHN_EN_D(0));
01211   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SD_MODE, (int) X313_CHN_EN_D(0)  ));
01213   return 0;
01214 }
01215 
01226 int pgm_memcompressor (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01227   int ntilex,ntiley,sa,pf;
01228 //  struct frameparspair_t * pars_to_update[4]={
01229   struct frameparspair_t pars_to_update[4]={
01230    {P_SDRAM_CHN20, 0},
01231    {P_SDRAM_CHN21, 0},
01232    {P_SDRAM_CHN22, 0},
01233    {P_TILES, 0}
01234   };
01235   MDF3(printk(" frame8=%d\n",frame8));
01236   if (frame8 >= PARS_FRAMES) return -1; 
01237 //  int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01238   ntilex=((thispars->pars[P_ACTUAL_WIDTH]+X313_MARGINS-1)>>4);
01239   ntiley=thispars->pars[P_ACTUAL_HEIGHT]; 
01240   sa=X313_MAP_FRAME + ( thispars->pars[P_IMGSZMEM] * thispars->pars[P_PAGE_READ]); 
01241   pf=((thispars->pars[P_PF_HEIGHT] & 0xffff)>0)?1:0; // when mode==1, wnr means "photofinish" in fpga
01242   int depend=((thispars->pars[P_SENSOR_RUN] & 3)==SENSOR_RUN_STOP) ? 0 : 1;
01244   MDF9(printk(" thispars->pars[P_SENSOR_RUN]=0x%x,  depend=%d)\n", (int)thispars->pars[P_SENSOR_RUN], depend));
01245   pars_to_update[1].val=X313_SDCHAN_REG1(1,pf,depend, sa, (ntilex-1), (ntiley-16));
01246   pars_to_update[2].val=X313_SDCHAN_REG2(1,pf,depend, sa, (ntilex-1), (ntiley-16));
01247   pars_to_update[0].val=X313_SDCHAN_REG0(1,pf,depend, sa, (ntilex-1), (ntiley-16));
01248   pars_to_update[3].val=ntilex*(ntiley>>4);
01249 
01250   setFramePars(thispars, 4, pars_to_update);
01251   return 0;
01252 }
01253 
01263 int pgm_compmode   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01264   MDF3(printk(" frame8=%d\n",frame8));
01265   if (!jpeg_htable_is_programmed()) jpeg_htable_fpga_pgm ();
01266   if (frame8 >= PARS_FRAMES) return -1; 
01267   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01268   int comp_cmd=0;
01269   struct frameparspair_t pars_to_update[4]; 
01270   int nupdate=0;
01271 
01274   if (FRAMEPAR_MODIFIED(P_COLOR)) {
01275     switch (thispars->pars[P_COLOR] & 0x0f){
01276      case COLORMODE_MONO6:    comp_cmd |= COMPCMD_DEMOS(DEMOS_MONO6);    break;
01277      case COLORMODE_COLOR:    comp_cmd |= COMPCMD_DEMOS(DEMOS_COLOR18);  break;
01278      case COLORMODE_JP46:     comp_cmd |= COMPCMD_DEMOS(DEMOS_JP46);     break;
01279      case COLORMODE_JP46DC:   comp_cmd |= COMPCMD_DEMOS(DEMOS_JP46DC);   break;
01280      case COLORMODE_COLOR20:  comp_cmd |= COMPCMD_DEMOS(DEMOS_COLOR20);  break;
01281      case COLORMODE_JP4:      comp_cmd |= COMPCMD_DEMOS(DEMOS_JP4);      break;
01282      case COLORMODE_JP4DC:    comp_cmd |= COMPCMD_DEMOS(DEMOS_JP4DC);    break;
01283      case COLORMODE_JP4DIFF:  comp_cmd |= COMPCMD_DEMOS(DEMOS_JP4DIFF);  break;
01284      case COLORMODE_JP4HDR:   comp_cmd |= COMPCMD_DEMOS(DEMOS_JP4HDR);   break;
01285      case COLORMODE_JP4DIFF2: comp_cmd |= COMPCMD_DEMOS(DEMOS_JP4DIFF2); break;
01286      case COLORMODE_JP4HDR2:  comp_cmd |= COMPCMD_DEMOS(DEMOS_JP4HDR2);  break;
01287      case COLORMODE_MONO4:    comp_cmd |= COMPCMD_DEMOS(DEMOS_MONO4);    break;
01288     } 
01289   }
01290   MDF3(printk("comp_cmd=0x%x\n",comp_cmd));
01292   if (FRAMEPAR_MODIFIED(P_COMPMOD_BYRSH)) {
01293     comp_cmd |= COMPCMD_BAYERSHIFT(thispars->pars[P_COMPMOD_BYRSH]);
01294   }
01295 
01297   if (FRAMEPAR_MODIFIED(P_COMPMOD_TILSH)) {
01298     comp_cmd |= COMPCMD_TILESHIFT(thispars->pars[P_COMPMOD_TILSH]);
01299   }
01300 
01302   if (FRAMEPAR_MODIFIED(P_COMPMOD_DCSUB)) {
01303     comp_cmd |= COMPCMD_DCSUB(thispars->pars[P_COMPMOD_DCSUB]);
01304   }
01305 
01308   if (FRAMEPAR_MODIFIED(P_FOCUS_SHOW)) {
01309     comp_cmd |= COMPCMD_FOCUS(thispars->pars[ P_FOCUS_SHOW]);
01310   }
01311 
01313   if (comp_cmd) {
01314     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COMP_CMD, comp_cmd);
01315     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_COMP_CMD, (int) comp_cmd));
01316   } else {
01317     MDF3(printk("  comp_cmd==0, does not need to be sent\n"));
01318   }
01320   if (FRAMEPAR_MODIFIED(P_COLOR_SATURATION_BLUE) || FRAMEPAR_MODIFIED(P_COLOR_SATURATION_RED)) {
01321     int csb=(thispars->pars[P_COLOR_SATURATION_BLUE]* DEFAULT_COLOR_SATURATION_BLUE)/100;
01322     int csr=(thispars->pars[P_COLOR_SATURATION_RED] * DEFAULT_COLOR_SATURATION_RED)/100;
01323     if (unlikely(csb>1023)) {
01324        csb=102300/DEFAULT_COLOR_SATURATION_BLUE;
01325        SETFRAMEPARS_SET(P_COLOR_SATURATION_BLUE, csb);
01326     }
01327     if (unlikely(csr>1023)) {
01328        csr=102300/DEFAULT_COLOR_SATURATION_RED;
01329        SETFRAMEPARS_SET(P_COLOR_SATURATION_RED, csr);
01330     }
01331     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COLOR_SAT, ((DEFAULT_COLOR_SATURATION_BLUE*thispars->pars[P_COLOR_SATURATION_BLUE])/100) |
01332                                (((DEFAULT_COLOR_SATURATION_RED *thispars->pars[P_COLOR_SATURATION_RED])/100)<<12));
01333 
01334     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%lx)\n", (int)fpga_addr, (int) X313_WA_COLOR_SAT, (int)((DEFAULT_COLOR_SATURATION_BLUE*thispars->pars[P_COLOR_SATURATION_BLUE])/100) | (((DEFAULT_COLOR_SATURATION_RED *thispars->pars[P_COLOR_SATURATION_RED])/100)<<12)));
01335 
01336 
01337   }
01340   if (FRAMEPAR_MODIFIED(P_ZBINROUND)) {
01341     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_QUANTIZER_MODE,thispars->pars[P_ZBINROUND]);
01342     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int)X313_WA_QUANTIZER_MODE, (int)thispars->pars[P_ZBINROUND]));
01343   }
01344 
01345   if (nupdate)  setFramePars(thispars, nupdate, pars_to_update);  
01346   return 0;
01347 }
01348 
01357 
01358 int pgm_focusmode  (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01359   struct {
01360     long left;
01361     long right;
01362     long top;
01363     long bottom;
01364     long totalwidth;
01365     long filter_no;
01366     long show1;
01367   } focus_setup_data;
01368 //  struct frameparspair_t * pars_to_update[5]={
01369   struct frameparspair_t pars_to_update[5]={
01370    {P_FOCUS_TOTWIDTH, 0},
01371    {P_FOCUS_LEFT, 0},
01372    {P_FOCUS_WIDTH, 0},
01373    {P_FOCUS_TOP, 0},
01374    {P_FOCUS_HEIGHT, 0}
01375   };
01376   MDF3(printk(" frame8=%d\n",frame8));
01377   if (frame8 >= 0) return -1; 
01378   focus_setup_data.totalwidth=thispars->pars[P_ACTUAL_WIDTH]& 0xfff0; // anyway should be 16x
01379   focus_setup_data.show1=       thispars->pars[P_FOCUS_SHOW1];
01381   focus_setup_data.left=  ((((thispars->pars[P_RFOCUS_LEFT] * (0x10000-thispars->pars[P_RFOCUS_WIDTH])) >>16)* thispars->pars[P_ACTUAL_WIDTH])>>16) & 0xff8;
01382   focus_setup_data.right=(focus_setup_data.left+((thispars->pars[P_RFOCUS_WIDTH]*thispars->pars[P_ACTUAL_WIDTH])>>16) -8);
01383   if (focus_setup_data.right<0) {
01384     focus_setup_data.right=0;
01385     focus_setup_data.left=8;
01386   } else if (focus_setup_data.right >  0xfff) focus_setup_data.right = 0xfff;
01387   focus_setup_data.right &=0xff8;
01388   focus_setup_data.top=  ((((thispars->pars[P_RFOCUS_TOP] * (0x10000-thispars->pars[P_RFOCUS_HEIGHT])) >>16)* thispars->pars[P_ACTUAL_HEIGHT])>>16) & 0xff8;
01389   focus_setup_data.bottom=(focus_setup_data.top+((thispars->pars[P_RFOCUS_HEIGHT]*thispars->pars[P_ACTUAL_HEIGHT])>>16) -8);
01390   if (focus_setup_data.bottom<0) {
01391    focus_setup_data.bottom=0;
01392    focus_setup_data.top=8;
01393   } else if (focus_setup_data.bottom >  0xfff) focus_setup_data.bottom = 0xfff;
01394   focus_setup_data.bottom &=0xff8;
01395   focus_setup_data.filter_no=thispars->pars[P_FOCUS_FILTER];
01396   if   (focus_setup_data.filter_no > 14) focus_setup_data.filter_no=14;
01397   if ((focus_setup_data.totalwidth!=thispars->pars[P_FOCUS_TOTWIDTH]) ||
01398       (focus_setup_data.left   != thispars->pars[P_FOCUS_LEFT]) ||
01399       (focus_setup_data.right  != (focus_setup_data.left+thispars->pars[P_FOCUS_WIDTH] -8)) ||
01400       (focus_setup_data.top    != thispars->pars[P_FOCUS_TOP]) ||
01401       (focus_setup_data.bottom != (focus_setup_data.top+thispars->pars[P_FOCUS_HEIGHT] -8)) ||
01402       FRAMEPAR_MODIFIED(P_FOCUS_FILTER) ||
01403       FRAMEPAR_MODIFIED(P_FOCUS_SHOW1) ) {
01404      fpga_table_write_nice (CX313_FPGA_TABLES_FOCUSPARS, sizeof(focus_setup_data)/sizeof(focus_setup_data.left), (unsigned long *) &focus_setup_data);
01405      pars_to_update[0].val=focus_setup_data.totalwidth;
01406      pars_to_update[1].val=focus_setup_data.left;
01407      pars_to_update[2].val=focus_setup_data.right-focus_setup_data.left+8;
01408      pars_to_update[3].val=focus_setup_data.top;
01409      pars_to_update[4].val=focus_setup_data.bottom-focus_setup_data.top+8;
01410 
01411      setFramePars(thispars, 5, pars_to_update);  
01412   } 
01413   return 0;
01414 }
01415 
01416 
01425 
01426 int pgm_trigseq    (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01427   MDF3(printk(" frame8=%d\n",frame8));
01428   if (frame8 >= PARS_FRAMES) return -1; 
01429   if (frame8 >= 0) return -1; 
01430 //  int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01432   if (FRAMEPAR_MODIFIED(P_TRIG_CONDITION)) {
01433 //    X3X3_SEQ_SEND1(fpga_addr, X313_WA_CAMSYNCTRIG, thispars->pars[P_TRIG_CONDITION]);
01434 //    MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_CAMSYNCTRIG, (int)thispars->pars[P_TRIG_CONDITION]));
01435     port_csp0_addr[X313_WA_CAMSYNCTRIG] = thispars->pars[P_TRIG_CONDITION];
01436     MDF3(printk("  port_csp0_addr[0x%x]=0x%x\n",  (int) X313_WA_CAMSYNCTRIG, (int)thispars->pars[P_TRIG_CONDITION]));
01437   }
01439   if (FRAMEPAR_MODIFIED(P_TRIG_DELAY)) {
01440 //    X3X3_SEQ_SEND1(fpga_addr, X313_WA_CAMSYNCDLY, thispars->pars[P_TRIG_DELAY]);
01441 //    MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_CAMSYNCDLY, (int) thispars->pars[P_TRIG_DELAY]));
01442     port_csp0_addr[X313_WA_CAMSYNCDLY] = thispars->pars[P_TRIG_DELAY];
01443     MDF3(printk("  port_csp0_addr[0x%x]=0x%x\n",  (int) X313_WA_CAMSYNCDLY, (int) thispars->pars[P_TRIG_DELAY]));
01444   }
01446   if (FRAMEPAR_MODIFIED(P_TRIG_OUT)) {
01447 //    X3X3_SEQ_SEND1(fpga_addr, X313_WA_CAMSYNCOUT, thispars->pars[P_TRIG_OUT]);
01448 //    MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_CAMSYNCOUT, (int) thispars->pars[P_TRIG_OUT]));
01449     port_csp0_addr[X313_WA_CAMSYNCOUT] = thispars->pars[P_TRIG_OUT];
01450     MDF3(printk("  port_csp0_addr[0x%x]=0x%x\n",  (int) X313_WA_CAMSYNCOUT, (int) thispars->pars[P_TRIG_OUT]));
01451   }
01453   if (FRAMEPAR_MODIFIED(P_TRIG_PERIOD)) {
01454 //    X3X3_SEQ_SEND1(fpga_addr, X313_WA_CAMSYNCPER, thispars->pars[P_TRIG_PERIOD]);
01455 //    MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_CAMSYNCPER, (int)thispars->pars[P_TRIG_PERIOD]));
01456     port_csp0_addr[X313_WA_CAMSYNCPER] = thispars->pars[P_TRIG_PERIOD];
01457     MDF3(printk("  port_csp0_addr[0x%x]=0x%x\n",  (int) X313_WA_CAMSYNCPER, (int)thispars->pars[P_TRIG_PERIOD]));
01458   }
01459   return 0;
01460 }
01461 
01462 
01472 int pgm_irq     (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01473   MDF3(printk(" frame8=%d\n",frame8));
01474   if (frame8 >= PARS_FRAMES) return -1; 
01475   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01480   X3X3_SEQ_SEND1(fpga_addr,   X313_WA_SMART_IRQ,  (2 | ((thispars->pars[P_IRQ_SMART] & 1)?1:1)) | \
01481                                                   (8 | ((thispars->pars[P_IRQ_SMART] & 2)?4:0)));
01482   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SMART_IRQ, (int) ( (2 | ((thispars->pars[P_IRQ_SMART] & 1)?1:1)) | \
01483                                                   (8 | ((thispars->pars[P_IRQ_SMART] & 2)?4:0)))));
01484 
01485   return 0;
01486 }
01487 
01496 //#define P_CALLASAP       107 // bitmask - what functions work only in the current frame (ASAP) mode 
01497 //G_CALLNASAP
01498 int pgm_recalcseq  (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01499   int safe= thispars->pars[P_SKIP_FRAMES]?1:0; 
01500   int async=(thispars->pars[P_TRIG] & 4)?1:0;
01501   int nooverlap=(thispars->pars[P_TRIG] & 8)?1:0;
01502   int i,b,d;
01503   struct frameparspair_t pars[5]= {
01504     {G_CALLNEXT+1,0},
01505     {G_CALLNEXT+2,0},
01506     {G_CALLNEXT+3,0},
01507     {G_CALLNEXT+4,0},
01508     {G_CALLNASAP,0}};
01509   MDF3(printk(" frame8=%d, safe=%d, async=%d, nooverlap=%d\n",frame8, safe, async, nooverlap));
01510   for (i=0; i < (sizeof(ahead_tab)/sizeof(ahead_tab[0])); i+=7) {
01511     b=ahead_tab[i];
01512     d=ahead_tab[i+1+(nooverlap?5:(1+((async?2:0)+(safe?1:0))))]; 
01513     if ((d>0) && (d <=4 )) {
01514       pars[d-1].val |= (1<<b);
01515     }
01516     if (!ahead_tab[i+1]) { 
01517       pars[4].val |= (1<<b);
01518     }
01519 
01520   }
01521 
01522   for (i=2; i>=0; i--) {
01523       pars[i].val |= pars[i+1].val;
01524   }
01526   GLOBALPARS(G_CALLNEXT+1)=pars[0].val;
01527   GLOBALPARS(G_CALLNEXT+2)=pars[1].val;
01528   GLOBALPARS(G_CALLNEXT+3)=pars[2].val;
01529   GLOBALPARS(G_CALLNEXT+4)=pars[3].val;
01530   GLOBALPARS(G_CALLNASAP)= pars[4].val;
01531   return 0;
01532 }
01533 
01543 int pgm_comprestart(struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01544   MDF3(printk(" frame8=%d\n",frame8));
01545   if (frame8 >= PARS_FRAMES) return -1; 
01546 
01547   if (thispars->pars[P_COMPRESSOR_RUN]==0) return 0; 
01548   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01550   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH2_CTL1,   thispars->pars[P_SDRAM_CHN21]);
01551   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH2_CTL2,   thispars->pars[P_SDRAM_CHN22]);
01552   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH2_CTL0,   thispars->pars[P_SDRAM_CHN20]);
01553   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH2_CTL1,   (int) thispars->pars[P_SDRAM_CHN21]));
01554   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH2_CTL2,   (int) thispars->pars[P_SDRAM_CHN22]));
01555   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SDCH2_CTL0,   (int) thispars->pars[P_SDRAM_CHN20]));
01556 
01558   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SD_MODE, X313_CHN_EN_D(0));
01559   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_SD_MODE, (int) X313_CHN_EN_D(0)));
01561   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_MCUNUM, thispars->pars[P_TILES]-1);
01562   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_MCUNUM, (int) thispars->pars[P_TILES]-1));
01564   X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COMP_CMD, (thispars->pars[P_COMPRESSOR_RUN]==2) ? COMPCMD_RUN : COMPCMD_SINGLE);
01565   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_COMP_CMD, (int) ((thispars->pars[P_COMPRESSOR_RUN]==2) ? COMPCMD_RUN : COMPCMD_SINGLE)));
01566   return 0;
01567 }
01568 
01577 int pgm_compstop    (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01578   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01579   MDF3(printk(" frame8=%d\n",frame8));
01580 //  if (frame8 & ~PARS_FRAMES_MASK) return -1; /// wrong frame (can be only -1 or 0..7)
01581   if (frame8 >= PARS_FRAMES) return -1; 
01582   X3X3_SEQ_SEND1(fpga_addr, X313_WA_COMP_CMD, COMPCMD_STOP);
01583   MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int)  X313_WA_COMP_CMD, (int) COMPCMD_STOP));
01584   return 0;
01585 }
01586 
01587 
01596 int pgm_compctl   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01597   MDF3(printk(" frame8=%d, prevpars->pars[P_COMPRESSOR_RUN]=%d, thispars->pars[P_COMPRESSOR_RUN]=%d \n",frame8, (int) prevpars->pars[P_COMPRESSOR_RUN], (int) thispars->pars[P_COMPRESSOR_RUN]));
01598   if (frame8 >= PARS_FRAMES) return -1; 
01599   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01600   if ((prevpars->pars[P_COMPRESSOR_RUN]==0) && (thispars->pars[P_COMPRESSOR_RUN]!=0)) { 
01601 
01602     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH2_CTL1,   thispars->pars[P_SDRAM_CHN21]);
01603     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH2_CTL2,   thispars->pars[P_SDRAM_CHN22]);
01604     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SDCH2_CTL0,   thispars->pars[P_SDRAM_CHN20]);
01605 
01607     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_SD_MODE, X313_CHN_EN_D(2));
01609     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_MCUNUM, thispars->pars[P_TILES]-1);
01610     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int)X313_WA_SDCH2_CTL1, (int)thispars->pars[P_SDRAM_CHN21]));
01611     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int)X313_WA_SDCH2_CTL2, (int)thispars->pars[P_SDRAM_CHN22]));
01612     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int)X313_WA_SDCH2_CTL0, (int)thispars->pars[P_SDRAM_CHN20]));
01613     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int)X313_WA_SD_MODE, (int)thispars->pars[P_SDRAM_CHN21]));
01614     MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int)X313_WA_MCUNUM, (int)(thispars->pars[P_TILES]-1)));
01615   }
01616   if ((prevpars->pars[P_COMPRESSOR_RUN] != thispars->pars[P_COMPRESSOR_RUN]) || (thispars->pars[P_COMPRESSOR_RUN]==COMPRESSOR_RUN_SINGLE))  
01617     switch (thispars->pars[P_COMPRESSOR_RUN]) {
01618      case COMPRESSOR_RUN_STOP:
01619        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COMP_CMD, COMPCMD_STOP);
01620        MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int) X313_WA_COMP_CMD, (int) COMPCMD_STOP));
01621       break;
01622      case COMPRESSOR_RUN_SINGLE:
01623        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COMP_CMD, COMPCMD_SINGLE);
01624        if (!x313_is_dma_on()) x313_dma_start();
01625        MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int) X313_WA_COMP_CMD, (int) COMPCMD_SINGLE));
01626        break;
01627      case COMPRESSOR_RUN_CONT:
01628        X3X3_SEQ_SEND1(fpga_addr,  X313_WA_COMP_CMD, COMPCMD_RUN);
01629        if (!x313_is_dma_on()) x313_dma_start();
01630        MDF9(printk(" X3X3_SEQ_SEND1(0x%x,  0x%x,  0x%x)\n", (int)fpga_addr, (int) X313_WA_COMP_CMD, (int) COMPCMD_RUN));
01631        break;
01632     }
01633   return 0;
01634 }
01635 
01639 
01650 int pgm_gammaload  (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01651   struct frameparspair_t pars_to_update[4]; 
01652   int nupdate=0;
01653   MDF3(printk(" frame8=%d, (getThisFrameNumber() & PARS_FRAMES_MASK)= %ld, thispars->pars[P_GTAB_R]=0x%lx, thispars->pars[P_FRAME]=0x%lx\n",frame8, getThisFrameNumber() & PARS_FRAMES_MASK, thispars->pars[P_GTAB_R],thispars->pars[P_FRAME]));
01654 
01655 //  framepars[frame8 & PARS_FRAMES_MASK].functions |= 1 << func_num;
01656   struct framepars_t * nextspars=&framepars[(thispars->pars[P_FRAME]+1) & PARS_FRAMES_MASK];
01657   MDF3(printk(" nextframe=%d, nextspars->pars[P_GTAB_R]=0x%lx, nextspars->pars[P_FRAME]=0x%lx\n",(int) ((thispars->pars[P_FRAME]+1) & PARS_FRAMES_MASK), nextspars->pars[P_GTAB_R], nextspars->pars[P_FRAME]));
01658   MDF16(printk(" nextframe=%d, nextspars->pars[P_GTAB_R]=0x%lx, nextspars->pars[P_FRAME]=0x%lx\n",(int) ((thispars->pars[P_FRAME]+1) & PARS_FRAMES_MASK), nextspars->pars[P_GTAB_R], nextspars->pars[P_FRAME]));
01660   if (frame8 >= 0) return -1; 
01661   int color, rslt;
01662   struct {
01663     unsigned short scale;
01664     unsigned short hash16;
01665   } gamma32;
01666   unsigned long * pgamma32= (unsigned long *) & gamma32;
01667   unsigned long *gtable;
01668   int need_pgm=0;
01669   for (color=0; color<4; color++) if (get_locked_hash32(color)!=thispars->pars[P_GTAB_R+color]) need_pgm++;
01671   if (need_pgm) {
01672     for (color=0; color<4; color++) {
01673       *pgamma32=thispars->pars[P_GTAB_R+color];
01675       rslt=set_gamma_table (gamma32.hash16, gamma32.scale, NULL,  GAMMA_MODE_HARDWARE | GAMMA_MODE_LOCK, color); 
01676 
01677       if ((gtable= get_gamma_fpga(color))) fpga_table_write_nice (CX313_FPGA_TABLES_GAMMA + (color * 256), 256, gtable);
01678       if (rslt <= 0) SETFRAMEPARS_SET(P_GTAB_R+color, get_locked_hash32(color)); 
01679     }
01680     MDF3(printk("need_pgm=%d, get_locked_hash32(*)=0x%lx 0x%lx 0x%lx 0x%lx\n",need_pgm,get_locked_hash32(0),get_locked_hash32(1),get_locked_hash32(2),get_locked_hash32(3)));
01681   }
01682   if (nupdate)  {
01683      setFramePars(thispars, nupdate, pars_to_update);  
01684      MDF3(printk("had to restore back %d gamma tables (color components) \n",nupdate));
01685      return -1;
01686   }
01687   return 0;
01688 }
01689 
01699 int pgm_sensorregs   (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01700   MDF3(printk(" frame8=%d\n",frame8));
01701   return 0;
01702 }
01703 
01712 
01713 int pgm_prescal       (struct sensor_t * sensor,  struct framepars_t * thispars, struct framepars_t * prevpars, int frame8) {
01714   MDF3(printk(" frame8=%d\n",frame8));
01715   if (frame8 >= PARS_FRAMES) return -1; 
01716   int fpga_addr=(frame8 <0) ? X313_SEQ_ASAP : (X313_SEQ_FRAME0+frame8);
01717   if (FRAMEPAR_MODIFIED(P_VIGNET_AX)) {
01718     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_AX(thispars->pars[P_VIGNET_AX]));
01719     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_AX(thispars->pars[P_VIGNET_AX])));
01720   }
01721   if (FRAMEPAR_MODIFIED(P_VIGNET_AY)) {
01722     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_AY(thispars->pars[P_VIGNET_AY]));
01723     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_AY(thispars->pars[P_VIGNET_AY])));
01724   }
01725   if (FRAMEPAR_MODIFIED(P_VIGNET_C)) {
01726     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_C(thispars->pars[P_VIGNET_C]));
01727     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_C(thispars->pars[P_VIGNET_C])));
01728   }
01729   if (FRAMEPAR_MODIFIED(P_VIGNET_BX)) {
01730     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_BX(thispars->pars[P_VIGNET_BX]));
01731     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_BX(thispars->pars[P_VIGNET_BX])));
01732   }
01733   if (FRAMEPAR_MODIFIED(P_VIGNET_BY)) {
01734     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_BY(thispars->pars[P_VIGNET_BY]));
01735     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_BY(thispars->pars[P_VIGNET_BY])));
01736   }
01737   if (FRAMEPAR_MODIFIED(P_VIGNET_ZERIN)) {
01738     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_FATZERO_IN(thispars->pars[P_VIGNET_ZERIN]));
01739     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_FATZERO_IN(thispars->pars[P_VIGNET_ZERIN])));
01740   }
01741   if (FRAMEPAR_MODIFIED(P_VIGNET_ZEROUT)) {
01742     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_FATZERO_OUT(thispars->pars[P_VIGNET_ZEROUT]));
01743     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_FATZERO_OUT(thispars->pars[P_VIGNET_ZEROUT])));
01744   }
01745   if (FRAMEPAR_MODIFIED(P_VIGNET_SHL)) {
01746     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_POSTSCALE(thispars->pars[P_VIGNET_SHL]));
01747     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_POSTSCALE(thispars->pars[P_VIGNET_SHL])));
01748   }
01749   if (FRAMEPAR_MODIFIED(P_DGAINR)) {
01750     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_SCALES(0, thispars->pars[P_DGAINR]));
01751     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_SCALES(0,thispars->pars[P_DGAINR])));
01752   }
01753   if (FRAMEPAR_MODIFIED(P_DGAING)) {
01754     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_SCALES(1, thispars->pars[P_DGAING]));
01755     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_SCALES(1,thispars->pars[P_DGAING])));
01756   }
01757   if (FRAMEPAR_MODIFIED(P_DGAINGB)) {
01758     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_SCALES(2, thispars->pars[P_DGAINGB]));
01759     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_SCALES(2,thispars->pars[P_DGAINGB])));
01760   }
01761   if (FRAMEPAR_MODIFIED(P_DGAINB)) {
01762     X3X3_SEQ_SEND1(fpga_addr,  X313_WA_LENSCORR, X313_LENS_SCALES(3, thispars->pars[P_DGAINB]));
01763     MDF3(printk("  X3X3_SEQ_SEND1(0x%x,0x%x, 0x%x)\n", fpga_addr,  (int) X313_WA_LENSCORR, (int)X313_LENS_SCALES(3,thispars->pars[P_DGAINB])));
01764   }
01765   return 0;
01766 }

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