x393
1.0
FPGAcodeforElphelNC393camera
timestamp_to_serial.v
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1
39
`timescale 1ns/1ps
40
41
module
timestamp_to_serial
(
42
input
clk
,
// clock that drives time counters
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input
stb
,
// serialize and send timestamp message
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input
[
31
:
0
]
sec
,
// time seconds
45
input
[
19
:
0
]
usec
,
// time microseconds
46
output
reg
[
7
:
0
]
tdata
// byte-parallel timestamp data sent right after stb input
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);
48
reg
[
2
:
0
]
cntr
;
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reg
busy
=
0
;
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wire
[
2
:
0
]
cntr_w
;
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assign
cntr_w
=
stb
?
3'b0
:
cntr
;
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always
@ (
posedge
clk
)
begin
53
if
(
stb
)
busy
<=
1
;
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else
if
(&
cntr_w
[
2
:
1
])
busy
<=
0
;
55
if
(
stb
)
cntr
<=
1
;
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else
if
(
busy
)
cntr
<=
cntr
+
1
;
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case
(
cntr_w
)
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3'h0
:
tdata
<=
sec
[
7
:
0
];
60
3'h1
:
tdata
<=
sec
[
15
:
8
];
61
3'h2
:
tdata
<=
sec
[
23
:
16
];
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3'h3
:
tdata
<=
sec
[
31
:
24
];
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3'h4
:
tdata
<=
usec
[
7
:
0
];
64
3'h5
:
tdata
<=
usec
[
15
:
8
];
65
3'h6
:
tdata
<= {
4'h0
,
usec
[
19
:
16
]};
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3'h7
:
tdata
<=
8'h0
;
67
endcase
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end
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70
endmodule
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timestamp_to_serial.9650busy
9650busyreg
Definition:
timestamp_to_serial.v:49
timestamp_to_serial.9646sec
[31:0] 9646sec
Definition:
timestamp_to_serial.v:44
timestamp_to_serial.9651cntr_w
9651cntr_wwire[2:0]
Definition:
timestamp_to_serial.v:50
timestamp_to_serial.9649cntr
9649cntrreg[2:0]
Definition:
timestamp_to_serial.v:48
timestamp_to_serial.9648tdata
reg [7:0] 9648tdata
Definition:
timestamp_to_serial.v:46
timestamp_to_serial.9644clk
9644clk
Definition:
timestamp_to_serial.v:42
timestamp_to_serial.9645stb
9645stb
Definition:
timestamp_to_serial.v:43
timestamp_to_serial.9647usec
[19:0] 9647usec
Definition:
timestamp_to_serial.v:45
timestamp_to_serial
Definition:
timestamp_to_serial.v:41
timing
timestamp_to_serial.v
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