x393  1.0
FPGAcodeforElphelNC393camera
timestamp_to_serial Module Reference
Inheritance diagram for timestamp_to_serial:

Static Public Member Functions

Always Constructs

ALWAYS_462  ( clk )

Public Attributes

Inputs

clk  
stb  
sec   [ 31 : 0 ]
usec   [ 19 : 0 ]

Outputs

tdata   reg [ 7 : 0 ]

Signals

reg[ 2 : 0 ]  cntr
reg  busy
wire[ 2 : 0 ]  cntr_w

Detailed Description

Definition at line 41 of file timestamp_to_serial.v.

Member Function Documentation

ALWAYS_462 (   clk  
)
Always Construct

Definition at line 52 of file timestamp_to_serial.v.

Member Data Documentation

clk
Input

Definition at line 42 of file timestamp_to_serial.v.

stb
Input

Definition at line 43 of file timestamp_to_serial.v.

sec [ 31 : 0 ]
Input

Definition at line 44 of file timestamp_to_serial.v.

usec [ 19 : 0 ]
Input

Definition at line 45 of file timestamp_to_serial.v.

tdata reg [ 7 : 0 ]
Output

Definition at line 46 of file timestamp_to_serial.v.

cntr
Signal

Definition at line 48 of file timestamp_to_serial.v.

busy
Signal

Definition at line 49 of file timestamp_to_serial.v.

cntr_w
Signal

Definition at line 50 of file timestamp_to_serial.v.


The documentation for this Module was generated from the following files: