x393  1.0
FPGAcodeforElphelNC393camera
Static Public Member Functions | Public Attributes | List of all members
simul_saxi_gp_wr Module Reference
Inheritance diagram for simul_saxi_gp_wr:
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Collaboration diagram for simul_saxi_gp_wr:
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Static Public Member Functions

Always Constructs

ALWAYS_429  ( rst or aclk )
ALWAYS_430  ( rst or aclk )
ALWAYS_431  ( rst or aclk )
ALWAYS_432  ( ** )
ALWAYS_433  ( aclk )
ALWAYS_434  ( aclk or rst )
ALWAYS_435  ( rst or aclk )

Public Attributes

Inputs

rst  
aclk  
awaddr   [ 31 : 0 ]
awvalid  
awid   [ 5 : 0 ]
awlock   [ 1 : 0 ]
awcache   [ 3 : 0 ]
awprot   [ 2 : 0 ]
awlen   [ 3 : 0 ]
awsize   [ 1 : 0 ]
awburst   [ 1 : 0 ]
awqos   [ 3 : 0 ]
wdata   [ 31 : 0 ]
wvalid  
wid   [ 5 : 0 ]
wlast  
wstrb   [ 3 : 0 ]
bready  
sim_wr_ready  
sim_bresp_latency   [ 3 : 0 ]

Outputs

aresetn  
awready  
wready  
bvalid  
bid   [ 5 : 0 ]
bresp   [ 1 : 0 ]
sim_wr_address   [ 31 : 0 ]
sim_wid   [ 5 : 0 ]
sim_wr_valid  
sim_wr_data   [ 31 : 0 ]
sim_wr_stb   [ 3 : 0 ]
sim_wr_size   [ 1 : 0 ]
sim_wr_qos   [ 3 : 0 ]

Parameters

AW_FIFO_DEPTH   3
W_FIFO_DEPTH   3
AW_FIFO_NUM   [AW_FIFO_DEPTH : 0 ] 8
W_FIFO_NUM   [W_FIFO_DEPTH : 0 ] 8
VALID_AWLOCK   2 'b0
VALID_AWCACHE   4 'b0011
VALID_AWPROT   3 'b000
VALID_AWLOCK_MASK   2 'b11
VALID_AWCACHE_MASK   4 'b0011
VALID_AWPROT_MASK   3 'b010

Signals

wire  aw_nempty
wire  w_nempty
reg[ 11 : 0 ]  next_wr_address_w
reg[ 31 : 0 ]  write_address
wire  fifo_wd_rd
wire  last_confirmed_write
wire[ 5 : 0 ]  awid_out
wire[ 1 : 0 ]  awburst_out
wire[ 1 : 0 ]  awsize_out
wire[ 3 : 0 ]  awlen_out
wire[ 31 : 0 ]  awaddr_out
wire[ 5 : 0 ]  wid_out
wire  wlast_out
wire[ 3 : 0 ]  wstrb_out
wire[ 31 : 0 ]  wdata_out
reg  fifo_data_we_d
reg  fifo_addr_we_d
reg[ 3 : 0 ]  write_left
reg[ 1 : 0 ]  wburst
reg[ 3 : 0 ]  wlen
reg[ 1 : 0 ]  wsize
wire  start_write_burst_w
wire  write_in_progress_w
reg  write_in_progress
reg[ 7 : 0 ]  num_full_data
wire[ 5 : 0 ]  wresp_num_in_fifo
reg  was_wresp_re
wire  wresp_re
wire[AW_FIFO_DEPTH : 0 ]  wacount
wire[W_FIFO_DEPTH : 0 ]  wcount
wire[ 3 : 0 ]  sim_wr_mask
wire[ 1 : 0 ]  bresp_value
wire[ 1 : 0 ]  bresp_in
wire  fifo_wd_rd_dly
wire[ 5 : 0 ]  bid_in

Module Instances

fifo_same_clock_fill::waddr_i   Module fifo_same_clock_fill
fifo_same_clock_fill::wdata_i   Module fifo_same_clock_fill
dly_16::bresp_dly_16_i   Module dly_16
fifo_same_clock_fill::wresp_ext_i   Module fifo_same_clock_fill
fifo_same_clock_fill::wresp_i   Module fifo_same_clock_fill

Detailed Description

Definition at line 41 of file simul_saxi_gp_wr.v.

Member Function Documentation

ALWAYS_429 (   rst or aclk  
)
Always Construct

Definition at line 147 of file simul_saxi_gp_wr.v.

ALWAYS_430 (   rst or aclk  
)
Always Construct

Definition at line 153 of file simul_saxi_gp_wr.v.

ALWAYS_431 (   rst or aclk  
)
Always Construct

Definition at line 159 of file simul_saxi_gp_wr.v.

ALWAYS_432 (   *---  
)
Always Construct

Definition at line 179 of file simul_saxi_gp_wr.v.

ALWAYS_433 (   aclk  
)
Always Construct

Definition at line 209 of file simul_saxi_gp_wr.v.

ALWAYS_434 (   aclk or rst  
)
Always Construct

Definition at line 235 of file simul_saxi_gp_wr.v.

ALWAYS_435 (   rst or aclk  
)
Always Construct

Definition at line 339 of file simul_saxi_gp_wr.v.

Member Data Documentation

rst
Input

Definition at line 42 of file simul_saxi_gp_wr.v.

aclk
Input

Definition at line 44 of file simul_saxi_gp_wr.v.

aresetn
Output

Definition at line 45 of file simul_saxi_gp_wr.v.

awaddr [ 31 : 0 ]
Input

Definition at line 47 of file simul_saxi_gp_wr.v.

awvalid
Input

Definition at line 48 of file simul_saxi_gp_wr.v.

awready
Output

Definition at line 49 of file simul_saxi_gp_wr.v.

awid [ 5 : 0 ]
Input

Definition at line 50 of file simul_saxi_gp_wr.v.

awlock [ 1 : 0 ]
Input

Definition at line 51 of file simul_saxi_gp_wr.v.

awcache [ 3 : 0 ]
Input

Definition at line 52 of file simul_saxi_gp_wr.v.

awprot [ 2 : 0 ]
Input

Definition at line 53 of file simul_saxi_gp_wr.v.

awlen [ 3 : 0 ]
Input

Definition at line 54 of file simul_saxi_gp_wr.v.

awsize [ 1 : 0 ]
Input

Definition at line 55 of file simul_saxi_gp_wr.v.

awburst [ 1 : 0 ]
Input

Definition at line 56 of file simul_saxi_gp_wr.v.

awqos [ 3 : 0 ]
Input

Definition at line 57 of file simul_saxi_gp_wr.v.

wdata [ 31 : 0 ]
Input

Definition at line 59 of file simul_saxi_gp_wr.v.

wvalid
Input

Definition at line 60 of file simul_saxi_gp_wr.v.

wready
Output

Definition at line 61 of file simul_saxi_gp_wr.v.

wid [ 5 : 0 ]
Input

Definition at line 62 of file simul_saxi_gp_wr.v.

wlast
Input

Definition at line 63 of file simul_saxi_gp_wr.v.

wstrb [ 3 : 0 ]
Input

Definition at line 64 of file simul_saxi_gp_wr.v.

bvalid
Output

Definition at line 66 of file simul_saxi_gp_wr.v.

bready
Input

Definition at line 67 of file simul_saxi_gp_wr.v.

bid [ 5 : 0 ]
Output

Definition at line 68 of file simul_saxi_gp_wr.v.

bresp [ 1 : 0 ]
Output

Definition at line 69 of file simul_saxi_gp_wr.v.

sim_wr_address [ 31 : 0 ]
Output

Definition at line 72 of file simul_saxi_gp_wr.v.

sim_wid [ 5 : 0 ]
Output

Definition at line 73 of file simul_saxi_gp_wr.v.

sim_wr_valid
Output

Definition at line 74 of file simul_saxi_gp_wr.v.

sim_wr_ready
Input

Definition at line 75 of file simul_saxi_gp_wr.v.

sim_wr_data [ 31 : 0 ]
Output

Definition at line 76 of file simul_saxi_gp_wr.v.

sim_wr_stb [ 3 : 0 ]
Output

Definition at line 77 of file simul_saxi_gp_wr.v.

sim_wr_size [ 1 : 0 ]
Output

Definition at line 78 of file simul_saxi_gp_wr.v.

sim_bresp_latency [ 3 : 0 ]
Input

Definition at line 79 of file simul_saxi_gp_wr.v.

sim_wr_qos [ 3 : 0 ]
Output

Definition at line 80 of file simul_saxi_gp_wr.v.

AW_FIFO_DEPTH 3
Parameter

Definition at line 82 of file simul_saxi_gp_wr.v.

W_FIFO_DEPTH 3
Parameter

Definition at line 83 of file simul_saxi_gp_wr.v.

AW_FIFO_NUM 8
Parameter

Definition at line 84 of file simul_saxi_gp_wr.v.

W_FIFO_NUM 8
Parameter

Definition at line 85 of file simul_saxi_gp_wr.v.

VALID_AWLOCK 2 'b0
Parameter

Definition at line 88 of file simul_saxi_gp_wr.v.

VALID_AWCACHE 4 'b0011
Parameter

Definition at line 89 of file simul_saxi_gp_wr.v.

VALID_AWPROT 3 'b000
Parameter

Definition at line 90 of file simul_saxi_gp_wr.v.

VALID_AWLOCK_MASK 2 'b11
Parameter

Definition at line 91 of file simul_saxi_gp_wr.v.

VALID_AWCACHE_MASK 4 'b0011
Parameter

Definition at line 92 of file simul_saxi_gp_wr.v.

VALID_AWPROT_MASK 3 'b010
Parameter

Definition at line 93 of file simul_saxi_gp_wr.v.

aw_nempty
Signal

Definition at line 102 of file simul_saxi_gp_wr.v.

w_nempty
Signal

Definition at line 103 of file simul_saxi_gp_wr.v.

next_wr_address_w
Signal

Definition at line 104 of file simul_saxi_gp_wr.v.

write_address
Signal

Definition at line 105 of file simul_saxi_gp_wr.v.

fifo_wd_rd
Signal

Definition at line 106 of file simul_saxi_gp_wr.v.

last_confirmed_write
Signal

Definition at line 107 of file simul_saxi_gp_wr.v.

awid_out
Signal

Definition at line 110 of file simul_saxi_gp_wr.v.

awburst_out
Signal

Definition at line 111 of file simul_saxi_gp_wr.v.

awsize_out
Signal

Definition at line 112 of file simul_saxi_gp_wr.v.

awlen_out
Signal

Definition at line 113 of file simul_saxi_gp_wr.v.

awaddr_out
Signal

Definition at line 114 of file simul_saxi_gp_wr.v.

wid_out
Signal

Definition at line 115 of file simul_saxi_gp_wr.v.

wlast_out
Signal

Definition at line 116 of file simul_saxi_gp_wr.v.

wstrb_out
Signal

Definition at line 117 of file simul_saxi_gp_wr.v.

wdata_out
Signal

Definition at line 118 of file simul_saxi_gp_wr.v.

fifo_data_we_d
Signal

Definition at line 120 of file simul_saxi_gp_wr.v.

fifo_addr_we_d
Signal

Definition at line 121 of file simul_saxi_gp_wr.v.

write_left
Signal

Definition at line 122 of file simul_saxi_gp_wr.v.

wburst
Signal

Definition at line 123 of file simul_saxi_gp_wr.v.

wlen
Signal

Definition at line 124 of file simul_saxi_gp_wr.v.

wsize
Signal

Definition at line 125 of file simul_saxi_gp_wr.v.

start_write_burst_w
Signal

Definition at line 126 of file simul_saxi_gp_wr.v.

write_in_progress_w
Signal

Definition at line 127 of file simul_saxi_gp_wr.v.

write_in_progress
Signal

Definition at line 128 of file simul_saxi_gp_wr.v.

num_full_data
Signal

Definition at line 129 of file simul_saxi_gp_wr.v.

wresp_num_in_fifo
Signal

Definition at line 131 of file simul_saxi_gp_wr.v.

was_wresp_re
Signal

Definition at line 132 of file simul_saxi_gp_wr.v.

wresp_re
Signal

Definition at line 133 of file simul_saxi_gp_wr.v.

wacount
Signal

Definition at line 135 of file simul_saxi_gp_wr.v.

wcount
Signal

Definition at line 136 of file simul_saxi_gp_wr.v.

sim_wr_mask
Signal

Definition at line 203 of file simul_saxi_gp_wr.v.

bresp_value
Signal

Definition at line 299 of file simul_saxi_gp_wr.v.

bresp_in
Signal

Definition at line 300 of file simul_saxi_gp_wr.v.

fifo_wd_rd_dly
Signal

Definition at line 302 of file simul_saxi_gp_wr.v.

bid_in
Signal

Definition at line 303 of file simul_saxi_gp_wr.v.

dly_16 bresp_dly_16_i
Module Instance

Definition at line 307 of file simul_saxi_gp_wr.v.

fifo_same_clock_fill waddr_i
Module Instance

Definition at line 262 of file simul_saxi_gp_wr.v.

fifo_same_clock_fill wdata_i
Module Instance

Definition at line 280 of file simul_saxi_gp_wr.v.

fifo_same_clock_fill wresp_ext_i
Module Instance

Definition at line 319 of file simul_saxi_gp_wr.v.

fifo_same_clock_fill wresp_i
Module Instance

Definition at line 345 of file simul_saxi_gp_wr.v.

The documentation for this Module was generated from the following files: