x393  1.0
FPGAcodeforElphelNC393camera
sens_hispi_clock Member List

This is the complete list of members for sens_hispi_clock, including all inherited members.

CAPACITANCEibufds_ibufgdsParameter
DIFF_TERMibufds_ibufgdsParameter
DQS_BIASibufds_ibufgdsParameter
IBUF_DELAY_VALUEibufds_ibufgdsParameter
IBUF_LOW_PWRibufds_ibufgdsParameter
IFD_DELAY_VALUEibufds_ibufgdsParameter
IOSTANDARDibufds_ibufgdsParameter
Oibufds_ibufgdsOutput
Iibufds_ibufgdsInput
IBibufds_ibufgdsInput
CAPACITANCEibufds_ibufgds_50Parameter
DIFF_TERMibufds_ibufgds_50Parameter
DQS_BIASibufds_ibufgds_50Parameter
IBUF_DELAY_VALUEibufds_ibufgds_50Parameter
IBUF_LOW_PWRibufds_ibufgds_50Parameter
IFD_DELAY_VALUEibufds_ibufgds_50Parameter
IOSTANDARDibufds_ibufgds_50Parameter
Oibufds_ibufgds_50Output
Iibufds_ibufgds_50Input
IBibufds_ibufgds_50Input
IODELAY_GRPidelay_nofineParameter
DELAY_VALUEidelay_nofineParameter
REFCLK_FREQUENCYidelay_nofineParameter
HIGH_PERFORMANCE_MODEidelay_nofineParameter
clkidelay_nofineInput
rstidelay_nofineInput
setidelay_nofineInput
ldidelay_nofineInput
delayidelay_nofineInput
data_inidelay_nofineInput
data_outidelay_nofineOutput
PHASE_WIDTHmmcm_phase_cntrParameter
CLKIN_PERIODmmcm_phase_cntrParameter
BANDWIDTHmmcm_phase_cntrParameter
CLKFBOUT_MULT_Fmmcm_phase_cntrParameter
CLKFBOUT_PHASEmmcm_phase_cntrParameter
CLKOUT0_PHASEmmcm_phase_cntrParameter
CLKOUT1_PHASEmmcm_phase_cntrParameter
CLKOUT2_PHASEmmcm_phase_cntrParameter
CLKOUT3_PHASEmmcm_phase_cntrParameter
CLKOUT4_PHASEmmcm_phase_cntrParameter
CLKOUT5_PHASEmmcm_phase_cntrParameter
CLKOUT6_PHASEmmcm_phase_cntrParameter
CLKOUT0_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT1_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT2_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT3_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT4_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT5_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT6_DUTY_CYCLEmmcm_phase_cntrParameter
CLKOUT4_CASCADEmmcm_phase_cntrParameter
CLKFBOUT_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT0_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT1_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT2_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT3_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT4_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT5_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT6_USE_FINE_PSmmcm_phase_cntrParameter
CLKOUT0_DIVIDE_Fmmcm_phase_cntrParameter
CLKOUT1_DIVIDEmmcm_phase_cntrParameter
CLKOUT2_DIVIDEmmcm_phase_cntrParameter
CLKOUT3_DIVIDEmmcm_phase_cntrParameter
CLKOUT4_DIVIDEmmcm_phase_cntrParameter
CLKOUT5_DIVIDEmmcm_phase_cntrParameter
CLKOUT6_DIVIDEmmcm_phase_cntrParameter
COMPENSATIONmmcm_phase_cntrParameter
DIVCLK_DIVIDEmmcm_phase_cntrParameter
REF_JITTER1mmcm_phase_cntrParameter
REF_JITTER2mmcm_phase_cntrParameter
SS_ENmmcm_phase_cntrParameter
SS_MODEmmcm_phase_cntrParameter
SS_MOD_PERIODmmcm_phase_cntrParameter
STARTUP_WAITmmcm_phase_cntrParameter
clkin1mmcm_phase_cntrInput
clkin2mmcm_phase_cntrInput
sel_clk2mmcm_phase_cntrInput
clkfbinmmcm_phase_cntrInput
rstmmcm_phase_cntrInput
pwrdwnmmcm_phase_cntrInput
psclkmmcm_phase_cntrInput
ps_wemmcm_phase_cntrInput
ps_dinmmcm_phase_cntrInput
ps_readymmcm_phase_cntrOutput
ps_doutmmcm_phase_cntrOutput
clkout0mmcm_phase_cntrOutput
clkout1mmcm_phase_cntrOutput
clkout2mmcm_phase_cntrOutput
clkout3mmcm_phase_cntrOutput
clkout4mmcm_phase_cntrOutput
clkout5mmcm_phase_cntrOutput
clkout6mmcm_phase_cntrOutput
clkout0bmmcm_phase_cntrOutput
clkout1bmmcm_phase_cntrOutput
clkout2bmmcm_phase_cntrOutput
clkout3bmmcm_phase_cntrOutput
clkfboutmmcm_phase_cntrOutput
clkfboutbmmcm_phase_cntrOutput
lockedmmcm_phase_cntrOutput
clkin_stoppedmmcm_phase_cntrOutput
clkfb_stoppedmmcm_phase_cntrOutput
ps_dout_rmmcm_phase_cntrSignal
psenmmcm_phase_cntrSignal
psincdecmmcm_phase_cntrSignal
psdonemmcm_phase_cntrSignal
ps_targetmmcm_phase_cntrSignal
ps_busymmcm_phase_cntrSignal
ps_start0mmcm_phase_cntrSignal
ps_startmmcm_phase_cntrSignal
diffmmcm_phase_cntrSignal
reset_extendedmmcm_phase_cntrSignal
CLKIN_PERIODpll_baseParameter
BANDWIDTHpll_baseParameter
CLKFBOUT_MULTpll_baseParameter
CLKFBOUT_PHASEpll_baseParameter
CLKOUT0_PHASEpll_baseParameter
CLKOUT1_PHASEpll_baseParameter
CLKOUT2_PHASEpll_baseParameter
CLKOUT3_PHASEpll_baseParameter
CLKOUT4_PHASEpll_baseParameter
CLKOUT5_PHASEpll_baseParameter
CLKOUT0_DUTY_CYCLEpll_baseParameter
CLKOUT1_DUTY_CYCLEpll_baseParameter
CLKOUT2_DUTY_CYCLEpll_baseParameter
CLKOUT3_DUTY_CYCLEpll_baseParameter
CLKOUT4_DUTY_CYCLEpll_baseParameter
CLKOUT5_DUTY_CYCLEpll_baseParameter
CLKOUT0_DIVIDEpll_baseParameter
CLKOUT1_DIVIDEpll_baseParameter
CLKOUT2_DIVIDEpll_baseParameter
CLKOUT3_DIVIDEpll_baseParameter
CLKOUT4_DIVIDEpll_baseParameter
CLKOUT5_DIVIDEpll_baseParameter
DIVCLK_DIVIDEpll_baseParameter
REF_JITTER1pll_baseParameter
STARTUP_WAITpll_baseParameter
clkinpll_baseInput
clkfbinpll_baseInput
rstpll_baseInput
pwrdwnpll_baseInput
clkout0pll_baseOutput
clkout1pll_baseOutput
clkout2pll_baseOutput
clkout3pll_baseOutput
clkout4pll_baseOutput
clkout5pll_baseOutput
clkfboutpll_baseOutput
lockedpll_baseOutput
SENS_PHASE_WIDTHsens_hispi_clock
SENS_BANDWIDTHsens_hispi_clock
CLKIN_PERIOD_SENSORsens_hispi_clock
CLKFBOUT_MULT_SENSORsens_hispi_clock
CLKFBOUT_PHASE_SENSORsens_hispi_clock
IPCLK_PHASEsens_hispi_clock
IPCLK2X_PHASEsens_hispi_clock
BUF_IPCLKsens_hispi_clock
BUF_IPCLK2Xsens_hispi_clock
SENS_DIVCLK_DIVIDEsens_hispi_clock
SENS_REF_JITTER1sens_hispi_clock
SENS_REF_JITTER2sens_hispi_clock
SENS_SS_ENsens_hispi_clock
SENS_SS_MODEsens_hispi_clock
SENS_SS_MOD_PERIODsens_hispi_clock
IODELAY_GRPsens_hispi_clock
IDELAY_VALUEsens_hispi_clock
REFCLK_FREQUENCYsens_hispi_clock
HIGH_PERFORMANCE_MODEsens_hispi_clock
HISPI_DELAY_CLKsens_hispi_clock
HISPI_MMCMsens_hispi_clock
HISPI_CAPACITANCEsens_hispi_clock
HISPI_DIFF_TERMsens_hispi_clock
HISPI_UNTUNED_SPLITsens_hispi_clock
HISPI_DQS_BIASsens_hispi_clock
HISPI_IBUF_DELAY_VALUEsens_hispi_clock
HISPI_IBUF_LOW_PWRsens_hispi_clock
HISPI_IFD_DELAY_VALUEsens_hispi_clock
HISPI_IOSTANDARDsens_hispi_clock
mclksens_hispi_clock
mrstsens_hispi_clock
phasesens_hispi_clock
set_phasesens_hispi_clock
loadsens_hispi_clock
rst_mmcmsens_hispi_clock
clp_psens_hispi_clock
clk_nsens_hispi_clock
ipclksens_hispi_clock
ipclk2xsens_hispi_clock
ps_rdysens_hispi_clock
ps_outsens_hispi_clock
locked_pxd_mmcmsens_hispi_clock
clkin_pxd_stopped_mmcmsens_hispi_clock
clkfb_pxd_stopped_mmcmsens_hispi_clock
ipclk_presens_hispi_clock
ipclk2x_presens_hispi_clock
clk_fbsens_hispi_clock
prstsens_hispi_clock
clk_insens_hispi_clock
clk_intsens_hispi_clock
set_phase_wsens_hispi_clock
phase_wsens_hispi_clock
ps_rdy_wsens_hispi_clock
ps_out_wsens_hispi_clock
ALWAYS_552 psclkmmcm_phase_cntrAlways Construct
ALWAYS_553 psclkmmcm_phase_cntrAlways Construct
BUFGsens_hispi_clock
BUFGsens_hispi_clock
BUFHsens_hispi_clock
BUFHsens_hispi_clock
BUFIOsens_hispi_clock
BUFIOsens_hispi_clock
BUFMRsens_hispi_clock
BUFMRsens_hispi_clock
BUFRsens_hispi_clock
BUFRsens_hispi_clock
GENERATE [106]sens_hispi_clock
GENERATE [137]sens_hispi_clock
GENERATE [161]sens_hispi_clock
GENERATE [251]sens_hispi_clock
GENERATE [261]sens_hispi_clock
ibufds_ibufgds_50.IBUFDSibufds_ibufgds_50Module Instance
ibufds_ibufgds.IBUFDSibufds_ibufgdsModule Instance
ibufds_ibufgdssens_hispi_clock
ibufds_ibufgds_50sens_hispi_clock
idelay_nofinesens_hispi_clock
IDELAYE2idelay_nofineModule Instance
mmcm_phase_cntrsens_hispi_clock
MMCME2_ADVmmcm_phase_cntrModule Instance
pll_basesens_hispi_clock
PLLE2_ADVpll_baseModule Instance