x393  1.0
FPGAcodeforElphelNC393camera
oddr_ss Module Reference
Inheritance diagram for oddr_ss:
Collaboration diagram for oddr_ss:

Public Attributes

Inputs

clk  
ce  
rst  
set  
din   [ 1 : 0 ]
tin  

Outputs

dq  

Parameters

IOSTANDARD  "DEFAULT"
SLEW  "SLOW"
DDR_CLK_EDGE  "OPPOSITE_EDGE"
INIT   1 'b0
SRTYPE  "SYNC"

Signals

wire  idq

Module Instances

ODDR::ODDR_i   Module ODDR
OBUFT::iobufs_i   Module OBUFT

Detailed Description

Definition at line 41 of file oddr_ss.v.

Member Data Documentation

IOSTANDARD "DEFAULT"
Parameter

Definition at line 42 of file oddr_ss.v.

SLEW "SLOW"
Parameter

Definition at line 43 of file oddr_ss.v.

DDR_CLK_EDGE "OPPOSITE_EDGE"
Parameter

Definition at line 44 of file oddr_ss.v.

INIT 1 'b0
Parameter

Definition at line 45 of file oddr_ss.v.

SRTYPE "SYNC"
Parameter

Definition at line 46 of file oddr_ss.v.

clk
Input

Definition at line 48 of file oddr_ss.v.

ce
Input

Definition at line 49 of file oddr_ss.v.

rst
Input

Definition at line 50 of file oddr_ss.v.

set
Input

Definition at line 51 of file oddr_ss.v.

din [ 1 : 0 ]
Input

Definition at line 52 of file oddr_ss.v.

tin
Input

Definition at line 53 of file oddr_ss.v.

dq
Output

Definition at line 54 of file oddr_ss.v.

idq
Signal

Definition at line 56 of file oddr_ss.v.

OBUFT iobufs_i
Module Instance

Definition at line 70 of file oddr_ss.v.

ODDR ODDR_i
Module Instance

Definition at line 57 of file oddr_ss.v.


The documentation for this Module was generated from the following files: