x393  1.0
FPGAcodeforElphelNC393camera
Static Public Member Functions | Public Attributes | List of all members
imu_spi393 Module Reference
Inheritance diagram for imu_spi393:
Inheritance graph
[legend]

Static Public Member Functions

Always Constructs

ALWAYS_214  ( mclk )
ALWAYS_215  ( xclk )
ALWAYS_216  ( xclk )
ALWAYS_217  ( xclk )
ALWAYS_218  ( xclk )
ALWAYS_219  ( xclk )
ALWAYS_220  ( xclk )
ALWAYS_221  ( mclk )
ALWAYS_222  ( xclk )

Public Attributes

Inputs

mclk  
xclk  
we_ra  
we_div  
we_period  
wa   [ 4 : 0 ]
din   [ 31 : 0 ]
miso  
config_debug   [ 3 : 0 ]
rd_stb  

Outputs

mosi  
sda  
sda_en  
scl  
scl_en  
ts  
rdy  
rdata   [ 15 : 0 ]

Signals

reg[ 7 : 0 ]  bit_duration_mclk
reg[ 7 : 0 ]  bit_duration
reg[ 7 : 0 ]  bit_duration_cntr
reg  bit_duration_zero
reg[ 3 : 0 ]  clk_en
reg[ 1 : 0 ]  clk_div
reg[ 4 : 0 ]  imu_in_word
reg  pre_imu_wr_buf
reg  imu_wr_buf
wire[ 15 : 0 ]  imu_in_buf
reg[ 4 : 0 ]  reg_seq_number
wire[ 6 : 1 ]  imu_reg_number
reg[ 1 : 0 ]  seq_state
reg[ 9 : 0 ]  seq_counter
reg  end_spi
reg  end_prepare
reg  set_mosi_prepare
reg  set_mosi_spi
reg  seq_counter_zero
reg  pre_seq_counter_zero
reg[ 15 : 0 ]  mosi_reg
reg[ 1 : 0 ]  sda_r
reg[ 1 : 0 ]  scl_r
reg  shift_miso
reg[ 15 : 0 ]  miso_reg
reg  last_bit
reg  last_bit_ext
reg  last_buf_wr
reg[ 4 : 0 ]  raddr
reg  rdy_r
reg  imu_start
reg  ts_r
reg[ 31 : 0 ]  period
reg  imu_enabled_mclk
reg[ 1 : 0 ]  imu_enabled
reg  imu_run_mclk
reg[ 1 : 0 ]  imu_run
reg  imu_when_ready_mclk
reg[ 1 : 0 ]  imu_when_ready
reg  imu_run_confirmed
reg  imu_start_mclk
reg[ 1 : 0 ]  imu_start_grant
reg  imu_start_first
reg  imu_start_first_was
reg[ 31 : 0 ]  period_counter
wire  en
reg[ 4 : 01 ]  we_timer
reg  first_prepare
reg[ 1 : 0 ]  first_prepare_d
wire  config_long_sda_en
wire  config_late_clk
reg[ 7 : 0 ]  stall_dur_mclk
reg[ 7 : 0 ]  stall_dur
reg  stall
reg[ 7 : 0 ]  stall_cntr
reg  set_stall
reg  skip_stall
wire  shift_mosi
reg  imu_ready_reset
reg[ 6 : 0 ]  imu_ready_denoise_count
reg[ 2 : 0 ]  imu_data_ready_d
reg[ 5 : 0 ]  imu_data_ready
reg[ 1 : 0 ]  seq_state_zero
reg  pre_scl
reg[ 2 : 0 ]  sngl_wire_stb
reg[ 1 : 0 ]  sngl_wire_r
wire  sngl_wire
wire  config_single_wire
reg[ 5 : 0 ]  registers2log_ram [ 0 : 31 ]
reg[ 15 : 0 ]  odbuf0_ram [ 0 : 31 ]

Detailed Description

Definition at line 41 of file imu_spi393.v.

Member Function Documentation

ALWAYS_214 (   mclk  
)
Always Construct

Definition at line 179 of file imu_spi393.v.

ALWAYS_215 (   xclk  
)
Always Construct

Definition at line 196 of file imu_spi393.v.

ALWAYS_216 (   xclk  
)
Always Construct

Definition at line 222 of file imu_spi393.v.

ALWAYS_217 (   xclk  
)
Always Construct

Definition at line 243 of file imu_spi393.v.

ALWAYS_218 (   xclk  
)
Always Construct

Definition at line 255 of file imu_spi393.v.

ALWAYS_219 (   xclk  
)
Always Construct

Definition at line 345 of file imu_spi393.v.

ALWAYS_220 (   xclk  
)
Always Construct

Definition at line 349 of file imu_spi393.v.

ALWAYS_221 (   mclk  
)
Always Construct

Definition at line 374 of file imu_spi393.v.

ALWAYS_222 (   xclk  
)
Always Construct

Definition at line 389 of file imu_spi393.v.

Member Data Documentation

mclk
Input

Definition at line 43 of file imu_spi393.v.

xclk
Input

Definition at line 44 of file imu_spi393.v.

we_ra
Input

Definition at line 46 of file imu_spi393.v.

we_div
Input

Definition at line 47 of file imu_spi393.v.

we_period
Input

Definition at line 48 of file imu_spi393.v.

wa [ 4 : 0 ]
Input

Definition at line 49 of file imu_spi393.v.

din [ 31 : 0 ]
Input

Definition at line 50 of file imu_spi393.v.

mosi
Output

Definition at line 51 of file imu_spi393.v.

miso
Input

Definition at line 52 of file imu_spi393.v.

config_debug [ 3 : 0 ]
Input

Definition at line 53 of file imu_spi393.v.

sda
Output

Definition at line 54 of file imu_spi393.v.

sda_en
Output

Definition at line 55 of file imu_spi393.v.

scl
Output

Definition at line 56 of file imu_spi393.v.

scl_en
Output

Definition at line 57 of file imu_spi393.v.

ts
Output

Definition at line 58 of file imu_spi393.v.

rdy
Output

Definition at line 59 of file imu_spi393.v.

rd_stb
Input

Definition at line 60 of file imu_spi393.v.

rdata [ 15 : 0 ]
Output

Definition at line 61 of file imu_spi393.v.

bit_duration_mclk
Signal

Definition at line 84 of file imu_spi393.v.

bit_duration
Signal

Definition at line 85 of file imu_spi393.v.

bit_duration_cntr
Signal

Definition at line 86 of file imu_spi393.v.

bit_duration_zero
Signal

Definition at line 87 of file imu_spi393.v.

clk_en
Signal

Definition at line 89 of file imu_spi393.v.

clk_div
Signal

Definition at line 90 of file imu_spi393.v.

imu_in_word
Signal

Definition at line 91 of file imu_spi393.v.

pre_imu_wr_buf
Signal

Definition at line 92 of file imu_spi393.v.

imu_wr_buf
Signal

Definition at line 92 of file imu_spi393.v.

imu_in_buf
Signal

Definition at line 93 of file imu_spi393.v.

reg_seq_number
Signal

Definition at line 95 of file imu_spi393.v.

imu_reg_number
Signal

Definition at line 96 of file imu_spi393.v.

seq_state
Signal

Definition at line 98 of file imu_spi393.v.

seq_counter
Signal

Definition at line 99 of file imu_spi393.v.

end_spi
Signal

Definition at line 100 of file imu_spi393.v.

end_prepare
Signal

Definition at line 100 of file imu_spi393.v.

set_mosi_prepare
Signal

Definition at line 101 of file imu_spi393.v.

set_mosi_spi
Signal

Definition at line 101 of file imu_spi393.v.

seq_counter_zero
Signal

Definition at line 102 of file imu_spi393.v.

pre_seq_counter_zero
Signal

Definition at line 102 of file imu_spi393.v.

mosi_reg
Signal

Definition at line 103 of file imu_spi393.v.

sda_r
Signal

Definition at line 105 of file imu_spi393.v.

scl_r
Signal

Definition at line 106 of file imu_spi393.v.

shift_miso
Signal

Definition at line 108 of file imu_spi393.v.

miso_reg
Signal

Definition at line 109 of file imu_spi393.v.

last_bit
Signal

Definition at line 110 of file imu_spi393.v.

last_bit_ext
Signal

Definition at line 111 of file imu_spi393.v.

last_buf_wr
Signal

Definition at line 112 of file imu_spi393.v.

raddr
Signal

Definition at line 113 of file imu_spi393.v.

rdy_r
Signal

Definition at line 114 of file imu_spi393.v.

imu_start
Signal

Definition at line 115 of file imu_spi393.v.

ts_r
Signal

Definition at line 116 of file imu_spi393.v.

period
Signal

Definition at line 118 of file imu_spi393.v.

imu_enabled_mclk
Signal

Definition at line 121 of file imu_spi393.v.

imu_enabled
Signal

Definition at line 122 of file imu_spi393.v.

imu_run_mclk
Signal

Definition at line 123 of file imu_spi393.v.

imu_run
Signal

Definition at line 124 of file imu_spi393.v.

imu_when_ready_mclk
Signal

Definition at line 125 of file imu_spi393.v.

imu_when_ready
Signal

Definition at line 126 of file imu_spi393.v.

imu_run_confirmed
Signal

Definition at line 128 of file imu_spi393.v.

imu_start_mclk
Signal

Definition at line 129 of file imu_spi393.v.

imu_start_grant
Signal

Definition at line 130 of file imu_spi393.v.

imu_start_first
Signal

Definition at line 131 of file imu_spi393.v.

imu_start_first_was
Signal

Definition at line 132 of file imu_spi393.v.

period_counter
Signal

Definition at line 133 of file imu_spi393.v.

en
Signal

Definition at line 134 of file imu_spi393.v.

we_timer
Signal

Definition at line 135 of file imu_spi393.v.

first_prepare
Signal

Definition at line 136 of file imu_spi393.v.

first_prepare_d
Signal

Definition at line 137 of file imu_spi393.v.

config_long_sda_en
Signal

Definition at line 138 of file imu_spi393.v.

config_late_clk
Signal

Definition at line 139 of file imu_spi393.v.

stall_dur_mclk
Signal

Definition at line 140 of file imu_spi393.v.

stall_dur
Signal

Definition at line 141 of file imu_spi393.v.

stall
Signal

Definition at line 142 of file imu_spi393.v.

stall_cntr
Signal

Definition at line 143 of file imu_spi393.v.

set_stall
Signal

Definition at line 144 of file imu_spi393.v.

skip_stall
Signal

Definition at line 145 of file imu_spi393.v.

shift_mosi
Signal

Definition at line 146 of file imu_spi393.v.

imu_ready_reset
Signal

Definition at line 148 of file imu_spi393.v.

imu_ready_denoise_count
Signal

Definition at line 149 of file imu_spi393.v.

imu_data_ready_d
Signal

Definition at line 150 of file imu_spi393.v.

imu_data_ready
Signal

Definition at line 151 of file imu_spi393.v.

seq_state_zero
Signal

Definition at line 152 of file imu_spi393.v.

pre_scl
Signal

Definition at line 154 of file imu_spi393.v.

sngl_wire_stb
Signal

Definition at line 155 of file imu_spi393.v.

sngl_wire_r
Signal

Definition at line 156 of file imu_spi393.v.

sngl_wire
Signal

Definition at line 157 of file imu_spi393.v.

config_single_wire
Signal

Definition at line 158 of file imu_spi393.v.

registers2log_ram [ 0 : 31 ]
Signal

Definition at line 373 of file imu_spi393.v.

odbuf0_ram [ 0 : 31 ]
Signal

Definition at line 388 of file imu_spi393.v.

The documentation for this Module was generated from the following files: