Static Public Member Functions

Always Constructs
ALWAYS_197	( clk )

Public Attributes

Inputs
clk
rst
en
d10_32_76_54	*[ 2 WIDTH - 1 : 0 ]**
start

Outputs
dout	[OUT_WIDTH - 1 : 0 ]
pre2_start_out	reg
en_out	reg

Parameters
WIDTH	24
OUT_WIDTH	16
B_WIDTH	18
A_WIDTH	25
P_WIDTH	48
ROUND_OUT	8
COSINE_SHIFT	17
COS_1_16	128553
COS_2_16	121095
COS_3_16	108982
COS_4_16	92682
COS_5_16	72820
COS_6_16	50159
COS_7_16	25570
TOTAL_RSHIFT	COSINE_SHIFT + ROUND_OUT
BEFORE_SAT_WIDTH	P_WIDTH - TOTAL_RSHIFT
TRIM_MSB	BEFORE_SAT_WIDTH - OUT_WIDTH

GENERATE
GENERATE [287]

Signals
reg[B_WIDTH - 1 : 0 ]	dsp_ma_bin
wire	dsp_ma_ceb1_1
wire	dsp_ma_ceb2_1
wire	dsp_ma_selb_1
wire[A_WIDTH - 1 : 0 ]	dsp_ma_ain_1
wire	dsp_ma_cea1_1
wire	dsp_ma_cea2_1
wire[A_WIDTH - 1 : 0 ]	dsp_ma_din_1
wire	dsp_ma_ced_1
wire	dsp_ma_sela_1
wire	dsp_ma_en_a_1
wire	dsp_ma_en_d_1
wire	dsp_ma_sub_a_1
wire	dsp_ma_neg_m_1
wire	dsp_ma_accum_1
wire[P_WIDTH - 1 : 0 ]	dsp_ma_p_1
wire	dsp_ma_ceb1_2
wire	dsp_ma_ceb2_2
wire	dsp_ma_selb_2
wire[A_WIDTH - 1 : 0 ]	dsp_ma_ain_2
wire	dsp_ma_cea1_2
wire	dsp_ma_cea2_2
wire[A_WIDTH - 1 : 0 ]	dsp_ma_din_2
wire	dsp_ma_ced_2
wire	dsp_ma_sela_2
wire	dsp_ma_seld_2
wire	dsp_ma_neg_m_2
wire	dsp_ma_accum_2
wire[P_WIDTH - 1 : 0 ]	dsp_ma_p_2
wire[P_WIDTH - 1 : 0 ]	dsp_ma_p_mux
wire[WIDTH - 1 : 0 ]	dsp_ma_ain24_1
wire[WIDTH - 1 : 0 ]	dsp_ma_din24_1
wire[WIDTH - 1 : 0 ]	dsp_ma_ain24_2
wire[WIDTH - 1 : 0 ]	dsp_ma_din24_2
wire[WIDTH - 1 : 0 ]	simd_a0
wire[WIDTH - 1 : 0 ]	simd_a1
wire[WIDTH - 1 : 0 ]	simd_a2
wire[WIDTH - 1 : 0 ]	simd_a3
wire[WIDTH - 1 : 0 ]	simd_a4
wire[WIDTH - 1 : 0 ]	simd_a5
wire[WIDTH - 1 : 0 ]	simd_b0
wire[WIDTH - 1 : 0 ]	simd_b1
wire[WIDTH - 1 : 0 ]	simd_b2
wire[WIDTH - 1 : 0 ]	simd_b3
wire[WIDTH - 1 : 0 ]	simd_b4
wire[WIDTH - 1 : 0 ]	simd_b5
wire[WIDTH - 1 : 0 ]	simd_p0
wire[WIDTH - 1 : 0 ]	simd_p1
wire[WIDTH - 1 : 0 ]	simd_p2
wire[WIDTH - 1 : 0 ]	simd_p3
wire[WIDTH - 1 : 0 ]	simd_p4
wire[WIDTH - 1 : 0 ]	simd_p5
wire	simd_cea01
wire	simd_cea23
wire	simd_cea45
wire	simd_ceb01
wire	simd_ceb23
wire	simd_ceb45
wire	simd_sub01
wire	simd_sub23
wire	simd_sub45
wire	simd_cep01
wire	simd_cep23
wire	simd_cep45
reg[ 7 : 0 ]	phase
reg[ 2 : 0 ]	phase_cnt
reg[OUT_WIDTH - 1 : 0 ]	dout_r
wire	dout_round_c
wire[BEFORE_SAT_WIDTH - 1 : 0 ]	dout_round_w
reg[BEFORE_SAT_WIDTH - 1 : 0 ]	dout_round_r
wire[OUT_WIDTH - 1 : 0 ]	dout_sat_w
wire[BEFORE_SAT_WIDTH - 1 : 0 ]	dout_round
reg[ 2 : 0 ]	per_type
reg	pre3_start_out
reg	pre_en_out

Module Instances
dsp_addsub_simd::dsp_addsub_simd1_i	Module dsp_addsub_simd
dsp_addsub_simd::dsp_addsub_simd2_i	Module dsp_addsub_simd
dsp_addsub_simd::dsp_addsub_simd3_i	Module dsp_addsub_simd
dsp_ma_preadd::dsp_ma1_i	Module dsp_ma_preadd
dsp_ma::dsp_ma2_i	Module dsp_ma