x393
1.0
FPGAcodeforElphelNC393camera
clocks393 Member List
This is the complete list of members for
clocks393
, including all inherited members.
CLKIN_PERIOD
dual_clock_source
Parameter
DIVCLK_DIVIDE
dual_clock_source
Parameter
CLKFBOUT_MULT
dual_clock_source
Parameter
CLKOUT_DIV_CLK1X
dual_clock_source
Parameter
CLKOUT_DIV_CLK2X
dual_clock_source
Parameter
PHASE_CLK2X
dual_clock_source
Parameter
BUF_CLK1X
dual_clock_source
Parameter
BUF_CLK2X
dual_clock_source
Parameter
rst
dual_clock_source
Input
clk_in
dual_clock_source
Input
pwrdwn
dual_clock_source
Input
clk1x
dual_clock_source
Output
clk2x
dual_clock_source
Output
locked
dual_clock_source
Output
clkfb
dual_clock_source
Signal
clk1x_pre
dual_clock_source
Signal
clk2x_pre
dual_clock_source
Signal
STATUS_REG_ADDR
status_generate
Parameter
PAYLOAD_BITS
status_generate
Parameter
REGISTER_STATUS
status_generate
Parameter
EXTRA_WORDS
status_generate
Parameter
EXTRA_REG_ADDR
status_generate
Parameter
rst
status_generate
Input
clk
status_generate
Input
srst
status_generate
Input
we
status_generate
Input
wd
status_generate
Input
status
status_generate
Input
ad
status_generate
Output
rq
status_generate
Output
start
status_generate
Input
STATUS_BITS
status_generate
Parameter
ALL_BITS
status_generate
Parameter
CAPACITANCE
ibuf_ibufg
Parameter
IBUF_DELAY_VALUE
ibuf_ibufg
Parameter
IBUF_LOW_PWR
ibuf_ibufg
Parameter
IFD_DELAY_VALUE
ibuf_ibufg
Parameter
IOSTANDARD
ibuf_ibufg
Parameter
O
ibuf_ibufg
Output
I
ibuf_ibufg
Input
CAPACITANCE
ibufds_ibufgds
Parameter
DIFF_TERM
ibufds_ibufgds
Parameter
DQS_BIAS
ibufds_ibufgds
Parameter
IBUF_DELAY_VALUE
ibufds_ibufgds
Parameter
IBUF_LOW_PWR
ibufds_ibufgds
Parameter
IFD_DELAY_VALUE
ibufds_ibufgds
Parameter
IOSTANDARD
ibufds_ibufgds
Parameter
O
ibufds_ibufgds
Output
I
ibufds_ibufgds
Input
IB
ibufds_ibufgds
Input
CLK_ADDR
clocks393
CLK_MASK
clocks393
CLK_STATUS_REG_ADDR
clocks393
CLK_CNTRL
clocks393
CLK_STATUS
clocks393
CLK_RESET
clocks393
CLK_PWDWN
clocks393
CLKIN_PERIOD_AXIHP
clocks393
DIVCLK_DIVIDE_AXIHP
clocks393
CLKFBOUT_MULT_AXIHP
clocks393
CLKOUT_DIV_AXIHP
clocks393
BUF_CLK1X_AXIHP
clocks393
CLKIN_PERIOD_PCLK
clocks393
DIVCLK_DIVIDE_PCLK
clocks393
CLKFBOUT_MULT_PCLK
clocks393
CLKOUT_DIV_PCLK
clocks393
BUF_CLK1X_PCLK
clocks393
CLKIN_PERIOD_XCLK
clocks393
DIVCLK_DIVIDE_XCLK
clocks393
CLKFBOUT_MULT_XCLK
clocks393
CLKOUT_DIV_XCLK
clocks393
BUF_CLK1X_XCLK
clocks393
CLKIN_PERIOD_SYNC
clocks393
DIVCLK_DIVIDE_SYNC
clocks393
CLKFBOUT_MULT_SYNC
clocks393
CLKOUT_DIV_SYNC
clocks393
BUF_CLK1X_SYNC
clocks393
MEMCLK_CAPACITANCE
clocks393
MEMCLK_IBUF_LOW_PWR
clocks393
MEMCLK_IOSTANDARD
clocks393
FFCLK0_CAPACITANCE
clocks393
FFCLK0_DIFF_TERM
clocks393
FFCLK0_IBUF_LOW_PWR
clocks393
FFCLK0_IOSTANDARD
clocks393
FFCLK1_CAPACITANCE
clocks393
FFCLK1_DIFF_TERM
clocks393
FFCLK1_IBUF_LOW_PWR
clocks393
FFCLK1_IOSTANDARD
clocks393
async_rst
clocks393
mclk
clocks393
mrst
clocks393
cmd_ad
clocks393
cmd_stb
clocks393
status_ad
clocks393
status_rq
clocks393
status_start
clocks393
fclk
clocks393
memclk_pad
clocks393
ffclk0p_pad
clocks393
ffclk0n_pad
clocks393
ffclk1p_pad
clocks393
ffclk1n_pad
clocks393
aclk
clocks393
hclk
clocks393
pclk
clocks393
xclk
clocks393
sync_clk
clocks393
time_ref
clocks393
extra_status
clocks393
locked_sync_clk
clocks393
locked_xclk
clocks393
locked_pclk
clocks393
locked_hclk
clocks393
memclk
clocks393
ffclk0
clocks393
ffclk1
clocks393
status_data
clocks393
cmd_data
clocks393
cmd_we
clocks393
cmd_a
clocks393
set_ctrl_w
clocks393
set_status_w
clocks393
locked
clocks393
reset_clk
clocks393
pwrdwn_clk
clocks393
test_clk
clocks393
memclk_rst
clocks393
ffclk0_rst
clocks393
ffclk1_rst
clocks393
time_ref_r
clocks393
ADDR
cmd_deser
Parameter
ADDR_MASK
cmd_deser
Parameter
NUM_CYCLES
cmd_deser
Parameter
ADDR_WIDTH
cmd_deser
Parameter
DATA_WIDTH
cmd_deser
Parameter
ADDR1
cmd_deser
Parameter
ADDR_MASK1
cmd_deser
Parameter
ADDR2
cmd_deser
Parameter
ADDR_MASK2
cmd_deser
Parameter
WE_EARLY
cmd_deser
Parameter
rst
cmd_deser
Input
clk
cmd_deser
Input
srst
cmd_deser
Input
ad
cmd_deser
Input
stb
cmd_deser
Input
addr
cmd_deser
Output
data
cmd_deser
Output
we
cmd_deser
Output
WE_WIDTH
cmd_deser
Parameter
ALWAYS_466
mclk
clocks393
Always Construct
ALWAYS_467
memclk or memclk_rst
clocks393
Always Construct
ALWAYS_468
ffclk0 or ffclk0_rst
clocks393
Always Construct
ALWAYS_469
ffclk1 or ffclk1_rst
clocks393
Always Construct
ALWAYS_470
mclk
clocks393
Always Construct
BUFG
clocks393
BUFH
dual_clock_source
Module Instance
BUFH
dual_clock_source
Module Instance
BUFIO
dual_clock_source
Module Instance
BUFIO
dual_clock_source
Module Instance
BUFMR
dual_clock_source
Module Instance
BUFMR
dual_clock_source
Module Instance
BUFR
dual_clock_source
Module Instance
BUFR
dual_clock_source
Module Instance
cmd_deser
clocks393
cmd_deser_dual
cmd_deser
Module Instance
cmd_deser_multi
cmd_deser
Module Instance
cmd_deser_single
cmd_deser
Module Instance
dual_clock_source
clocks393
dual_clock_source
clocks393
dual_clock_source
clocks393
dual_clock_source
clocks393
GENERATE [61]
dual_clock_source
GENERATE
GENERATE [63]
cmd_deser
GENERATE
GENERATE [68]
status_generate
GENERATE
GENERATE [70]
dual_clock_source
GENERATE
IBUF
ibuf_ibufg
Module Instance
ibuf_ibufg
clocks393
IBUFDS
ibufds_ibufgds
Module Instance
ibufds_ibufgds
clocks393
ibufds_ibufgds
clocks393
pll_base
dual_clock_source
Module Instance
status_generate
clocks393
status_generate_extra
status_generate
Module Instance
status_generate_only
status_generate
Module Instance
Generated by
1.8.12