axibram_read Module Reference

Inheritance diagram for axibram_read:

Collaboration diagram for axibram_read:

Static Public Member Functions

Always Constructs
ALWAYS_0	( aclk )
ALWAYS_1	( aclk )

Public Attributes

Inputs
aclk
arst
araddr	[ 31 : 0 ]
arvalid
arid	[ 11 : 0 ]
arlen	[ 3 : 0 ]
arsize	[ 1 : 0 ]
arburst	[ 1 : 0 ]
rready
dev_ready
bram_rdata	[ 31 : 0 ]

Outputs
arready
rdata	[ 31 : 0 ]
rvalid	reg
rid	reg [ 11 : 0 ]
rlast	reg
rresp	[ 1 : 0 ]
pre_araddr	[ADDRESS_BITS - 1 : 0 ]
start_burst
bram_rclk
bram_raddr	[ADDRESS_BITS - 1 : 0 ]
bram_ren
bram_regen

Parameters
ADDRESS_BITS	10

Signals
wire	ar_nempty
wire	ar_half_full
wire[ 1 : 0 ]	arburst_out
wire[ 1 : 0 ]	arsize_out
wire[ 3 : 0 ]	arlen_out
wire[ADDRESS_BITS - 1 : 0 ]	araddr_out
wire[ 11 : 0 ]	arid_out
reg	read_in_progress
reg	read_in_progress_d
reg	read_in_progress_or
reg[ADDRESS_BITS - 1 : 0 ]	read_address
reg[ 3 : 0 ]	read_left
reg[ 1 : 0 ]	rburst
reg[ 3 : 0 ]	rlen
wire[ADDRESS_BITS - 1 : 0 ]	next_rd_address_w
wire	start_read_burst_w
wire	bram_reg_re_w
wire	read_in_progress_w
wire	read_in_progress_d_w
wire	last_in_burst_w
wire	last_in_burst_d_w
reg	pre_last_in_burst_r
wire	pre_rvalid_w
wire	pre_left_zero_w
reg	bram_reg_re_0
reg	last_in_burst_1
reg	last_in_burst_0
reg	start_read_burst_0
reg	start_read_burst_1
reg[ 11 : 0 ]	pre_rid0
reg[ 11 : 0 ]	pre_rid
reg	bram_regen_r

Module Instances
fifo_same_clock::raddr_i	Module fifo_same_clock

Detailed Description

Definition at line 42 of file axibram_read.v.

Member Function Documentation

ALWAYS_0 (   aclk   )

Always Construct

Definition at line 160 of file axibram_read.v.

ALWAYS_1 (   aclk   )

Always Construct

Definition at line 209 of file axibram_read.v.

Member Data Documentation

ADDRESS_BITS 10

Parameter

Definition at line 43 of file axibram_read.v.

rdata [ 31 : 0 ]

Output

Definition at line 57 of file axibram_read.v.

rvalid reg

Output

Definition at line 58 of file axibram_read.v.

rready

Input

Definition at line 59 of file axibram_read.v.

rid reg [ 11 : 0 ]

Output

Definition at line 60 of file axibram_read.v.

rlast reg

Output

Definition at line 61 of file axibram_read.v.

rresp [ 1 : 0 ]

Output

Definition at line 62 of file axibram_read.v.

pre_araddr [ADDRESS_BITS - 1 : 0 ]

Output

Definition at line 64 of file axibram_read.v.

start_burst

Output

Definition at line 65 of file axibram_read.v.

dev_ready

Input

Definition at line 66 of file axibram_read.v.

bram_rclk

Output

Definition at line 69 of file axibram_read.v.

aclk

Input

Definition at line 45 of file axibram_read.v.

bram_raddr [ADDRESS_BITS - 1 : 0 ]

Output

Definition at line 70 of file axibram_read.v.

bram_ren

Output

Definition at line 71 of file axibram_read.v.

bram_regen

Output

Definition at line 72 of file axibram_read.v.

bram_rdata [ 31 : 0 ]

Input

Definition at line 73 of file axibram_read.v.

ar_nempty

Signal

Definition at line 77 of file axibram_read.v.

ar_half_full

Signal

Definition at line 78 of file axibram_read.v.

arburst_out

Signal

Definition at line 80 of file axibram_read.v.

arsize_out

Signal

Definition at line 82 of file axibram_read.v.

arlen_out

Signal

Definition at line 83 of file axibram_read.v.

araddr_out

Signal

Definition at line 84 of file axibram_read.v.

arst

Input

Definition at line 47 of file axibram_read.v.

arid_out

Signal

Definition at line 85 of file axibram_read.v.

read_in_progress

Signal

Definition at line 87 of file axibram_read.v.

read_in_progress_d

Signal

Definition at line 88 of file axibram_read.v.

read_in_progress_or

Signal

Definition at line 89 of file axibram_read.v.

read_address

Signal

Definition at line 91 of file axibram_read.v.

read_left

Signal

Definition at line 92 of file axibram_read.v.

rburst

Signal

Definition at line 94 of file axibram_read.v.

rlen

Signal

Definition at line 95 of file axibram_read.v.

next_rd_address_w

Signal

Definition at line 96 of file axibram_read.v.

start_read_burst_w

Signal

Definition at line 101 of file axibram_read.v.

araddr [ 31 : 0 ]

Input

Definition at line 49 of file axibram_read.v.

bram_reg_re_w

Signal

Definition at line 103 of file axibram_read.v.

read_in_progress_w

Signal

Definition at line 104 of file axibram_read.v.

read_in_progress_d_w

Signal

Definition at line 105 of file axibram_read.v.

last_in_burst_w

Signal

Definition at line 106 of file axibram_read.v.

last_in_burst_d_w

Signal

Definition at line 107 of file axibram_read.v.

pre_last_in_burst_r

Signal

Definition at line 108 of file axibram_read.v.

pre_rvalid_w

Signal

Definition at line 124 of file axibram_read.v.

pre_left_zero_w

Signal

Definition at line 127 of file axibram_read.v.

bram_reg_re_0

Signal

Definition at line 130 of file axibram_read.v.

last_in_burst_1

Signal

Definition at line 132 of file axibram_read.v.

arvalid

Input

Definition at line 50 of file axibram_read.v.

last_in_burst_0

Signal

Definition at line 134 of file axibram_read.v.

start_read_burst_0

Signal

Definition at line 136 of file axibram_read.v.

start_read_burst_1

Signal

Definition at line 138 of file axibram_read.v.

pre_rid0

Signal

Definition at line 139 of file axibram_read.v.

pre_rid

Signal

Definition at line 140 of file axibram_read.v.

bram_regen_r

Signal

Definition at line 151 of file axibram_read.v.

arready

Output

Definition at line 51 of file axibram_read.v.

arid [ 11 : 0 ]

Input

Definition at line 52 of file axibram_read.v.

arlen [ 3 : 0 ]

Input

Definition at line 53 of file axibram_read.v.

arsize [ 1 : 0 ]

Input

Definition at line 54 of file axibram_read.v.

arburst [ 1 : 0 ]

Input

Definition at line 55 of file axibram_read.v.

fifo_same_clock raddr_i

Module Instance

Definition at line 253 of file axibram_read.v.

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The documentation for this Module was generated from the following files:

• axi/axibram_read.v