x393  1.0
FPGAcodeforElphelNC393camera
fifo_same_clock Module Reference
Inheritance diagram for fifo_same_clock:

Static Public Member Functions

Always Constructs

ALWAYS_508  ( clk or rst )
ALWAYS_509  ( clk )

Public Attributes

Inputs

rst  
clk  
sync_rst  
we  
re  
data_in   [DATA_WIDTH - 1 : 0 ]

Outputs

data_out   [DATA_WIDTH - 1 : 0 ]
nempty  
half_full   reg

Parameters

DATA_WIDTH  integer 16
DATA_DEPTH  integer 4
DATA_2DEPTH  integer (1<<DATA_DEPTH)- 1

Signals

reg[DATA_DEPTH - 1 : 0 ]  fill
reg[DATA_WIDTH - 1 : 0 ]  inreg
reg[DATA_WIDTH - 1 : 0 ]  outreg
reg[DATA_DEPTH - 1 : 0 ]  ra
reg[DATA_DEPTH - 1 : 0 ]  wa
reg  wem
wire  rem
reg  out_full
reg[DATA_WIDTH - 1 : 0 ]  ram [ 0 :DATA_2DEPTH ]
reg  ram_nempty

Detailed Description

Definition at line 42 of file fifo_same_clock.v.

Member Function Documentation

ALWAYS_508 (   clk or rst  
)
Always Construct

Definition at line 85 of file fifo_same_clock.v.

ALWAYS_509 (   clk  
)
Always Construct

Definition at line 121 of file fifo_same_clock.v.

Member Data Documentation

DATA_WIDTH 16
Parameter

Definition at line 44 of file fifo_same_clock.v.

DATA_DEPTH 4
Parameter

Definition at line 45 of file fifo_same_clock.v.

rst
Input

Definition at line 48 of file fifo_same_clock.v.

clk
Input

Definition at line 49 of file fifo_same_clock.v.

sync_rst
Input

Definition at line 50 of file fifo_same_clock.v.

we
Input

Definition at line 51 of file fifo_same_clock.v.

re
Input

Definition at line 52 of file fifo_same_clock.v.

data_in [DATA_WIDTH - 1 : 0 ]
Input

Definition at line 53 of file fifo_same_clock.v.

data_out [DATA_WIDTH - 1 : 0 ]
Output

Definition at line 54 of file fifo_same_clock.v.

nempty
Output

Definition at line 55 of file fifo_same_clock.v.

half_full reg
Output

Definition at line 56 of file fifo_same_clock.v.

DATA_2DEPTH (1<<DATA_DEPTH)- 1
Parameter

Definition at line 60 of file fifo_same_clock.v.

fill
Signal

Definition at line 65 of file fifo_same_clock.v.

inreg
Signal

Definition at line 66 of file fifo_same_clock.v.

outreg
Signal

Definition at line 67 of file fifo_same_clock.v.

ra
Signal

Definition at line 68 of file fifo_same_clock.v.

wa
Signal

Definition at line 69 of file fifo_same_clock.v.

wem
Signal

Definition at line 71 of file fifo_same_clock.v.

rem
Signal

Definition at line 72 of file fifo_same_clock.v.

out_full
Signal

Definition at line 73 of file fifo_same_clock.v.

ram [ 0 :DATA_2DEPTH ]
Signal

Definition at line 74 of file fifo_same_clock.v.

ram_nempty
Signal

Definition at line 76 of file fifo_same_clock.v.


The documentation for this Module was generated from the following files: