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00064 #include <linux/module.h>
00065 #include <linux/sched.h>
00066 #include <linux/slab.h>
00067 #include <linux/errno.h>
00068 #include <linux/kernel.h>
00069 #include <linux/fs.h>
00070 #include <linux/string.h>
00071 #include <linux/init.h>
00072 #include <linux/autoconf.h>
00073
00074 #include <asm/system.h>
00075
00076 #include <asm/io.h>
00077
00078 #include <asm/irq.h>
00079
00080 #include <asm/delay.h>
00081 #include <asm/uaccess.h>
00082 #include <asm/elphel/driver_numbers.h>
00083 #include <asm/elphel/c313a.h>
00084
00085 #include "fpgactrl.h"
00086
00087 #include "x3x3.h"
00088
00089
00090
00091 #include "cci2c.h"
00092
00093 #define D(x)
00094
00095
00096
00097
00098
00099
00100
00101
00102
00103
00104
00105
00106 #define CLOCK_LOW_TIME 8
00107 #define CLOCK_HIGH_TIME 8
00108 #define START_CONDITION_HOLD_TIME 8
00109 #define STOP_CONDITION_HOLD_TIME 8
00110 #define ENABLE_OUTPUT 0x01
00111 #define ENABLE_INPUT 0x00
00112 #define I2C_CLOCK_HIGH 1
00113 #define I2C_CLOCK_LOW 0
00114 #define I2C_DATA_HIGH 1
00115 #define I2C_DATA_LOW 0
00116
00117
00118
00119
00120
00121
00122
00123
00124 #define i2c_delay(usecs) udelay(usecs)
00125 #define I2C_DELAY_SCALE 1
00126
00127
00128
00129
00130
00131
00132
00133
00135
00136
00137
00138
00139
00140
00141
00142
00143
00144
00145
00146 static struct i2c_timing_t bitdelays[X3X3_I2C_CHANNELS];
00147
00148
00149
00150
00151
00152
00153
00154
00155
00156
00157
00158
00159
00160 void i2c_disable(int n);
00161 void i2c_dir_out(int n);
00162 void i2c_dir_in (int n);
00163 void i2c_scl_0 (int n);
00164 void i2c_scl_1 (int n);
00165 void i2c_sda (int n, int d);
00166 int i2c_getbit (int n);
00167 int i2c_getscl(int n);
00168 int i2c_diagnose(int n);
00169 int i2c_start(int n);
00170 int i2c_restart(int n);
00171 int i2c_stop(int n);
00172 int i2c_outbyte(int n, unsigned char d);
00173 unsigned char i2c_inbyte(int n, int more);
00174 void i2c_sendack(int n, int ackn);
00175
00176 int i2c_delays (unsigned long delays) {
00177 unsigned long * bitdelays_long=(unsigned long *) bitdelays;
00178 if (delays !=0) bitdelays_long[0]=delays;
00179 return (int) bitdelays_long[0];
00180 }
00181
00182
00183
00184
00185
00186
00187
00188
00189
00190
00191
00192
00193
00194
00195
00196
00197
00199
00200
00201
00202
00203
00204
00205
00206
00207 #define SCL1_0 0x1
00208 #define SCL1_OFF 0x3
00209 #define SDA1_0 0x4
00210 #define SDA1_OFF 0xc
00211
00212 #ifdef PASSIVE_PULLUP
00213 #define SCL1_1 0x3 // same as off
00214 #define SDA1_1 0xc // same as off
00215 #else
00216 #define SCL1_1 0x2
00217 #define SDA1_1 0x8
00218 #endif
00219
00220
00221
00222
00223
00224
00225
00226
00227
00228
00229
00231 int i2c_getbit(int n) {
00232 if (bitdelays[n].filter_sda)
00233 return n? (((X313_PIOR(SDA1)) + (X313_PIOR(SDA1)) + (X313_PIOR(SDA1)) + (X313_PIOR(SDA1)) + (X313_PIOR(SDA1)) + (X313_PIOR(SDA1)) + (X313_PIOR(SDA1))) >> 2) :
00234 (((X313_SR(SDA0)) + (X313_SR(SDA0)) + (X313_SR(SDA0)) + (X313_SR(SDA0)) + (X313_SR(SDA0)) + (X313_SR(SDA0)) + (X313_SR(SDA0))) >> 2) ;
00235 else return n? X313_PIOR(SDA1) : X313_SR(SDA0);
00236 }
00237
00238 int i2c_getscl(int n) {
00239 if (bitdelays[n].filter_scl)
00240 return n? (((X313_PIOR(SCL1)) + (X313_PIOR(SCL1)) + (X313_PIOR(SCL1)) + (X313_PIOR(SCL1)) + (X313_PIOR(SCL1)) + (X313_PIOR(SCL1)) + (X313_PIOR(SCL1))) >> 2) :
00241 (((X313_SR(SCL0)) + (X313_SR(SCL0)) + (X313_SR(SCL0)) + (X313_SR(SCL0)) + (X313_SR(SCL0)) + (X313_SR(SCL0)) + (X313_SR(SCL0))) >> 2) ;
00242 else return n? X313_PIOR(SCL1) : X313_SR(SCL0);
00243 }
00244
00245
00246 void i2c_scl_0(int n) {
00247
00248 if (n) port_csp0_addr[X313_WA_IOPINS]=SCL1_0;
00249
00250 else port_csp0_addr[X313_I2C_CMD]=X3X3_I2C_SCL_0_BITS;
00251
00252 }
00253
00254
00255 void i2c_scl_1(int n) {
00256 if (n) port_csp0_addr[X313_WA_IOPINS]=SCL1_1;
00257
00258 else port_csp0_addr[X313_I2C_CMD]=X3X3_I2C_SCL_1_BITS;;
00259 }
00260
00261
00262 void i2c_sda_weak (int n, int d) {
00263 if (n) {
00264 if (d) port_csp0_addr[X313_WA_IOPINS]=SDA1_OFF;
00265 else port_csp0_addr[X313_WA_IOPINS]=SDA1_0;
00266 } else {
00267
00268
00269 if (d) port_csp0_addr[X313_I2C_CMD]=X3X3_I2C_SDA_Z_BITS;
00270 else port_csp0_addr[X313_I2C_CMD]=X3X3_I2C_SDA_0_BITS;
00271 }
00272 }
00273
00274 void i2c_sda_strong (int n, int d) {
00275 if (n) {
00276 if (d) port_csp0_addr[X313_WA_IOPINS]=SDA1_1;
00277 else port_csp0_addr[X313_WA_IOPINS]=SDA1_0;
00278 } else {
00279
00280
00281 if (d) port_csp0_addr[X313_I2C_CMD]=X3X3_I2C_SDA_1_BITS;
00282 else port_csp0_addr[X313_I2C_CMD]=X3X3_I2C_SDA_0_BITS;
00283 }
00284 }
00285
00286
00288 int i2c_start(int n) {
00289 int i;
00290 unsigned long flags;
00291 local_irq_save(flags);
00292
00293 D(printk("i2c_start: bus=%x\r\n", n));
00294
00295
00296 i2c_scl_1(n);
00297 i2c_sda_weak (n, 1);
00298 x3x3_DELAY(bitdelays[n].scl_high*I2C_DELAY_SCALE);
00299
00300 if (!i2c_getbit(n)) {
00301 for (i=0; i<9; i++) {
00302 i2c_scl_0(n);
00303 x3x3_DELAY(bitdelays[n].scl_low * I2C_DELAY_SCALE*8);
00304 i2c_scl_1(n);
00305 x3x3_DELAY(bitdelays[n].scl_high * I2C_DELAY_SCALE*8);
00306 if (!i2c_getbit(n)) break;
00307 }
00308 if (!i2c_getbit(n)) {
00309 local_irq_restore(flags);
00310 return ERR_I2C_SDA_ST0;
00311 }
00312 }
00313 i2c_sda_weak (n, 0);
00314 x3x3_DELAY(bitdelays[n].scl_low*I2C_DELAY_SCALE);
00315 i2c_scl_0(n);
00316 local_irq_restore(flags);
00317 return 0;
00318 }
00319
00320
00321 int i2c_stop(int n) {
00322 unsigned long flags;
00323 local_irq_save(flags);
00324
00325 D(printk("i2c_stop: bus=%x\r\n", n));
00326
00327 i2c_sda_weak (n, 0);
00328 x3x3_DELAY(bitdelays[n].slave2master*I2C_DELAY_SCALE);
00329 x3x3_DELAY(bitdelays[n].scl_low*I2C_DELAY_SCALE);
00330 i2c_scl_1(n);
00331 x3x3_DELAY(bitdelays[n].scl_high*I2C_DELAY_SCALE);
00332 i2c_sda_strong (n, 1);
00333 x3x3_DELAY(bitdelays[n].scl_high*I2C_DELAY_SCALE);
00334 i2c_sda_weak (n, 1);
00335 local_irq_restore(flags);
00336 return 0;
00337 }
00338
00339
00340 int i2c_restart(int n) {
00341 unsigned long flags;
00342 local_irq_save(flags);
00343
00344 D(printk("i2c_restart: bus=%x\r\n", n));
00345
00346 i2c_sda_weak (n, 1);
00347 x3x3_DELAY(bitdelays[n].slave2master*I2C_DELAY_SCALE);
00348 i2c_sda_strong (n, 1);
00349 x3x3_DELAY(bitdelays[n].scl_low*I2C_DELAY_SCALE);
00350 i2c_scl_1(n);
00351 i2c_sda_weak (n, 1);
00352 x3x3_DELAY(bitdelays[n].scl_high*I2C_DELAY_SCALE);
00353 i2c_sda_weak (n, 0);
00354 x3x3_DELAY(bitdelays[n].scl_low*I2C_DELAY_SCALE);
00355 i2c_scl_0(n);
00356 local_irq_restore(flags);
00357 return 0;
00358 }
00359
00360
00361 int i2c_outbyte(int n, unsigned char d) {
00362 int i;
00363 unsigned char x=d;
00364 unsigned long flags;
00365 local_irq_save(flags);
00366
00367 D(printk("i2c_outbyte: bus=%x byte=%x\r\n", n, x));
00368 i2c_sda_weak (n, 1);
00369 x3x3_DELAY(bitdelays[n].slave2master * I2C_DELAY_SCALE);
00370 for (i = 0; i < 8; i++) {
00371 i2c_sda_strong (n,(x & 0x80));
00372 x3x3_DELAY(bitdelays[n].scl_low * I2C_DELAY_SCALE);
00373 i2c_scl_1(n);
00374 i2c_sda_weak (n,(x & 0x80));
00375 x3x3_DELAY(bitdelays[n].scl_high * I2C_DELAY_SCALE);
00376 i2c_scl_0(n);
00377 x <<= 1;
00378 }
00379
00380 i2c_sda_weak (n, 1);
00381 x3x3_DELAY(bitdelays[n].master2slave * I2C_DELAY_SCALE);
00382 x3x3_DELAY(bitdelays[n].scl_low * I2C_DELAY_SCALE);
00383 i2c_scl_1(n);
00384 x3x3_DELAY(bitdelays[n].scl_high * I2C_DELAY_SCALE);
00385 i= (1-i2c_getbit(n));
00386 i2c_scl_0(n);
00387 D(printk("i2c_outbyte: ACK=%x\r\n", i));
00388 local_irq_restore(flags);
00389 return i;
00390 }
00391
00392
00393
00394
00395 unsigned char i2c_inbyte(int n, int more) {
00396 unsigned char aBitByte = 0;
00397 int i;
00398 unsigned long flags;
00399 local_irq_save(flags);
00400
00401 D(printk("i2c_inbyte: bus=%x\r\n", n));
00402
00403 i2c_sda_weak (n, 1);
00404 x3x3_DELAY(bitdelays[n].master2slave * I2C_DELAY_SCALE);
00405
00406 for (i = 0; i < 8; i++) {
00407 x3x3_DELAY(bitdelays[n].scl_low * I2C_DELAY_SCALE);
00408 i2c_scl_1(n);
00409 x3x3_DELAY(bitdelays[n].scl_high * I2C_DELAY_SCALE);
00410 aBitByte = (aBitByte << 1) | i2c_getbit(n);
00411 i2c_scl_0(n);
00412 }
00413
00414 i2c_sda_weak (n, more ? 0 : 1);
00415 x3x3_DELAY(bitdelays[n].slave2master * I2C_DELAY_SCALE);
00416 i2c_sda_strong (n, more ? 0 : 1);
00417 x3x3_DELAY(bitdelays[n].scl_low * I2C_DELAY_SCALE);
00418 i2c_scl_1(n);
00419 i2c_sda_weak (n, more ? 0 : 1);
00420 x3x3_DELAY(bitdelays[n].scl_high * I2C_DELAY_SCALE);
00421 i2c_scl_0(n);
00422 D(printk("i2c_inbyte: data=%x\r\n", aBitByte));
00423 local_irq_restore(flags);
00424 return aBitByte;
00425 }
00426
00427
00428
00429
00430
00431
00432
00433
00434
00435
00436
00437 int i2c_writeData(int n, unsigned char theSlave, unsigned char *theData, int size, int stop) {
00438 int i,error=0;
00439 D(printk("i2c_writeData: bus=%x theSlave=%x data=%x %x size=%x\r\n", n, theSlave, theData[0], theData[1], size));
00440
00441
00442 if ((error=i2c_start(n))) return error;
00443
00444 if(!i2c_outbyte(n,theSlave)) {
00445 i2c_stop(n);
00446 return ERR_I2C_BSY;
00447 }
00448
00449 for (i=0;i<size;i++) {
00450 if(!i2c_outbyte(n,theData[i])) {
00451 i2c_stop(n);
00452 return ERR_I2C_NACK;
00453 }
00454 }
00455 if (stop) i2c_stop(n);
00456 return 0;
00457 }
00458
00459
00460
00461
00462
00463
00464
00465
00466
00467 int i2c_readData(int n, unsigned char theSlave, unsigned char *theData, int size, int start) {
00468 int i, error=0;
00469 if (start) {
00470 if ((error=i2c_start(n))) return error;
00471 } else {
00472 if ((error=i2c_restart(n))) return error;
00473 }
00474
00475 D(printk("i2c_readData: bus=%x theSlave=%x size=%x start=%d\r\n", n, theSlave, size, start));
00476
00477 if(!i2c_outbyte(n,theSlave)) {
00478 i2c_stop(n);
00479 return ERR_I2C_BSY;
00480 }
00481 for (i=0;i<size;i++) {
00482 theData[i]=i2c_inbyte(n, (i<(size-1)));
00483 }
00484 i2c_stop(n);
00485 return 0;
00486 }
00487
00488 extern int _353_io_board_present;
00489
00490
00491
00492 int i2c_ioctl(struct inode *inode, struct file *file,
00493 unsigned int cmd, unsigned long arg) {
00494 unsigned char data[3];
00495 int error=0;
00496 D(printk("i2c_ioctl cmd= %x, arg= %x\n\r",cmd,(int) arg));
00497 D(printk("i2c_ioctl: ((int *)file->private_data)[0]= %x\n\r",((int *)file->private_data)[0]));
00498
00499 if(_IOC_TYPE(cmd) != CMOSCAM_IOCTYPE) {
00500 return -EINVAL;
00501 }
00502
00503
00504
00505 switch (_IOC_NR(cmd)) {
00506 case IO_EXT_BOARD_PRESENT: {
00507 return _353_io_board_present;
00508 }
00509 case I2C_DELAYS:
00510 return i2c_delays (arg);
00511 case I2C_WRITEREG:
00512
00513 D(printk("i2cw bus=%d, slave=%d, reg=%d, value=%d\n",
00514 (int) I2C_ARGBUS(arg),
00515 (int) I2C_ARGSLAVE(arg),
00516 (int) I2C_ARGREG(arg),
00517 (int) I2C_ARGVALUE(arg)));
00518 data[0]=I2C_ARGREG(arg);
00519 data[1]=I2C_ARGVALUE(arg);
00520 return -i2c_writeData(I2C_ARGBUS(arg), I2C_ARGSLAVE(arg) & 0xfe, &data[0], 2, 1);
00521 case I2C_READREG:
00522
00523 D(printk("i2cr bus=%d, slave=%d, reg=%d ",
00524 (int) I2C_ARGBUS(arg),
00525 (int) I2C_ARGSLAVE(arg),
00526 (int) I2C_ARGREG(arg)));
00527 data[0]=I2C_ARGREG(arg);
00528 error=i2c_writeData(I2C_ARGBUS(arg), I2C_ARGSLAVE(arg) & 0xfe, &data[0], 1, 0);
00529 if (error) return -error;
00530 error=i2c_readData(I2C_ARGBUS(arg), I2C_ARGSLAVE(arg) | 0x01, &data[1], 1, 0);
00531 if (error) return -error;
00532 D(printk("returned %d\n", data[1]));
00533 return data[1];
00534
00535 case I2C_16_WRITEREG:
00536
00537 D(printk("i2c16w slave=%d, reg=%d, value=%d\n",
00538 (int) I2C_16_ARGSLAVE(arg),
00539 (int) I2C_16_ARGREG(arg),
00540 (int) I2C_16_ARGVALUE(arg)));
00541 data[0]=I2C_16_ARGREG(arg);
00542 data[1]=I2C_16_ARGVALUE_H(arg);
00543 data[2]=I2C_16_ARGVALUE_L(arg);
00544 return -i2c_writeData(0, I2C_16_ARGSLAVE(arg) & 0xfe, &data[0], 3, 1);
00545 case I2C_16_READREG:
00546
00547 D(printk("i2c16r slave=%d, reg=%d ",
00548 (int) I2C_16_ARGSLAVE(arg),
00549 (int) I2C_16_ARGREG(arg)));
00550 data[0]=I2C_16_ARGREG(arg);
00551 error=i2c_writeData(0, I2C_16_ARGSLAVE(arg) & 0xfe, &data[0], 1, 0);
00552 if (error) return -error;
00553 error=i2c_readData(0, I2C_16_ARGSLAVE(arg) | 0x01, &data[1], 2, 0);
00554 if (error) return -error;
00555 D(printk("returned %d\n", (data[1]<<8)+data[2]));
00556 return (data[1]<<8)+data[2];
00557 default:
00558 return -EINVAL;
00559 }
00560 return 0;
00561 }
00562
00563
00564
00565
00566
00567
00568
00569
00570
00571
00572
00573
00574
00575 #define X3X3_I2C_DRIVER_NAME "Elphel (R) model 353 i2c character device driver"
00576
00577
00578
00579 #define I2CBUFSIZE 8196
00580
00581 static unsigned char i2c_enable[X3X3_I2C_CHANNELS*128];
00582
00583 static unsigned char i2cbuf_all[ X3X3_I2C_CHANNELS + 1 * I2CBUFSIZE];
00584 static loff_t sizes[X3X3_I2C_MAXMINOR + 1];
00585 static int burst_sizes[X3X3_I2C_MAXMINOR + 1];
00586 static loff_t inuse[X3X3_I2C_CHANNELS];
00587
00588
00589
00590 static int xi2c_open (struct inode *inode, struct file *filp);
00591 static int xi2c_release(struct inode *inode, struct file *filp);
00592 static loff_t xi2c_lseek (struct file * file, loff_t offset, int orig);
00593 static ssize_t xi2c_write (struct file * file, const char * buf, size_t count, loff_t *off);
00594 static ssize_t xi2c_read (struct file * file, char * buf, size_t count, loff_t *off);
00595 static int __init xi2c_init(void);
00596
00597 static struct file_operations xi2c_fops = {
00598 owner: THIS_MODULE,
00599 open: xi2c_open,
00600 release: xi2c_release,
00601 read: xi2c_read,
00602 write: xi2c_write,
00603 llseek: xi2c_lseek
00604 };
00605
00607
00608 int xi2c_open(struct inode *inode, struct file *filp) {
00609 int p = MINOR(inode->i_rdev);
00610 int bus=-1;
00611 int * pd= (int *) &(filp->private_data);
00612 switch (p) {
00613 case X3X3_I2C_RAW:
00614 case X3X3_I2C_8_AINC :
00615 case X3X3_I2C_16_AINC :
00616 bus=0;
00617 break;
00618 case X3X3_I2C1_RAW:
00619 case X3X3_I2C1_8_AINC :
00620 case X3X3_I2C1_16_AINC :
00621 bus=1;
00622 break;
00623 case X3X3_I2C_ENABLE:
00624 case X3X3_I2C_CTRL :
00625 bus=-1;
00626 break;
00627 }
00628
00629 D(printk("xi2c_open, minor=%d\n",p));
00630 if ((bus>=0) && (inuse[bus] !=0)) return -EACCES;
00631 D(printk("xi2c_open, minor=%d\n",p));
00632 inode->i_size=sizes[p];
00633 if (bus>=0) inuse[bus] =1;
00634
00635 switch ( p ) {
00636 case X3X3_I2C_RAW:
00637 case X3X3_I2C1_RAW:
00638 case X3X3_I2C_8_AINC :
00639 case X3X3_I2C1_8_AINC :
00640 inode->i_size=128*256;
00641 burst_sizes[p]=1;
00642 break;
00643 case X3X3_I2C_16_AINC :
00644 case X3X3_I2C1_16_AINC :
00645 inode->i_size=256*256;
00646 burst_sizes[p]=2;
00647 break;
00648 case X3X3_I2C_CTRL :
00649 inode->i_size=sizeof(bitdelays);
00650 break;
00651 case X3X3_I2C_ENABLE:
00652 inode->i_size=sizeof(i2c_enable);
00653 break;
00654 default:return -EINVAL;
00655 }
00656
00657
00658
00659
00660 pd[0]=p;
00661 return 0;
00662 }
00663
00665
00666
00667
00668 static int xi2c_release(struct inode *inode, struct file *filp){
00669 int p = MINOR(inode->i_rdev);
00670 int bus=-1;
00671 switch (p) {
00672 case X3X3_I2C_RAW:
00673 case X3X3_I2C_8_AINC :
00674 case X3X3_I2C_16_AINC :
00675 bus=0;
00676 break;
00677 case X3X3_I2C1_RAW:
00678 case X3X3_I2C1_8_AINC :
00679 case X3X3_I2C1_16_AINC :
00680 bus=1;
00681 break;
00682 case X3X3_I2C_ENABLE:
00683 case X3X3_I2C_CTRL :
00684 bus=-1;
00685 break;
00686 }
00687 D(printk("xi2c_release, minor=%d\n",p));
00688 if (bus>=0) inuse[bus]=0;
00689 else if (p==X3X3_I2C_CTRL) for (bus=0; bus < X3X3_I2C_CHANNELS; bus++) inuse[bus]=0;
00690
00691 return 0;
00692 }
00693
00695 static loff_t xi2c_lseek(struct file * file, loff_t offset, int orig) {
00696
00697
00698
00699
00700
00701 int p=(int)file->private_data;
00702 int thissize=sizes[p];
00703 switch (orig) {
00704 case SEEK_SET:
00705 file->f_pos = offset;
00706 break;
00707 case SEEK_CUR:
00708 file->f_pos += offset;
00709 break;
00710 case SEEK_END:
00711
00712
00713
00715 if (offset<=0) {
00716 file->f_pos = thissize + offset;
00717 } else {
00718 burst_sizes[p]=offset;
00719 }
00720 break;
00721 default:
00722 return -EINVAL;
00723 }
00724
00725 switch (p) {
00726 case X3X3_I2C_RAW:
00727 case X3X3_I2C1_RAW:
00728 (file->f_pos) &= ~(0x7f);
00729 break;
00730 case X3X3_I2C_16_AINC :
00731 case X3X3_I2C1_16_AINC : {
00732 if ((file->f_pos) & 1) (file->f_pos)++;
00733 break;
00734 }
00735 }
00736
00737
00738 if (file->f_pos < 0) {
00739 file->f_pos = 0;
00740 return (-EOVERFLOW);
00741 }
00742
00743 if (file->f_pos > thissize) {
00744 file->f_pos = thissize;
00745 return (-EOVERFLOW);
00746 }
00747 return (file->f_pos);
00748 }
00749
00751
00752 ssize_t xi2c_read(struct file * file, char * buf, size_t count, loff_t *off) {
00753 unsigned long p;
00754 int error;
00755 p = *off;
00756 char * bbitdelays= (char*) bitdelays;
00757 int bus=0;
00758 unsigned char * i2cbuf=&i2cbuf_all[0];
00759 unsigned char * userbuf=&i2cbuf[1];
00760 int thissize=sizes[(int)file->private_data];
00761 int slave_adr;
00762 int en_mask=0;
00763 int en_bits=0;
00764
00765
00766 switch ((int)file->private_data) {
00767 case X3X3_I2C_RAW:
00768 case X3X3_I2C_8_AINC :
00769 case X3X3_I2C_16_AINC :
00770 bus=0;
00771 i2cbuf = &i2cbuf_all[0];
00772 break;
00773 case X3X3_I2C1_RAW:
00774 case X3X3_I2C1_8_AINC :
00775 case X3X3_I2C1_16_AINC :
00776 bus=1;
00777 i2cbuf = &i2cbuf_all[1*I2CBUFSIZE];
00778 break;
00779
00780
00781 }
00782 userbuf=&i2cbuf[1];
00783
00784
00785 slave_adr=(p >> 7) & 0xfe;
00786 switch ((int)file->private_data) {
00787 case X3X3_I2C_RAW:
00788 case X3X3_I2C1_RAW:
00789 case X3X3_I2C_8_AINC :
00790 case X3X3_I2C1_8_AINC :
00791 if (count == 8192) count=burst_sizes[(int)file->private_data];
00792 break;
00793 case X3X3_I2C_16_AINC :
00794 case X3X3_I2C1_16_AINC :
00795 p&=0xfffffffe;
00796 if (count == 8192) count=burst_sizes[(int)file->private_data];
00797 if (count & 1) count++;
00798 slave_adr=(p >> 8) & 0xfe;
00799 break;
00800 }
00801 D(printk("xi2c_read (bus=%d) from 0x%x, count=%d\n", bus, (int) *off, (int) count));
00803 switch ((int)file->private_data) {
00804 case X3X3_I2C_RAW:
00805 case X3X3_I2C1_RAW:
00806 en_mask=(1 << X3X3_I2C_ENABLE_RD) | (1 <<X3X3_I2C_ENABLE_RAW);
00807 break;
00808 case X3X3_I2C_8_AINC :
00809 case X3X3_I2C1_8_AINC :
00810 en_mask=(1 << X3X3_I2C_ENABLE_RD) | (1 <<X3X3_I2C_ENABLE_8);
00811 break;
00812 case X3X3_I2C_16_AINC :
00813 case X3X3_I2C1_16_AINC :
00814 en_mask=(1 << X3X3_I2C_ENABLE_RD) | (1 <<X3X3_I2C_ENABLE_16);
00815 break;
00816 }
00817 switch ((int)file->private_data) {
00818 case X3X3_I2C_RAW:
00819 case X3X3_I2C_8_AINC :
00820 case X3X3_I2C_16_AINC :
00821 en_bits=i2c_enable[ slave_adr>>1 ];
00822 break;
00823 case X3X3_I2C1_RAW:
00824 case X3X3_I2C1_8_AINC :
00825 case X3X3_I2C1_16_AINC :
00826 en_bits=i2c_enable[(slave_adr>>1) + 128];
00827 break;
00828 }
00829 if ((en_bits & en_mask) ^ en_mask) {
00830 printk("tried disabed xi2c_read (bus=%d, slave=0x%x)\n", bus, slave_adr);
00831 D(printk("en_bits=0x%x, en_mask=0x%x (minor=%d)\n", (int) en_bits, (int) en_mask, (int)file->private_data));
00832 return -ENXIO;
00833 }
00834
00835 if (p >= thissize) return -EINVAL;
00836 if( (p + count) > thissize) {
00837 count = thissize - p;
00838 }
00839 if( count > (I2CBUFSIZE-1)) {
00840 count = I2CBUFSIZE-1;
00841 }
00842 if (count==0) return 0;
00843 switch ((int)file->private_data) {
00844 case X3X3_I2C_RAW:
00845 case X3X3_I2C1_RAW:
00846 i2cbuf[0]=p & 0xff;
00847 error=i2c_readData (bus, slave_adr | 0x01, &i2cbuf[1], count, 1);
00848 if (error) return -EINVAL;
00849 break;
00850 case X3X3_I2C_8_AINC :
00851 case X3X3_I2C1_8_AINC :
00852 i2cbuf[0]=p & 0xff;
00853 error=i2c_writeData(bus, slave_adr, &i2cbuf[0], 1, 0);
00854 if (error) return -EINVAL;
00855 error=i2c_readData (bus, slave_adr | 0x01, &i2cbuf[1], count,0);
00856 if (error) return -EINVAL;
00857 break;
00858 case X3X3_I2C_16_AINC :
00859 case X3X3_I2C1_16_AINC :
00860 i2cbuf[0]=(p>>1) & 0xff;
00861 error=i2c_writeData(bus, slave_adr, &i2cbuf[0], 1, 0);
00862 if (error) return -EINVAL;
00863 error=i2c_readData (bus, slave_adr | 0x01, &i2cbuf[1], count,0);
00864 if (error) return -EINVAL;
00865 break;
00866 case X3X3_I2C_CTRL :
00867 userbuf=&bbitdelays[*off];
00868
00869 break;
00870 case X3X3_I2C_ENABLE:
00871 userbuf=&i2c_enable[*off];
00872 break;
00873 default:return -EINVAL;
00874 }
00875
00876
00877 if (copy_to_user(buf, userbuf, count)) return -EFAULT;
00878
00880 switch ((int)file->private_data) {
00881 case X3X3_I2C_RAW:
00882 case X3X3_I2C1_RAW:
00883 *off &= ~(0x7f);
00884 break;
00885 default:
00886 *off+=count;
00887 }
00888 D(printk("count= 0x%x, pos= 0x%x\n", (int) count, (int)*off));
00889 return count;
00890 }
00891
00893
00894 static ssize_t xi2c_write(struct file * file, const char * buf, size_t count, loff_t *off) {
00895 unsigned long p;
00896 int error;
00897 p = *off;
00898 int bus=0;
00899 char * bbitdelays= (char*) bitdelays;
00900 unsigned char * i2cbuf=&i2cbuf_all[0];
00901 unsigned char * userbuf=&i2cbuf[1];
00902 int thissize=sizes[(int)file->private_data];
00903 int slave_adr;
00904 int en_mask=0;
00905 int en_bits=0;
00906
00907
00908 switch ((int)file->private_data) {
00909 case X3X3_I2C_RAW:
00910 case X3X3_I2C_8_AINC :
00911 case X3X3_I2C_16_AINC :
00912 bus=0;
00913 i2cbuf = &i2cbuf_all[0];
00914 break;
00915 case X3X3_I2C1_RAW:
00916 case X3X3_I2C1_8_AINC :
00917 case X3X3_I2C1_16_AINC :
00918 bus=1;
00919 i2cbuf = &i2cbuf_all[1*I2CBUFSIZE];
00920 break;
00921
00922
00923 }
00924 userbuf=&i2cbuf[1];
00925 slave_adr=(p >> 7) & 0xfe;
00926 switch ((int)file->private_data) {
00927 case X3X3_I2C_16_AINC :
00928 case X3X3_I2C1_16_AINC :
00929 p&=0xfffffffe;
00930 if (count & 1) count++;
00931 slave_adr=(p >> 8) & 0xfe;
00932 break;
00933 }
00934 D(printk("xi2c_write (bus=%d) to 0x%x, count=%x\n", bus, (int) *off, (int) count));
00935
00937 switch ((int)file->private_data) {
00938 case X3X3_I2C_RAW:
00939 case X3X3_I2C1_RAW:
00940 en_mask=(1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_RAW);
00941 break;
00942 case X3X3_I2C_8_AINC :
00943 case X3X3_I2C1_8_AINC :
00944 en_mask=(1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_8);
00945 break;
00946 case X3X3_I2C_16_AINC :
00947 case X3X3_I2C1_16_AINC :
00948 en_mask=(1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_16);
00949 break;
00950 }
00951 switch ((int)file->private_data) {
00952 case X3X3_I2C_RAW:
00953 case X3X3_I2C_8_AINC :
00954 case X3X3_I2C_16_AINC :
00955 en_bits=i2c_enable[ slave_adr>>1 ];
00956 break;
00957 case X3X3_I2C1_RAW:
00958 case X3X3_I2C1_8_AINC :
00959 case X3X3_I2C1_16_AINC :
00960 en_bits=i2c_enable[(slave_adr>>1) + 128];
00961 break;
00962 }
00963 if ((en_bits & en_mask) ^ en_mask) {
00964 printk("tried disabed xi2c_write (bus=%d, slave=0x%x)\n", bus, slave_adr);
00965 D(printk("en_bits=0x%x, en_mask=0x%x (minor=%d)\n", (int) en_bits, (int) en_mask, (int)file->private_data));
00966 return -ENXIO;
00967 }
00968
00969 if (p >= thissize) return -EINVAL;
00970 if( (p + count) > thissize) {
00971 count = thissize - p;
00972 }
00973 if( count > (I2CBUFSIZE-1)) {
00974 count = I2CBUFSIZE-1;
00975 }
00976 if (count==0) return 0;
00978 switch ((int)file->private_data) {
00979 case X3X3_I2C_CTRL :
00980 userbuf=&bbitdelays[p];
00981 break;
00982 case X3X3_I2C_ENABLE:
00983 userbuf=&i2c_enable[p];
00984 break;
00985 }
00986
00987
00988 if (copy_from_user( userbuf, buf, count)) return -EFAULT;
00989 switch ((int)file->private_data) {
00990 case X3X3_I2C_RAW:
00991 case X3X3_I2C1_RAW:
00992 error=i2c_writeData(bus, slave_adr, &i2cbuf[1],count, 1);
00993 if (error) return -EINVAL;
00994 break;
00995 case X3X3_I2C_8_AINC :
00996 case X3X3_I2C1_8_AINC :
00997 i2cbuf[0]=p & 0xff;
00998 error=i2c_writeData(bus, slave_adr, &i2cbuf[0],count+1, 1);
00999 if (error) return -EINVAL;
01000 break;
01001 case X3X3_I2C_16_AINC :
01002 case X3X3_I2C1_16_AINC :
01003 i2cbuf[0]=(p>>1) & 0xff;
01004 error=i2c_writeData(bus, slave_adr, &i2cbuf[0],count+1, 1);
01005 if (error) return -EINVAL;
01006 break;
01007
01008
01009
01010 default:return -EINVAL;
01011 }
01012
01014 switch ((int)file->private_data) {
01015 case X3X3_I2C_RAW:
01016 case X3X3_I2C1_RAW:
01017 *off &= ~(0x7f);
01018 break;
01019 default:
01020 *off+=count;
01021 }
01022 D(printk("count= 0x%x, pos= 0x%x\n", (int) count, (int)*off));
01023 return count;
01024 }
01025
01026
01027 static int __init xi2c_init(void) {
01028 int i,res;
01029 res = register_chrdev(X3X3_I2C_MAJOR, "fpga_xi2c", &xi2c_fops);
01030 if(res < 0) {
01031 printk(KERN_ERR "\nxi2c_init: couldn't get a major number %d.\n",X3X3_I2C_MAJOR);
01032 return res;
01033 }
01034 printk(X3X3_I2C_DRIVER_NAME" - %d, %d channels\n",X3X3_I2C_MAJOR,X3X3_I2C_CHANNELS);
01035
01036
01037 bitdelays[0].scl_high=2;
01038 bitdelays[0].scl_low=2;
01039 bitdelays[0].slave2master=1;
01040 bitdelays[0].master2slave=1;
01041 bitdelays[0].filter_sda=0x07;
01042 bitdelays[0].filter_scl=0x07;
01043
01044 bitdelays[1].scl_high=3;
01045 bitdelays[1].scl_low=4;
01046 bitdelays[1].slave2master=2;
01047 bitdelays[1].master2slave=2;
01048 bitdelays[1].filter_sda=0x07;
01049 bitdelays[1].filter_scl=0x07;
01050
01051 for (i=0; i<X3X3_I2C_CHANNELS;i++) {
01052 inuse[i]=0;
01053 }
01054 sizes[X3X3_I2C_CTRL]= sizeof(bitdelays);
01055 sizes[X3X3_I2C_8_AINC]= 128*256;
01056 sizes[X3X3_I2C_16_AINC]= 256*256;
01057 sizes[X3X3_I2C1_8_AINC]= 128*256;
01058 sizes[X3X3_I2C1_16_AINC]= 256*256;
01059 sizes[X3X3_I2C_RAW]= 128*256;
01060 sizes[X3X3_I2C1_RAW]= 128*256;
01061 sizes[X3X3_I2C_ENABLE]= sizeof(i2c_enable);
01063 for (i=0; i<X3X3_I2C_CHANNELS*128; i++) i2c_enable[i]=0xff;
01066 i2c_enable[0x90 >> 1]= (1 << X3X3_I2C_ENABLE_RD) | ( 1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_16);
01067 i2c_enable[0xba >> 1]= (1 << X3X3_I2C_ENABLE_RD) | ( 1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_16);
01068 i2c_enable[0x20 >> 1]= (1 << X3X3_I2C_ENABLE_RD) | ( 1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_16);
01069
01070 i2c_enable[128+(0x90 >> 1)]= (1 << X3X3_I2C_ENABLE_RD) | ( 1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_8);
01071 i2c_enable[128+(0xa2 >> 1)]= (1 << X3X3_I2C_ENABLE_RD) | ( 1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_8);
01072 i2c_enable[128+(0xa0 >> 1)]= (1 << X3X3_I2C_ENABLE_RD) | ( 0 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_8);
01073 i2c_enable[128+(0x40 >> 1)]= (1 << X3X3_I2C_ENABLE_RD) | ( 1 << X3X3_I2C_ENABLE_WR) | (1 <<X3X3_I2C_ENABLE_RAW);
01074
01075
01076
01077
01078
01079
01080
01081
01082
01083
01084
01085 return 0;
01086 }
01087
01088
01089
01090 module_init(xi2c_init);
01091 MODULE_LICENSE("GPL");
01092 MODULE_AUTHOR("Andrey Filippov <andrey@elphel.com>.");
01093 MODULE_DESCRIPTION(X3X3_I2C_DRIVER_NAME);