nand_chip Struct Reference

#include <nand.h>

Collaboration diagram for nand_chip:


Data Fields
void __iomem *	IO_ADDR_R
void __iomem *	IO_ADDR_W
u_char(*	read_byte )(struct mtd_info *mtd)
void(*	write_byte )(struct mtd_info *mtd, u_char byte)
u16(*	read_word )(struct mtd_info *mtd)
void(*	write_word )(struct mtd_info *mtd, u16 word)
void(*	write_buf )(struct mtd_info mtd, const u_char buf, int len)
void(*	read_buf )(struct mtd_info mtd, u_char buf, int len)
int(*	verify_buf )(struct mtd_info mtd, const u_char buf, int len)
void(*	select_chip )(struct mtd_info *mtd, int chip)
int(*	block_bad )(struct mtd_info *mtd, loff_t ofs, int getchip)
int(*	block_markbad )(struct mtd_info *mtd, loff_t ofs)
void(*	hwcontrol )(struct mtd_info *mtd, int cmd)
int(*	dev_ready )(struct mtd_info *mtd)
void(*	cmdfunc )(struct mtd_info *mtd, unsigned command, int column, int page_addr)
int(*	waitfunc )(struct mtd_info mtd, struct nand_chip this, int state)
int(*	calculate_ecc )(struct mtd_info mtd, const u_char dat, u_char *ecc_code)
int(*	correct_data )(struct mtd_info mtd, u_char dat, u_char read_ecc, u_char calc_ecc)
void(*	enable_hwecc )(struct mtd_info *mtd, int mode)
void(*	erase_cmd )(struct mtd_info *mtd, int page)
int(*	scan_bbt )(struct mtd_info *mtd)
int	eccmode
int	eccsize
int	eccbytes
int	eccsteps
int	chip_delay
spinlock_t	chip_lock
wait_queue_head_t	wq
nand_state_t	state
int	page_shift
int	phys_erase_shift
int	bbt_erase_shift
int	chip_shift
u_char *	data_buf
u_char *	oob_buf
int	oobdirty
u_char *	data_poi
unsigned int	options
int	badblockpos
int	numchips
unsigned long	chipsize
int	pagemask
int	pagebuf
nand_oobinfo *	autooob
uint8_t *	bbt
nand_bbt_descr *	bbt_td
nand_bbt_descr *	bbt_md
nand_bbt_descr *	badblock_pattern
nand_hw_control *	controller
void *	priv
int(*	errstat )(struct mtd_info mtd, struct nand_chip this, int state, int status, int page)

Detailed Description

struct nand_chip - NAND Private Flash Chip Data : [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device : [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device : [REPLACEABLE] read one byte from the chip : [REPLACEABLE] write one byte to the chip : [REPLACEABLE] read one word from the chip : [REPLACEABLE] write one word to the chip : [REPLACEABLE] write data from the buffer to the chip : [REPLACEABLE] read data from the chip into the buffer : [REPLACEABLE] verify buffer contents against the chip data : [REPLACEABLE] select chip nr : [REPLACEABLE] check, if the block is bad : [REPLACEABLE] mark the block bad : [BOARDSPECIFIC] hardwarespecific function for accesing control-lines : [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line If set to NULL no access to ready/busy is available and the ready/busy information is read from the chip status register : [REPLACEABLE] hardwarespecific function for writing commands to the chip : [REPLACEABLE] hardwarespecific function for wait on ready : [REPLACEABLE] function for ecc calculation or readback from ecc hardware : [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw) : [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only be provided if a hardware ECC is available : [INTERN] erase command write function, selectable due to AND support : [REPLACEABLE] function to scan bad block table : [BOARDSPECIFIC] mode of ecc, see defines : [INTERN] databytes used per ecc-calculation : [INTERN] number of ecc bytes per ecc-calculation step : [INTERN] number of ecc calculation steps per page : [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) : [INTERN] spinlock used to protect access to this structure and the chip : [INTERN] wait queue to sleep on if a NAND operation is in progress : [INTERN] the current state of the NAND device : [INTERN] number of address bits in a page (column address bits) : [INTERN] number of address bits in a physical eraseblock : [INTERN] number of address bits in a bbt entry : [INTERN] number of address bits in one chip : [INTERN] internal buffer for one page + oob : [INTERN] oob buffer for one eraseblock : [INTERN] indicates that oob_buf must be reinitialized : [INTERN] pointer to a data buffer : [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about special functionality. See the defines for further explanation : [INTERN] position of the bad block marker in the oob area : [INTERN] number of physical chips : [INTERN] the size of one chip for multichip arrays : [INTERN] page number mask = number of (pages / chip) - 1 : [INTERN] holds the pagenumber which is currently in data_buf : [REPLACEABLE] the default (auto)placement scheme : [INTERN] bad block table pointer : [REPLACEABLE] bad block table descriptor for flash lookup : [REPLACEABLE] bad block table mirror descriptor : [REPLACEABLE] bad block scan pattern used for initial bad block scan : [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices : [OPTIONAL] pointer to private chip date : [OPTIONAL] hardware specific function to perform additional error status checks (determine if errors are correctable)

Definition at line 334 of file nand.h.