1308
15856RXISCANRESET_TIME7'h0
15850TXPCSRESET_TIME5'b00001
15962ALIGN_PCOMMA_VALUE10'b0101111100
15987RXBUF_RESET_ON_CB_CHANGE"TRUE"
16007CLK_COR_SEQ_2_ENABLE4'b1111
15996CLK_COR_KEEP_IDLE"FALSE"
15879TXBUF_RESET_ON_RATE_CHANGE"TRUE"
15897TX_EIDLE_DEASSERT_DELAY3'b100
16024CHAN_BOND_SEQ_2_ENABLE4'b1111
15983RX_DEFER_RESET_BUF_EN"TRUE"
15848SATA_CPLL_CFG"VCO_3000MHZ"
15940RXCDR_HOLD_DURING_EIDLE1'b0
16028FTS_LANE_DESKEW_EN"FALSE"
15994CLK_CORRECT_USE"FALSE"
15908SATA_BURST_VAL3'b110
16020CHAN_BOND_SEQ_2_110'b0
15975RXPH_MONITOR_SEL5'h0
15888TX_MARGIN_FULL_47'b0
15967RX_DISPERR_SEQ_MATCH"TRUE"
15937RX_DFE_VP_CFG17'h03f03
16004CLK_COR_SEQ_1_210'b0
16008CLK_COR_SEQ_2_110'b0
15859PD_TRANS_TIME_FROM_P212'h0
15995CLK_COR_SEQ_2_USE"FALSE"
15991RXBUF_THRESH_OVRD"FALSE"
[1:0] 15731RXELECIDLEMODE
16000CLK_COR_REPEAT_WAIT0
15958ALIGN_COMMA_DOUBLE"FALSE"
15855RXDFELPMRESET_TIME7'h0
15851TXPMARESET_TIME5'b00001
[7:0] 15665TXCHARDISPMODE
16016CHAN_BOND_SEQ_1_210'b0
16022CHAN_BOND_SEQ_2_310'b0
15960ALIGN_MCOMMA_VALUE10'b1010000011
15894TX_PREDRIVER_MODE1'b0
16025CHAN_BOND_SEQ_2_USE"FALSE"
15992RXBUF_THRESH_UNDFLW0
15925RX_DFE_H4_CFG11'h0e0
15860PD_TRANS_TIME_NONE_P28'h0
15898TX_LOOPBACK_DRIVE_HIZ"FALSE"
15993CBCC_DATA_SOURCE_SEL"DECODED"
15924RX_DFE_H3_CFG12'h040
16026FTS_DESKEW_SEQ_ENABLE4'b1111
15986RXBUF_EIDLE_LO_CNT4'b0
15837SIM_TX_EIDLE_DRIVE_LEVEL"X"
15861PD_TRANS_TIME_TO_P28'h0
16023CHAN_BOND_SEQ_2_410'b0
16017CHAN_BOND_SEQ_1_310'b0
16010CLK_COR_SEQ_2_310'b0
15882TX_DRIVE_MODE"DIRECT"
16005CLK_COR_SEQ_1_310'b0
15957ALIGN_COMMA_ENABLE10'b1111111111
16006CLK_COR_SEQ_1_410'b0
15854RXCDRFREQRESET_TIME5'h0
16009CLK_COR_SEQ_2_210'b0
15883TX_MAINCURSOR_SEL1'b0
15835SIM_CPLLREFCLK_SEL3'b001
15922RX_DFE_GAIN_CFG23'h020FEA
16018CHAN_BOND_SEQ_1_410'b0
15865DMONITOR_CFG24'h008101
15887TX_MARGIN_FULL_37'b0
15928RX_DFE_LPM_HOLD_DURING_EIDLE1'b0
15941RXCDR_FR_RESET_ON_EIDLE1'b0
15961ALIGN_PCOMMA_DET"TRUE"
15920RXLPM_HF_CFG14'h00f0
15942RXCDR_PH_RESET_ON_EIDLE1'b0
15906PCS_RSVD_ATTR48'h0100
15969DEC_PCOMMA_DETECT"TRUE"
15884TX_MARGIN_FULL_07'b0
15909SATA_EIDLE_VAL3'b110
15943RXBUF_RESET_ON_RATE_CHANGE"TRUE"
15963SHOW_REALIGN_COMMA"TRUE"
15886TX_MARGIN_FULL_27'b0
15901SATA_BURST_SEQ_LEN4'b0101
15926RX_DFE_H5_CFG11'h0e0
15834SIM_RESET_SPEEDUP"TRUE"
15836SIM_RECEIVER_DETECT_PASS"TRUE"
15988RXBUF_RESET_ON_COMMAALIGN"FALSE"
16019CHAN_BOND_SEQ_1_ENABLE4'b1111
15970DEC_VALID_COMMA_ONLY"FALSE"
15984RXBUF_ADDR_MODE"FAST"
15985RXBUF_EIDLE_HI_CNT4'b0
gtx_unisims GTXE2_CHANNEL
16002CLK_COR_SEQ_1_ENABLE4'b1111
16003CLK_COR_SEQ_1_110'b0
15919RXLPM_LF_CFG14'h00f0
15936RX_DFE_UT_CFG17'h11e00
16021CHAN_BOND_SEQ_2_210'b0
15959ALIGN_MCOMMA_DET"TRUE"
15853RXCDRPHRESET_TIME5'h0
15989RXBUF_RESET_ON_EIDLE"FALSE"
15873TXPH_MONITOR_SEL5'h0
[4:0] 15806RXPHSLIPMONITOR
15878RXPRBS_ERR_LOOPBACK1'b0
15895TX_QPI_STATUS_EN1'b0
15899TX_RXDETECT_CFG14'h0
16011CLK_COR_SEQ_2_410'b0
16015CHAN_BOND_SEQ_1_110'b0
15839OUTREFCLK_SEL_INV1'b0
15896TX_EIDLE_ASSERT_DELAY3'b110
15968DEC_MCOMMA_DETECT"TRUE"
16013CHAN_BOND_KEEP_ALIGN"FALSE"
16027FTS_LANE_DESKEW_CFG4'b1111
15999CLK_COR_PRECEDENCE"TRUE"
15885TX_MARGIN_FULL_17'b0