simul_clk_single Module Reference

Inheritance diagram for simul_clk_single:

Public Attributes

Inputs
rst

Outputs
clk

Parameters
PERIOD	1000 . 0

Signals
reg	clk_r

Detailed Description

Definition at line 88 of file simul_clk.v.

Member Data Documentation

PERIOD 1000 . 0

Parameter

Definition at line 89 of file simul_clk.v.

rst

Input

Definition at line 91 of file simul_clk.v.

clk

Output

Definition at line 92 of file simul_clk.v.

clk_r

Signal

Definition at line 94 of file simul_clk.v.

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The documentation for this Module was generated from the following files:

• simulation_modules/simul_clk.v