x393  1.0
FPGAcodeforElphelNC393camera
sim_frac_clk_delay Module Reference
Inheritance diagram for sim_frac_clk_delay:

Static Public Member Functions

Always Constructs

ALWAYS_406  ( clk )
ALWAYS_407  ( clk )
ALWAYS_408  ( clk )

Public Attributes

Inputs

clk  
din  

Outputs

dout  

Parameters

FRAC_DELAY   2 . 3
SKIP_FIRST   5
INT_DELAY  integer $rtoi (FRAC_DELAY
HALF_DELAY   [ 0 : 0 ] (FRAC_DELAY - INT_DELAY ) >= 0 . 5
RDELAY  (FRAC_DELAY - INT_DELAY ) - 0 . 5 * HALF_DELAY

Signals

integer  num_period
reg  en
real  phase
real  prev_phase
real  frac_period
reg[INT_DELAY : 0 ]  sr
reg[INT_DELAY : 0 ]  sr_fract
wire[INT_DELAY + 1 : 0 ]  taps
wire[INT_DELAY + 1 : 0 ]  taps_fract
reg  dly_half

Detailed Description

Definition at line 41 of file sim_frac_clk_delay.v.

Member Function Documentation

ALWAYS_406 (   clk  
)
Always Construct

Definition at line 60 of file sim_frac_clk_delay.v.

ALWAYS_407 (   clk  
)
Always Construct

Definition at line 75 of file sim_frac_clk_delay.v.

ALWAYS_408 (   clk  
)
Always Construct

Definition at line 80 of file sim_frac_clk_delay.v.

Member Data Documentation

FRAC_DELAY 2 . 3
Parameter

Definition at line 42 of file sim_frac_clk_delay.v.

SKIP_FIRST 5
Parameter

Definition at line 43 of file sim_frac_clk_delay.v.

clk
Input

Definition at line 45 of file sim_frac_clk_delay.v.

din
Input

Definition at line 46 of file sim_frac_clk_delay.v.

dout
Output

Definition at line 47 of file sim_frac_clk_delay.v.

INT_DELAY $rtoi (FRAC_DELAY
Parameter

Definition at line 49 of file sim_frac_clk_delay.v.

HALF_DELAY (FRAC_DELAY - INT_DELAY ) >= 0 . 5
Parameter

Definition at line 51 of file sim_frac_clk_delay.v.

RDELAY (FRAC_DELAY - INT_DELAY ) - 0 . 5 * HALF_DELAY
Parameter

Definition at line 52 of file sim_frac_clk_delay.v.

num_period
Signal

Definition at line 53 of file sim_frac_clk_delay.v.

en
Signal

Definition at line 54 of file sim_frac_clk_delay.v.

phase
Signal

Definition at line 55 of file sim_frac_clk_delay.v.

prev_phase
Signal

Definition at line 56 of file sim_frac_clk_delay.v.

frac_period
Signal

Definition at line 57 of file sim_frac_clk_delay.v.

sr
Signal

Definition at line 69 of file sim_frac_clk_delay.v.

sr_fract
Signal

Definition at line 70 of file sim_frac_clk_delay.v.

taps
Signal

Definition at line 71 of file sim_frac_clk_delay.v.

taps_fract
Signal

Definition at line 72 of file sim_frac_clk_delay.v.

dly_half
Signal

Definition at line 73 of file sim_frac_clk_delay.v.


The documentation for this Module was generated from the following files: