x393
1.0
FPGAcodeforElphelNC393camera
sensor_fifo Member List
This is the complete list of members for
sensor_fifo
, including all inherited members.
WIDTH
dly_16
Parameter
clk
dly_16
Input
rst
dly_16
Input
dly
dly_16
Input
din
dly_16
Input
dout
dly_16
Output
DATA_WIDTH
fifo_cross_clocks
Parameter
DATA_DEPTH
fifo_cross_clocks
Parameter
rst
fifo_cross_clocks
Input
rrst
fifo_cross_clocks
Input
wrst
fifo_cross_clocks
Input
rclk
fifo_cross_clocks
Input
wclk
fifo_cross_clocks
Input
we
fifo_cross_clocks
Input
re
fifo_cross_clocks
Input
data_in
fifo_cross_clocks
Input
data_out
fifo_cross_clocks
Output
nempty
fifo_cross_clocks
Output
half_empty
fifo_cross_clocks
Output
DATA_2DEPTH
fifo_cross_clocks
Parameter
ram
fifo_cross_clocks
Signal
raddr
fifo_cross_clocks
Signal
waddr
fifo_cross_clocks
Signal
waddr_gray
fifo_cross_clocks
Signal
waddr_gray_rclk
fifo_cross_clocks
Signal
waddr_plus1
fifo_cross_clocks
Signal
waddr_plus1_gray
fifo_cross_clocks
Signal
raddr_gray
fifo_cross_clocks
Signal
raddr_plus1
fifo_cross_clocks
Signal
raddr_plus1_gray_top3
fifo_cross_clocks
Signal
raddr_gray_top3
fifo_cross_clocks
Signal
raddr_gray_top3_wclk
fifo_cross_clocks
Signal
raddr_top3_wclk
fifo_cross_clocks
Signal
waddr_top3
fifo_cross_clocks
Signal
addr_diff
fifo_cross_clocks
Signal
EXTRA_DLY
pulse_cross_clock
Parameter
rst
pulse_cross_clock
Input
src_clk
pulse_cross_clock
Input
dst_clk
pulse_cross_clock
Input
in_pulse
pulse_cross_clock
Input
out_pulse
pulse_cross_clock
Output
busy
pulse_cross_clock
Output
EXTRA_DLY_SAFE
pulse_cross_clock
Parameter
in_reg
pulse_cross_clock
Signal
out_reg
pulse_cross_clock
Signal
busy_r
pulse_cross_clock
Signal
SENSOR_DATA_WIDTH
sensor_fifo
SENSOR_FIFO_2DEPTH
sensor_fifo
SENSOR_FIFO_DELAY
sensor_fifo
iclk
sensor_fifo
pclk
sensor_fifo
prst
sensor_fifo
irst
sensor_fifo
pxd_in
sensor_fifo
vact
sensor_fifo
hact
sensor_fifo
pxd_out
sensor_fifo
data_valid
sensor_fifo
sof
sensor_fifo
eof
sensor_fifo
vact_r
sensor_fifo
hact_r
sensor_fifo
sof_in
sensor_fifo
eof_in
sensor_fifo
pxd_w
sensor_fifo
nempty
sensor_fifo
hact_w
sensor_fifo
sof_w
sensor_fifo
eof_w
sensor_fifo
sof_r
sensor_fifo
eof_r
sensor_fifo
we
sensor_fifo
re
sensor_fifo
pre_hact
sensor_fifo
hact_out_r
sensor_fifo
pxd_r
sensor_fifo
pre_sof_pclk
sensor_fifo
pre_eof_pclk
sensor_fifo
pre_sol_pclk
sensor_fifo
sof_pclk
sensor_fifo
eof_pclk
sensor_fifo
sol_pclk
sensor_fifo
sof_rq
sensor_fifo
eof_rq
sensor_fifo
sol_rq
sensor_fifo
ALWAYS_387
iclk
sensor_fifo
Always Construct
ALWAYS_388
pclk
sensor_fifo
Always Construct
ALWAYS_389
pclk
sensor_fifo
Always Construct
ALWAYS_504
wclk or rst
fifo_cross_clocks
Always Construct
ALWAYS_505
rclk or rst
fifo_cross_clocks
Always Construct
ALWAYS_506
rclk
fifo_cross_clocks
Always Construct
ALWAYS_507
wclk
fifo_cross_clocks
Always Construct
ALWAYS_532
src_clk or rst
pulse_cross_clock
Always Construct
ALWAYS_533
dst_clk
pulse_cross_clock
Always Construct
dly01_16
dly_16
Module Instance
dly_16
sensor_fifo
fifo_cross_clocks
sensor_fifo
GENERATE [50]
dly_16
GENERATE
pulse_cross_clock
sensor_fifo
pulse_cross_clock
sensor_fifo
pulse_cross_clock
sensor_fifo
Generated by
1.8.12