x393  1.0
FPGAcodeforElphelNC393camera
rs232_rcv393 Module Reference
Inheritance diagram for rs232_rcv393:

Static Public Member Functions

Always Constructs

ALWAYS_233  ( xclk )

Public Attributes

Inputs

xclk  
bitHalfPeriod   [ 15 : 0 ]
ser_di  
ser_rst  

Outputs

ts_stb  
wait_just_pause   reg
start  
ser_do   reg
ser_do_stb   reg
debug   [ 4 : 0 ]
bit_dur_cntr   [ 15 : 0 ]
bit_cntr   [ 4 : 0 ]

Signals

reg[ 4 : 0 ]  ser_di_d
reg  ser_filt_di
reg  ser_filt_di_d
reg  bit_half_end
reg  last_half_bit
reg  wait_pause
reg  wait_start
reg  receiving_byte
reg  start_r
reg[ 15 : 0 ]  bit_dur_cntr_r
reg[ 4 : 0 ]  bit_cntr_r
wire  error
reg[ 1 : 0 ]  restart
wire  reset_wait_pause
reg  ts_stb_r
reg  shift_en
wire  sample_bit
wire  reset_bit_duration
wire  wstart

Detailed Description

Definition at line 41 of file rs232_rcv393.v.

Member Function Documentation

ALWAYS_233 (   xclk  
)
Always Construct

Definition at line 92 of file rs232_rcv393.v.

Member Data Documentation

xclk
Input

Definition at line 42 of file rs232_rcv393.v.

bitHalfPeriod [ 15 : 0 ]
Input

Definition at line 43 of file rs232_rcv393.v.

ser_di
Input

Definition at line 44 of file rs232_rcv393.v.

ser_rst
Input

Definition at line 45 of file rs232_rcv393.v.

ts_stb
Output

Definition at line 46 of file rs232_rcv393.v.

wait_just_pause reg
Output

Definition at line 47 of file rs232_rcv393.v.

start
Output

Definition at line 48 of file rs232_rcv393.v.

ser_do reg
Output

Definition at line 49 of file rs232_rcv393.v.

ser_do_stb reg
Output

Definition at line 50 of file rs232_rcv393.v.

debug [ 4 : 0 ]
Output

Definition at line 52 of file rs232_rcv393.v.

bit_dur_cntr [ 15 : 0 ]
Output

Definition at line 53 of file rs232_rcv393.v.

bit_cntr [ 4 : 0 ]
Output

Definition at line 54 of file rs232_rcv393.v.

ser_di_d
Signal

Definition at line 56 of file rs232_rcv393.v.

ser_filt_di
Signal

Definition at line 57 of file rs232_rcv393.v.

ser_filt_di_d
Signal

Definition at line 58 of file rs232_rcv393.v.

bit_half_end
Signal

Definition at line 59 of file rs232_rcv393.v.

last_half_bit
Signal

Definition at line 60 of file rs232_rcv393.v.

wait_pause
Signal

Definition at line 61 of file rs232_rcv393.v.

wait_start
Signal

Definition at line 62 of file rs232_rcv393.v.

Definition at line 63 of file rs232_rcv393.v.

start_r
Signal

Definition at line 64 of file rs232_rcv393.v.

Definition at line 65 of file rs232_rcv393.v.

bit_cntr_r
Signal

Definition at line 66 of file rs232_rcv393.v.

error
Signal

Definition at line 67 of file rs232_rcv393.v.

restart
Signal

Definition at line 68 of file rs232_rcv393.v.

Definition at line 69 of file rs232_rcv393.v.

ts_stb_r
Signal

Definition at line 70 of file rs232_rcv393.v.

shift_en
Signal

Definition at line 71 of file rs232_rcv393.v.

sample_bit
Signal

Definition at line 73 of file rs232_rcv393.v.

Definition at line 74 of file rs232_rcv393.v.

wstart
Signal

Definition at line 75 of file rs232_rcv393.v.


The documentation for this Module was generated from the following files: