x393  1.0
FPGAcodeforElphelNC393camera
ram18_var_w_var_r Module Reference
Inheritance diagram for ram18_var_w_var_r:
Collaboration diagram for ram18_var_w_var_r:

Public Attributes

Inputs

rclk  
raddr   [ 13 -LOG2WIDTH_RD : 0 ]
ren  
regen  
wclk  
waddr   [ 13 -LOG2WIDTH_WR : 0 ]
we  
web   [ 3 : 0 ]
data_in   [ 1 << LOG2WIDTH_WR - 1 : 0 ]

Outputs

data_out   [ 1 << LOG2WIDTH_RD - 1 : 0 ]

Parameters

REGISTERS  integer 0
LOG2WIDTH_WR  integer 5
LOG2WIDTH_RD  integer 5
11587  

GENERATE

GENERATE [123]  

Includes

ram18_declare_init.vh
ram18_pass_init.vh

Module Instances

ram18_dummy::ram18_dummy_i   Module ram18_dummy [generate]
ram18_32w_32r::ram_i   Module ram18_32w_32r [generate]
ram18_32w_lt32r::ram_i   Module ram18_32w_lt32r [generate]
ram18_lt32w_32r::ram_i   Module ram18_lt32w_32r [generate]
ram18_lt32w_lt32r::ram_i   Module ram18_lt32w_lt32r [generate]

Detailed Description

Definition at line 97 of file ram18_var_w_var_r.v.

Member Data Documentation

REGISTERS 0
Parameter

Definition at line 99 of file ram18_var_w_var_r.v.

LOG2WIDTH_WR 5
Parameter

Definition at line 100 of file ram18_var_w_var_r.v.

LOG2WIDTH_RD 5
Parameter

Definition at line 101 of file ram18_var_w_var_r.v.

11587
Parameter

Definition at line 102 of file ram18_var_w_var_r.v.

rclk
Input

Definition at line 110 of file ram18_var_w_var_r.v.

raddr [ 13 -LOG2WIDTH_RD : 0 ]
Input

Definition at line 112 of file ram18_var_w_var_r.v.

ren
Input

Definition at line 113 of file ram18_var_w_var_r.v.

regen
Input

Definition at line 114 of file ram18_var_w_var_r.v.

data_out [ 1 << LOG2WIDTH_RD - 1 : 0 ]
Output

Definition at line 115 of file ram18_var_w_var_r.v.

wclk
Input

Definition at line 117 of file ram18_var_w_var_r.v.

waddr [ 13 -LOG2WIDTH_WR : 0 ]
Input

Definition at line 118 of file ram18_var_w_var_r.v.

we
Input

Definition at line 119 of file ram18_var_w_var_r.v.

web [ 3 : 0 ]
Input

Definition at line 120 of file ram18_var_w_var_r.v.

data_in [ 1 << LOG2WIDTH_WR - 1 : 0 ]
Input

Definition at line 121 of file ram18_var_w_var_r.v.

GENERATE [123]
GENERATE

Definition at line 123 of file ram18_var_w_var_r.v.

ram18_32w_32r ram_i
Module Instance

Definition at line 131 of file ram18_var_w_var_r.v.

ram18_32w_lt32r ram_i
Module Instance

Definition at line 149 of file ram18_var_w_var_r.v.

ram18_declare_init.vh include
Include

Definition at line 105 of file ram18_var_w_var_r.v.

ram18_dummy ram18_dummy_i
Module Instance

Definition at line 125 of file ram18_var_w_var_r.v.

ram18_lt32w_32r ram_i
Module Instance

Definition at line 168 of file ram18_var_w_var_r.v.

ram18_lt32w_lt32r ram_i
Module Instance

Definition at line 187 of file ram18_var_w_var_r.v.

ram18_pass_init.vh include
Include

Definition at line 134 of file ram18_var_w_var_r.v.


The documentation for this Module was generated from the following files: