x393  1.0
FPGAcodeforElphelNC393camera
gtxe2_chnl_rx_dataiface Module Reference
Inheritance diagram for gtxe2_chnl_rx_dataiface:
Collaboration diagram for gtxe2_chnl_rx_dataiface:

Static Public Member Functions

Always Constructs

ALWAYS_732  ( usrclk )
ALWAYS_733  ( usrclk )

Public Attributes

Inputs

usrclk  wire
usrclk2  wire
reset  wire
indata  wire [internal_data_width - 1 : 0 ]
inisk  wire [internal_isk_width - 1 : 0 ]
realign  wire

Outputs

outdata  wire [interface_data_width - 1 : 0 ]
outisk  wire [interface_isk_width - 1 : 0 ]

Parameters

internal_data_width   16
interface_data_width   32
internal_isk_width   2
interface_isk_width   4
div  interface_data_width / internal_data_width
internal_total_width  internal_data_width + internal_isk_width
interface_total_width  interface_data_width + interface_isk_width

GENERATE

GENERATE [1787]  
GENERATE [1794]  
GENERATE [1819]  

Signals

reg[interface_data_width - 1 : 0 ]  inbuffer_data
reg[interface_isk_width - 1 : 0 ]  inbuffer_isk
reg[ 31 : 0 ]  wordcounter
wire  empty_rd
wire  full_wr
wire  val_wr
wire  val_rd
wire  almost_empty_rd
reg  need_reset
[interface_total_width - 1 : 0 ]  resync
wire[interface_total_width - 1 : 0 ]  data_wr

Module Instances

resync_fifo_nonsynt::fifo   Module resync_fifo_nonsynt

Detailed Description

Definition at line 1752 of file GTXE2_GPL.v.

Member Function Documentation

ALWAYS_732 (   usrclk  
)
Always Construct

Definition at line 1783 of file GTXE2_GPL.v.

ALWAYS_733 (   usrclk  
)
Always Construct

Definition at line 1805 of file GTXE2_GPL.v.

Member Data Documentation

internal_data_width 16
Parameter

Definition at line 1753 of file GTXE2_GPL.v.

interface_data_width 32
Parameter

Definition at line 1754 of file GTXE2_GPL.v.

internal_isk_width 2
Parameter

Definition at line 1755 of file GTXE2_GPL.v.

interface_isk_width 4
Parameter

Definition at line 1756 of file GTXE2_GPL.v.

usrclk wire
Input

Definition at line 1759 of file GTXE2_GPL.v.

usrclk2 wire
Input

Definition at line 1760 of file GTXE2_GPL.v.

reset wire
Input

Definition at line 1761 of file GTXE2_GPL.v.

outdata wire [interface_data_width - 1 : 0 ]
Output

Definition at line 1762 of file GTXE2_GPL.v.

outisk wire [interface_isk_width - 1 : 0 ]
Output

Definition at line 1763 of file GTXE2_GPL.v.

indata wire [internal_data_width - 1 : 0 ]
Input

Definition at line 1764 of file GTXE2_GPL.v.

inisk wire [internal_isk_width - 1 : 0 ]
Input

Definition at line 1765 of file GTXE2_GPL.v.

realign wire
Input

Definition at line 1766 of file GTXE2_GPL.v.

Definition at line 1769 of file GTXE2_GPL.v.

inbuffer_data
Signal

Definition at line 1773 of file GTXE2_GPL.v.

inbuffer_isk
Signal

Definition at line 1774 of file GTXE2_GPL.v.

wordcounter
Signal

Definition at line 1775 of file GTXE2_GPL.v.

empty_rd
Signal

Definition at line 1776 of file GTXE2_GPL.v.

full_wr
Signal

Definition at line 1777 of file GTXE2_GPL.v.

val_wr
Signal

Definition at line 1778 of file GTXE2_GPL.v.

val_rd
Signal

Definition at line 1779 of file GTXE2_GPL.v.

Definition at line 1780 of file GTXE2_GPL.v.

need_reset
Signal

Definition at line 1781 of file GTXE2_GPL.v.

resync
Signal

Definition at line 1814 of file GTXE2_GPL.v.

data_wr
Signal

Definition at line 1818 of file GTXE2_GPL.v.

GENERATE [1787]
GENERATE

Definition at line 1787 of file GTXE2_GPL.v.

GENERATE [1794]
GENERATE

Definition at line 1794 of file GTXE2_GPL.v.

GENERATE [1819]
GENERATE

Definition at line 1819 of file GTXE2_GPL.v.

resync_fifo_nonsynt fifo
Module Instance

Definition at line 1826 of file GTXE2_GPL.v.


The documentation for this Module was generated from the following files: