x393  1.0
FPGAcodeforElphelNC393camera
debug_master Module Reference
Inheritance diagram for debug_master:
Collaboration diagram for debug_master:

Static Public Member Functions

Always Constructs

ALWAYS_496  ( mclk )

Public Attributes

Inputs

mclk  
mrst  
cmd_ad   [ 7 : 0 ]
cmd_stb  
status_start  
debug_di  

Outputs

status_ad   [ 7 : 0 ]
status_rq  
debug_do  
debug_sl  

Parameters

DEBUG_ADDR  'h710
DEBUG_MASK  'h7fc
DEBUG_STATUS_REG_ADDR  'hfc
DEBUG_READ_REG_ADDR  'hfd
DEBUG_SHIFT_DATA  'h0
DEBUG_LOAD  'h1
DEBUG_SET_STATUS  'h2
DEBUG_CMD_LATENCY   2

Signals

wire[ 1 : 0 ]  cmd_a
wire[ 31 : 0 ]  cmd_data
wire  cmd_we
reg[ 31 : 0 ]  data_sr
reg  tgl
reg[ 6 : 0 ]  cntr
reg  ld_r
reg  cmd
reg[DEBUG_CMD_LATENCY : 0 ]  cmd_reg
wire[ 3 : 0 ]  debug_latency_plus1
wire  set_status_w
wire  shift32_w
wire  load_w
wire  cmd_reg_dly
wire  shift_done

Module Instances

dly_16::dly_16_i   Module dly_16
cmd_deser::cmd_deser_32bit_i   Module cmd_deser
status_generate::status_generate_i   Module status_generate

Detailed Description

Definition at line 41 of file debug_master.v.

Member Function Documentation

ALWAYS_496 (   mclk  
)
Always Construct

Definition at line 86 of file debug_master.v.

Member Data Documentation

DEBUG_ADDR 'h710
Parameter

Definition at line 42 of file debug_master.v.

DEBUG_MASK 'h7fc
Parameter

Definition at line 43 of file debug_master.v.

DEBUG_STATUS_REG_ADDR 'hfc
Parameter

Definition at line 44 of file debug_master.v.

DEBUG_READ_REG_ADDR 'hfd
Parameter

Definition at line 45 of file debug_master.v.

DEBUG_SHIFT_DATA 'h0
Parameter

Definition at line 46 of file debug_master.v.

DEBUG_LOAD 'h1
Parameter

Definition at line 47 of file debug_master.v.

DEBUG_SET_STATUS 'h2
Parameter

Definition at line 48 of file debug_master.v.

DEBUG_CMD_LATENCY 2
Parameter

Definition at line 49 of file debug_master.v.

mclk
Input

Definition at line 51 of file debug_master.v.

mrst
Input

Definition at line 52 of file debug_master.v.

cmd_ad [ 7 : 0 ]
Input

Definition at line 54 of file debug_master.v.

cmd_stb
Input

Definition at line 55 of file debug_master.v.

status_ad [ 7 : 0 ]
Output

Definition at line 57 of file debug_master.v.

status_rq
Output

Definition at line 58 of file debug_master.v.

status_start
Input

Definition at line 59 of file debug_master.v.

debug_do
Output

Definition at line 62 of file debug_master.v.

debug_sl
Output

Definition at line 63 of file debug_master.v.

debug_di
Input

Definition at line 64 of file debug_master.v.

cmd_a
Signal

Definition at line 66 of file debug_master.v.

cmd_data
Signal

Definition at line 67 of file debug_master.v.

cmd_we
Signal

Definition at line 68 of file debug_master.v.

data_sr
Signal

Definition at line 69 of file debug_master.v.

tgl
Signal

Definition at line 70 of file debug_master.v.

cntr
Signal

Definition at line 71 of file debug_master.v.

ld_r
Signal

Definition at line 72 of file debug_master.v.

cmd
Signal

Definition at line 73 of file debug_master.v.

cmd_reg
Signal

Definition at line 74 of file debug_master.v.

Definition at line 75 of file debug_master.v.

set_status_w
Signal

Definition at line 77 of file debug_master.v.

shift32_w
Signal

Definition at line 78 of file debug_master.v.

load_w
Signal

Definition at line 79 of file debug_master.v.

cmd_reg_dly
Signal

Definition at line 80 of file debug_master.v.

shift_done
Signal

Definition at line 81 of file debug_master.v.

cmd_deser cmd_deser_32bit_i
Module Instance

Definition at line 119 of file debug_master.v.

dly_16 dly_16_i
Module Instance

Definition at line 108 of file debug_master.v.

status_generate status_generate_i
Module Instance

Definition at line 136 of file debug_master.v.


The documentation for this Module was generated from the following files: