x393  1.0
FPGAcodeforElphelNC393camera
dct1d_chen_reorder_in Module Reference
Inheritance diagram for dct1d_chen_reorder_in:

Static Public Member Functions

Always Constructs

ALWAYS_198  ( clk )

Public Attributes

Inputs

clk  
rst  
en  
din   [WIDTH - 1 : 0 ]
start  

Outputs

dout_10_32_76_54   [ 2 *WIDTH - 1 : 0 ]
start_out   reg
en_out  

Parameters

WIDTH   24

Signals

reg  last_r
reg[ 2 : 0 ]  cntr_in
reg[ 1 : 0 ]  raddr
wire  restart
wire[ 1 : 0 ]  we
wire[ 1 : 0 ]  waddr
reg[WIDTH - 1 : 0 ]  bufl_ram [ 0 : 3 ]
reg[WIDTH - 1 : 0 ]  bufh_ram [ 0 : 3 ]
reg[ 2 *WIDTH - 1 : 0 ]  dout_10_32_76_54_r
reg  first_period
reg  en_out_r
reg  last_out
reg  re_r

Detailed Description

Definition at line 41 of file dct1d_chen_reorder_in.v.

Member Function Documentation

ALWAYS_198 (   clk  
)
Always Construct

Definition at line 70 of file dct1d_chen_reorder_in.v.

Member Data Documentation

WIDTH 24
Parameter

Definition at line 42 of file dct1d_chen_reorder_in.v.

clk
Input

Definition at line 44 of file dct1d_chen_reorder_in.v.

rst
Input

Definition at line 45 of file dct1d_chen_reorder_in.v.

en
Input

Definition at line 46 of file dct1d_chen_reorder_in.v.

din [WIDTH - 1 : 0 ]
Input

Definition at line 47 of file dct1d_chen_reorder_in.v.

start
Input

Definition at line 48 of file dct1d_chen_reorder_in.v.

dout_10_32_76_54 [ 2 *WIDTH - 1 : 0 ]
Output

Definition at line 49 of file dct1d_chen_reorder_in.v.

start_out reg
Output

Definition at line 50 of file dct1d_chen_reorder_in.v.

en_out
Output

Definition at line 51 of file dct1d_chen_reorder_in.v.

last_r
Signal

Definition at line 53 of file dct1d_chen_reorder_in.v.

cntr_in
Signal

Definition at line 54 of file dct1d_chen_reorder_in.v.

raddr
Signal

Definition at line 55 of file dct1d_chen_reorder_in.v.

restart
Signal

Definition at line 56 of file dct1d_chen_reorder_in.v.

we
Signal

Definition at line 58 of file dct1d_chen_reorder_in.v.

waddr
Signal

Definition at line 59 of file dct1d_chen_reorder_in.v.

bufl_ram [ 0 : 3 ]
Signal

Definition at line 60 of file dct1d_chen_reorder_in.v.

bufh_ram [ 0 : 3 ]
Signal

Definition at line 61 of file dct1d_chen_reorder_in.v.

Definition at line 62 of file dct1d_chen_reorder_in.v.

first_period
Signal

Definition at line 63 of file dct1d_chen_reorder_in.v.

en_out_r
Signal

Definition at line 64 of file dct1d_chen_reorder_in.v.

last_out
Signal

Definition at line 65 of file dct1d_chen_reorder_in.v.

re_r
Signal

Definition at line 66 of file dct1d_chen_reorder_in.v.


The documentation for this Module was generated from the following files: