x393  1.0
FPGAcodeforElphelNC393camera
cmprs_out_fifo Module Reference
Inheritance diagram for cmprs_out_fifo:
Collaboration diagram for cmprs_out_fifo:

Static Public Member Functions

Always Constructs

ALWAYS_74  ( wclk )
ALWAYS_75  ( rclk )

Public Attributes

Inputs

wclk  
wrst  
we  
wdata   [ 15 : 0 ]
wa_rst  
wlast  
rclk  
rrst  
rst_fifo  
ren  
eof_written  

Outputs

eof_written_wclk  
rdata   [ 63 : 0 ]
eof  
flush_fifo  
fifo_count   [ 7 : 0 ]

Signals

reg  regen
reg[ 8 : 0 ]  raddr
reg[ 7 : 0 ]  count32
reg[ 7 : 0 ]  lcount32
reg[ 10 : 0 ]  waddr
wire  written32b
wire  wlast_rclk
reg  flush_fifo_r

Module Instances

pulse_cross_clock::written32b_i   Module pulse_cross_clock
pulse_cross_clock::wlast_rclk_i   Module pulse_cross_clock
pulse_cross_clock::eof_written_wclk_i   Module pulse_cross_clock
ram_var_w_var_r::fifo_i   Module ram_var_w_var_r

Detailed Description

Definition at line 41 of file cmprs_out_fifo.v.

Member Function Documentation

ALWAYS_74 (   wclk  
)
Always Construct

Definition at line 78 of file cmprs_out_fifo.v.

ALWAYS_75 (   rclk  
)
Always Construct

Definition at line 84 of file cmprs_out_fifo.v.

Member Data Documentation

wclk
Input

Definition at line 45 of file cmprs_out_fifo.v.

wrst
Input

Definition at line 46 of file cmprs_out_fifo.v.

we
Input

Definition at line 47 of file cmprs_out_fifo.v.

wdata [ 15 : 0 ]
Input

Definition at line 48 of file cmprs_out_fifo.v.

wa_rst
Input

Definition at line 49 of file cmprs_out_fifo.v.

wlast
Input

Definition at line 50 of file cmprs_out_fifo.v.

Definition at line 51 of file cmprs_out_fifo.v.

rclk
Input

Definition at line 54 of file cmprs_out_fifo.v.

rrst
Input

Definition at line 55 of file cmprs_out_fifo.v.

rst_fifo
Input

Definition at line 56 of file cmprs_out_fifo.v.

ren
Input

Definition at line 57 of file cmprs_out_fifo.v.

rdata [ 63 : 0 ]
Output

Definition at line 58 of file cmprs_out_fifo.v.

eof
Output

Definition at line 59 of file cmprs_out_fifo.v.

eof_written
Input

Definition at line 60 of file cmprs_out_fifo.v.

flush_fifo
Output

Definition at line 61 of file cmprs_out_fifo.v.

fifo_count [ 7 : 0 ]
Output

Definition at line 62 of file cmprs_out_fifo.v.

regen
Signal

Definition at line 65 of file cmprs_out_fifo.v.

raddr
Signal

Definition at line 66 of file cmprs_out_fifo.v.

count32
Signal

Definition at line 67 of file cmprs_out_fifo.v.

lcount32
Signal

Definition at line 68 of file cmprs_out_fifo.v.

waddr
Signal

Definition at line 69 of file cmprs_out_fifo.v.

written32b
Signal

Definition at line 70 of file cmprs_out_fifo.v.

wlast_rclk
Signal

Definition at line 71 of file cmprs_out_fifo.v.

flush_fifo_r
Signal

Definition at line 72 of file cmprs_out_fifo.v.

pulse_cross_clock written32b_i
Module Instance

Definition at line 106 of file cmprs_out_fifo.v.

pulse_cross_clock wlast_rclk_i
Module Instance

Definition at line 107 of file cmprs_out_fifo.v.

pulse_cross_clock eof_written_wclk_i
Module Instance

Definition at line 109 of file cmprs_out_fifo.v.

ram_var_w_var_r fifo_i
Module Instance

Definition at line 110 of file cmprs_out_fifo.v.


The documentation for this Module was generated from the following files: