x393  1.0
FPGAcodeforElphelNC393camera
clock_inverter Module Reference
Inheritance diagram for clock_inverter:
Collaboration diagram for clock_inverter:

Static Public Member Functions

Always Constructs

ALWAYS_707  ( clk_in )
ALWAYS_708  ( clk_in )

Public Attributes

Inputs

rst  
clk_in  
invert  

Outputs

clk_out  

Signals

reg  invert_r
reg  pos_r
reg  neg_r

Module Instances

BUFGCTRL::BUFGCTRL_i   Module BUFGCTRL

Detailed Description

Definition at line 28 of file clock_inverter.v.

Member Function Documentation

ALWAYS_707 (   clk_in  
)
Always Construct

Definition at line 39 of file clock_inverter.v.

ALWAYS_708 (   clk_in  
)
Always Construct

Definition at line 44 of file clock_inverter.v.

Member Data Documentation

rst
Input

Definition at line 29 of file clock_inverter.v.

clk_in
Input

Definition at line 30 of file clock_inverter.v.

invert
Input

Definition at line 31 of file clock_inverter.v.

clk_out
Output

Definition at line 32 of file clock_inverter.v.

invert_r
Signal

Definition at line 35 of file clock_inverter.v.

pos_r
Signal

Definition at line 36 of file clock_inverter.v.

neg_r
Signal

Definition at line 37 of file clock_inverter.v.

BUFGCTRL BUFGCTRL_i
Module Instance

Definition at line 47 of file clock_inverter.v.


The documentation for this Module was generated from the following files: