ahci_dma_rd_fifo Member List

This is the complete list of members for ahci_dma_rd_fifo, including all inherited members.

EXTRA_DLY	pulse_cross_clock	Parameter
rst	pulse_cross_clock	Input
src_clk	pulse_cross_clock	Input
dst_clk	pulse_cross_clock	Input
in_pulse	pulse_cross_clock	Input
out_pulse	pulse_cross_clock	Output
busy	pulse_cross_clock	Output
EXTRA_DLY_SAFE	pulse_cross_clock	Parameter
in_reg	pulse_cross_clock	Signal
out_reg	pulse_cross_clock	Signal
busy_r	pulse_cross_clock	Signal
WCNT_BITS	ahci_dma_rd_fifo
ADDRESS_BITS	ahci_dma_rd_fifo
mrst	ahci_dma_rd_fifo
hrst	ahci_dma_rd_fifo
mclk	ahci_dma_rd_fifo
hclk	ahci_dma_rd_fifo
wcnt	ahci_dma_rd_fifo
woffs	ahci_dma_rd_fifo
start	ahci_dma_rd_fifo
din	ahci_dma_rd_fifo
din_av	ahci_dma_rd_fifo
din_av_many	ahci_dma_rd_fifo
last_prd	ahci_dma_rd_fifo
din_re	ahci_dma_rd_fifo
done	ahci_dma_rd_fifo
done_flush	ahci_dma_rd_fifo
dout	ahci_dma_rd_fifo
dout_vld	ahci_dma_rd_fifo
dout_re	ahci_dma_rd_fifo
last_DW	ahci_dma_rd_fifo
debug_dma_h2d	ahci_dma_rd_fifo
ADDRESS_NUM	ahci_dma_rd_fifo
waddr	ahci_dma_rd_fifo
raddr_r	ahci_dma_rd_fifo
raddr_w	ahci_dma_rd_fifo
din_prev	ahci_dma_rd_fifo
qwcntr	ahci_dma_rd_fifo
busy	ahci_dma_rd_fifo
end_offs	ahci_dma_rd_fifo
fifo_ram	ahci_dma_rd_fifo
vld_ram	ahci_dma_rd_fifo
fifo_full	ahci_dma_rd_fifo
fifo_nempty	ahci_dma_rd_fifo
fifo_wr	ahci_dma_rd_fifo
fifo_rd	ahci_dma_rd_fifo
fifo_rd_r	ahci_dma_rd_fifo
mrst_hclk	ahci_dma_rd_fifo
fifo_full2	ahci_dma_rd_fifo
fifo_dav	ahci_dma_rd_fifo
fifo_dav2_w	ahci_dma_rd_fifo
fifo_dav2	ahci_dma_rd_fifo
fifo_half_hclk	ahci_dma_rd_fifo
woffs_r	ahci_dma_rd_fifo
fifo_di	ahci_dma_rd_fifo
fifo_di_vld	ahci_dma_rd_fifo
fifo_do_r	ahci_dma_rd_fifo
fifo_do_vld_r	ahci_dma_rd_fifo
din_av_safe_r	ahci_dma_rd_fifo
en_fifo_wr	ahci_dma_rd_fifo
last_mask	ahci_dma_rd_fifo
done_flush_mclk	ahci_dma_rd_fifo
flushing_hclk	ahci_dma_rd_fifo
flushing_mclk	ahci_dma_rd_fifo
last_fifo_wr	ahci_dma_rd_fifo
debug_waddr	ahci_dma_rd_fifo
debug_raddr	ahci_dma_rd_fifo
raddr	ahci_dma_rd_fifo
fifo_do	ahci_dma_rd_fifo
fifo_do_vld	ahci_dma_rd_fifo
rst	ahci_dma_rd_stuff	Input
clk	ahci_dma_rd_stuff	Input
din_av	ahci_dma_rd_stuff	Input
din_avm_w	ahci_dma_rd_stuff	Input
din_avm	ahci_dma_rd_stuff	Input
flushing	ahci_dma_rd_stuff	Input
din	ahci_dma_rd_stuff	Input
dm	ahci_dma_rd_stuff	Input
din_re	ahci_dma_rd_stuff	Output
flushed	ahci_dma_rd_stuff	Output
dout	ahci_dma_rd_stuff	Output
dout_vld	ahci_dma_rd_stuff	Output
dout_re	ahci_dma_rd_stuff	Input
last_DW	ahci_dma_rd_stuff	Output
hr	ahci_dma_rd_stuff	Signal
hr_full	ahci_dma_rd_stuff	Signal
dout_vld_r	ahci_dma_rd_stuff	Signal
din_av_safe_r	ahci_dma_rd_stuff	Signal
din_re_r	ahci_dma_rd_stuff	Signal
dav_in	ahci_dma_rd_stuff	Signal
drd_in	ahci_dma_rd_stuff	Signal
debug_din_low	ahci_dma_rd_stuff	Signal
debug_din_high	ahci_dma_rd_stuff	Signal
debug_dout_low	ahci_dma_rd_stuff	Signal
debug_dout_high	ahci_dma_rd_stuff	Signal
more_words_avail	ahci_dma_rd_stuff	Signal
next_or_empty	ahci_dma_rd_stuff	Signal
room_for2	ahci_dma_rd_stuff	Signal
room_for1	ahci_dma_rd_stuff	Signal
slow_down	ahci_dma_rd_stuff	Signal
slow_dav	ahci_dma_rd_stuff	Signal
last_DW_r	ahci_dma_rd_stuff	Signal
last_dw_sent	ahci_dma_rd_stuff	Signal
no_new_data_w	ahci_dma_rd_stuff	Signal
no_new_data_r	ahci_dma_rd_stuff	Signal
ahci_dma_rd_stuff	ahci_dma_rd_fifo
ALWAYS_532 src_clk or rst	pulse_cross_clock	Always Construct
ALWAYS_533 dst_clk	pulse_cross_clock	Always Construct
ALWAYS_577 hclk	ahci_dma_rd_fifo	Always Construct
ALWAYS_578 mclk	ahci_dma_rd_fifo	Always Construct
ALWAYS_579 clk	ahci_dma_rd_stuff	Always Construct
pulse_cross_clock	ahci_dma_rd_fifo