x393
1.0
FPGAcodeforElphelNC393camera
csconvert_mono.v
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1
39
`timescale 1ns/1ps
40
41
module
csconvert_mono
(
en
,
42
clk
,
43
din
,
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pre_first_in
,
45
y_out
,
46
yaddr
,
47
ywe
,
48
pre_first_out
);
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50
input
en
;
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input
clk
;
// clock
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input
[
7
:
0
]
din
;
// input data in scanline sequence
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input
pre_first_in
;
// marks the first input pixel
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output
[
7
:
0
]
y_out
;
// output Y (16x16) in scanline sequence. Valid if ys active
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output
[
7
:
0
]
yaddr
;
// address for the external buffer memory to write 16x16x8bit Y data
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output
ywe
;
// wrire enable of Y data
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output
pre_first_out
;
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wire
pre_first_out
=
pre_first_in
;
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// wire [7:0] y_out= din[7:0];
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wire
[
7
:
0
]
y_out
= {~
din
[
7
],
din
[
6
:
0
]};
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reg
[
7
:
0
]
yaddr
;
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reg
ywe
;
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always
@ (
posedge
clk
)
begin
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ywe
<=
en
& (
pre_first_in
|| (
ywe
&& (
yaddr
[
7
:
0
] !=
8'hff
)));
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if
(!
en
||
pre_first_in
)
yaddr
[
7
:
0
] <=
8'h0
;
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else
if
(
ywe
)
yaddr
[
7
:
0
] <=
yaddr
[
7
:
0
] +
1
;
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end
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endmodule
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csconvert_mono.2285pre_first_out
2285pre_first_outwire
Definition:
csconvert_mono.v:59
csconvert_mono.2279din
[7:0] 2279din
Definition:
csconvert_mono.v:52
csconvert_mono.2288ywe
2288ywereg
Definition:
csconvert_mono.v:63
csconvert_mono.2286y_out
2286y_outwire[7:0]
Definition:
csconvert_mono.v:61
csconvert_mono.2278clk
2278clk
Definition:
csconvert_mono.v:51
csconvert_mono.2280pre_first_in
2280pre_first_in
Definition:
csconvert_mono.v:53
csconvert_mono.2277en
2277en
Definition:
csconvert_mono.v:50
csconvert_mono
Definition:
csconvert_mono.v:41
csconvert_mono.2287yaddr
2287yaddrreg[7:0]
Definition:
csconvert_mono.v:62
compressor_jp
csconvert_mono.v
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