x393  1.0
FPGAcodeforElphelNC393camera
SAXIWrSim Class Reference
Inheritance diagram for SAXIWrSim:
Collaboration diagram for SAXIWrSim:

Public Member Functions

Public Attributes

Private Attributes

Static Private Attributes

Detailed Description

Connects to host side of simul_axi_wr (just writes to system memory) (both GP and HP)
No locks are used, single instance should be connected to a particular port

Definition at line 143 of file x393interfaces.py.

Constructor & Destructor Documentation

def __init__ (   self,
  entity,
  name,
  clock,
  mempath,
  memhigh = 0x40000000,
  data_bytes = 8,
  autoflush = True,
  blatency = 5 
)
@param entity Device under test
@param name port names prefix (DUT has I/O ports <name>_<signal>
@clock clock that drives this interface
@param mempath operation system path of the memory image (1GB now - 0..0x3fffffff) 
@param memhigh memory high address
@param data_bytes data width, in bytes
@param autoflush flush file after each write
@param blatency  number of cycles to delay write response (b) channel

Definition at line 163 of file x393interfaces.py.

Member Function Documentation

def flush (   self)

Definition at line 222 of file x393interfaces.py.

Member Data Documentation

int _address_lsb = 3
staticprivate

Definition at line 162 of file x393interfaces.py.

Referenced by SAXIRdSim.saxi_rd_run(), and SAXIWrSim.saxi_wr_run().

_address_lsb
private

Definition at line 206 of file x393interfaces.py.

Referenced by SAXIRdSim.saxi_rd_run().

int _data_bytes = 8
staticprivate

Definition at line 161 of file x393interfaces.py.

Referenced by SAXIRdSim.saxi_rd_run(), and SAXIWrSim.saxi_wr_run().

_data_bytes
private

Definition at line 205 of file x393interfaces.py.

Referenced by SAXIRdSim.saxi_rd_run().

_fmt = None
staticprivate

Definition at line 159 of file x393interfaces.py.

Referenced by SAXIRdSim.saxi_rd_run(), and SAXIWrSim.saxi_wr_run().

_memfile = None
staticprivate

Definition at line 160 of file x393interfaces.py.

list _signals
staticprivate
Initial value:
1 = [ # i/o from the DUT side
2 
3  "wr_address", # output[31:0]
4  "wid", # output[5:0]
5  "wr_valid", # output
6  "wr_ready", # input
7  "wr_data", # output[63:0]
8  "wr_stb", # output[7:0]
9  "bresp_latency"]

Definition at line 148 of file x393interfaces.py.

autoflush

Definition at line 201 of file x393interfaces.py.

Referenced by SAXIWrSim.saxi_wr_run().

name

The documentation for this Module class was generated from the following file: