wrap Directory Reference

Files
file	dci_reset.v [code]
	DCIRESET primitivbe wrapper.
file	ddr3_wrap.v [code]
	ddr3 model wrapper to include delays matching hardware
file	ibuf_ibufg.v [code]
	Wrapper for IBUFG primitive.
file	ibufds_ibufgds.v [code]
	Wrapper for IBUFDS primitive.
file	ibufg.v [code]
	Wrapper for IBUFG primitive.
file	ibufgds.v [code]
	Wrapper for IBUFDS primitive.
file	idelay_ctrl.v [code]
	IDELAYCTRL wrapper.
file	idelay_fine_pipe.v [code]
	IDELAYE2_FINEDELAY wrapper with fine control pipelined.
file	idelay_nofine.v [code]
	IDELAYE2 wrapper without fine delay.
file	iobuf.v [code]
	Wrapper for IOBUF primitive.
file	iserdes_mem.v [code]
	ISERDESE2/ISERDESE1 wrapper to use for DDR3 memory w/o phasers.
file	latch_g_ce.v [code]
	Multi-bit wrapper for the transparent latch primitive.
file	mmcm_adv.v [code]
	MMCME2_ADV wrapper.
file	mmcm_phase_cntr.v [code]
	MMCME2_ADV with phase counter, supporting absolute phase setting.
file	mpullup.v [code]
	wrapper for PULLUP primitive
file	obuf.v [code]
	Wrapper for OBUF primitive.
file	obufds.v [code]
	Wrapper for OBUFDS primitive.
file	oddr.v [code]
	ODDR wrapper.
file	oddr_ds.v [code]
	wrapper for ODDR+OBUFDS
file	oddr_ss.v [code]
	Wrapper for ODDR+OBUFT.
file	odelay_fine_pipe.v [code]
	ODELAYE2_FINEDELAY wrapper with fine control pipelined.
file	odelay_pipe.v [code]
	ODELAYE2 wrapper pipelined.
file	oserdes_mem.v [code]
	OSERDESE2/OSERDESE1 wrapper to use for DDR3 memory w/o phasers.
file	pll_base.v [code]
	PLLE2_ADV wrapper for PLL_BASE functionality.
file	ram18_var_w_var_r.v [code]
	Half-BRAM module wrapper to use as a variable width R/W, no parity.
file	ram18p_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read using "SDP" or "TDP" mode of RAMB18E1 (half of RAMB18E1) Uses parity bits to extend total data width (minimal width should be >=8).
file	ram18t_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port. Does not use parity bits to increase total data width, width down to 1 are valid.
file	ram18tp_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read, using "TDP" mode of RAMB18E1. Same R/W widths in each port. Uses parity bits to increase total data width. Widths down to 9 are valid.
file	ram_1kx32_1kx32.v [code]
	32-bit in/32-bit out memory buffer.
file	ram_1kx32w_512x64r.v [code]
	Block RAM wrapper for the external memory write buffer.
file	ram_512x64w_1kx32r.v [code]
	Block RAM wrapper for the external memory read buffer.
file	ram_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read using "SDP" ot "TDP" modes of RAMB36E1.
file	ramp_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read using "SDP" mode of RAMB36E1 Uses parity bits to extend total data width (minimal width should be >=8).
file	ramt_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port. Does not use parity bits to increase total data width, width down to 1 are valid.
file	ramt_var_wb_var_r.v [code]
	Dual port memory wrapper, with variable width write (with mask) and variable width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port. Does not use parity bits to increase total data width, width down to 1 are valid.
file	ramtp_var_w_var_r.v [code]
	Dual port memory wrapper, with variable width write and variable width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port. Uses parity bits to increase total data width. Widths down to 9 are valid.
file	select_clk_buf.v [code]
	Select one of the clock buffers primitives by parameter.